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648
ASSEMBLY & COMPILE TOOLS/Basic-E/source/FPPKG.SRC
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648
ASSEMBLY & COMPILE TOOLS/Basic-E/source/FPPKG.SRC
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@@ -0,0 +1,648 @@
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NAME FLPT
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CSEG
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PUBLIC OVERF,FLOAD,FSTOR,FADD,FSUB,FMUL,FDIV,FTEST
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PUBLIC FCHS,FABS,RSH,LSH,ADD10,FZERO,FCOMP,FSTR0
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EXTRN OVER,PREX,ACCE,ACCS,ACC1,ACC2,ACC3,SF
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; 8008 BINARY FLOATING POINT SYSTEM
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; ARITHMETIC AND UTILITY PACKAGE
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; PROGRAMMER CAL OHME
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; DATE 26 DECEMBER 1973
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; FSTOR SUBROUTINE ENTRY POINT.
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FSTR0: MOV M,E; STORE ZEROETH WORD
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INR L; TO ADDRESS FIRST WORD
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FSTOR: MOV M,A; STORE FIRST WORD
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STR1: INR L; TO ADDRESS SECOND WORD
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MOV M,B; STORE SECOND WORD
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INR L; TO ADDRESS THIRD WORD
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MOV M,C; STORE THIRD WORD
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INR L; TO ADDRESS FOURTH WORD
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MOV M,D; STORE FOURTH WORD
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RET ; RETURN TO CALLER
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; FLOATING POINT ZERO SUBROUTINE ENT. PNT.
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FZERO: LXI H,ACCE; TO ADDRESS ACCUM EXPONENT
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XRA A; ZERO
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MOV M,A; CLEAR ACCUMULATOR EXPONENT
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RET ; RETURN TO CALLER
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; FLOATING POINT CHS SUBROUTINE ENT. PNT.
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FCHS: MVI A,80H; MASK FOR SIGN BIT
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DB 00EH; LBI INST TO SKIP NEXT WD
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; FLOATING POINT ABS SUBROUTINE ENT. PNT.
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FABS: XRA A; ZERO
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LXI H,ACCS; TO ADDRESS ACCUM SIGN
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ANA M ; COMPLEMENT OF SIGN
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XRI 80H; COMPLEMENT THE SIGN BIT
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MOV M,A; ACCUMULATOR SIGN
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; FLOATING POINT TEST ENTRY POINT.
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FTEST: LXI H,ACCE; TO ADDR ACCUM EXPONENT
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MOV A,M; ACCUMULATOR EXPONENT
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ANA A ; SET CONTROL BITS
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JZ FZERO; IF ACCUMULATOR IS ZERO
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MOV E,A; ACCUMULATOR EXPONENT
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INR L; TO ADDR ACCUMULATOR SIGN
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MOV A,M; ACCUMULATOR SIGN
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INR L; TO ADDR ACCUM 1ST FRCTN
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XRA M; ACCUM SIGN AND 1ST FRCTN
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INR L; TO ADDR ACCUM 2ND FRCTN
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MOV C,M; ACCUMULATOR 2ND FRACTION
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INR L; TO ADDR ACCUM 3RD FRCTN
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MOV D,M; ACCUMULATOR 3RD FRCTN
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JMP ADD12; TO SET EXIT CONDITIONS
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; FLOATING POINT LOAD ENTRY POINT.
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FLOAD: MOV A,M; OPERAND EXPONENT
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ANA A ; SET CONTROL BITS
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JZ FZERO; IF OPERAND IS ZERO
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MOV E,A; OPERAND EXPONENT
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INR L; TO ADDR OP SIGN AND 1ST
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MOV A,M; OPERAND SIGN AND 1ST FRCTN
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INR L; TO ADDRESS OPERAND 2ND FRACTION
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MOV C,M; OPERAND 2ND FRACTION
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INR L; TO ADDRESS OPERAND 3RD FRACTION
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MOV D,M; OPERAND 3RD FRACTION
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; STORE THE OPERAND IN THE ACCUMULATOR.
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MOV L,A; OPERAND SIGN AND 1ST FRCTN
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FLOAD1: ORI 80H; ACCUMULATOR 1ST FRACTION
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MOV B,A; ACCUMULATOR 1ST FRACTION
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XRA L; ACCUMULATOR SIGN
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LXI H,ACCE; TO ADDR ACCUM EXPONENT
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CALL FSTR0; SET THE ACCUMULATOR
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XRA B; ACCUM SIGN AND 1ST FRCTN
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; SET CONTROL BITS AND EXIT
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MOV B,A; ACCUM SIGN AND 1ST FRACTION
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ORI 1; SET SIGN BIT FOR EXIT
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MOV A,E; ACCUMULATOR EXPONENT
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RET ; RETURN TO CALLER
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; FLOATING POINT MUL SUBROUTINE ENT. PNT.
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FMUL: MOV A,M; OPERAND EXPONENT
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ANA A ; SET CONTROL BITS
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CNZ MDEX; READ OPERAND IF NOT ZERO
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JZ FZERO; IF ZERO OR UNDERFLOW
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JC OVERF; IF OVERFLOW
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CALL MULX; CALL FIXED MULT SUBRTN
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; NORMALIZE IF NECESSARY.
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MOV A,B; 1ST PRODUCT
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ANA A ; SET CONTROL BITS
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JM RNDA; IF NO NORMALIZATION REQUIRED
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LXI H,ACCE; TO ADDR ACCUM EXPONENT
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MOV A,M; ACCUMULATOR EXPONENT
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SBI 1; DECREMENT ACCUMULATOR EXPONENT
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MOV M,A; ACCUMULATOR EXPONENT
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RZ ; RETURN TO CALLER IF UNDERFLOW
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CALL LSH; CALL LEFT SHIFT SUBROUTINE
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; ROUND IF NECESSARY.
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RNDA: CALL ROND; CALL ROUNDING SUBROUTINE
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JC OVERF; IF OVERFLOW
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MOV B,A; ACCUM SIGN AND 1ST FRACTION
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ORI 1; SET SIGN BIT
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MOV A,E; ACCUMULATOR EXPONENT
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RET ; RETURN TO CALLER
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; FLOATING POINT DIV SUBROUTINE ENT. PNT.
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FDIV: XRA A; ZERO
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SUB M; COMPLEMENT OF DIVISOR EXPONENT
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CPI 1; SET CARRY IF DIVISION BY ZERO
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CNC MDEX; READ OPERAND IF NOT ZERO
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JC OVERF; IF OVERFLOW OR DIVISION BY ZERO
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JZ FZERO; IF UNDERFLOW OR ZERO
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MOV C,A; DIVISOR 1ST FRACTION
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CALL DIVX; CALL FIXED DIV SUBRTN
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JC RNDA; IF NO OVERFLOW
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; SET OVERFLOW FLAG.
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OVERF: LXI H,OVER; TO ADDR OVERFLOW FLAG
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MVI A,0FFH; OVERFLOW FLAG
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MOV M,A; OVERFLOW FLAG
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RLC ; SET CARRY BIT FOR EXIT
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RET ; RETURN TO CALLER
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DB 0; CHECK SUM WORD
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; FLOATING POINT SUB SUBROUTINE ENT. PNT.
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FSUB: MVI A,80H; MASK TO CHANGE OP SIGN
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DB 0EH; LBI INST TO SKIP NEXT WD
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; FLOATING POINT ADD SUBROUTINE ENT. PNT.
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FADD: XRA A; ZERO
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; LOAD THE OPERAND.
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MOV E,M; OPERAND EXPONENT
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INR L; TO ADDR OP SIGN, 1ST FRCTN
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XRA M; OPERAND SIGN AND 1ST FRCTN
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MOV B,A; OPERAND SIGN AND 1ST FRCTN
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INR L; TO ADDR OPERAND 2ND
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MOV C,M; OPERAND 2ND FRACTION
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INR L; TO ADDR OPERAND 3RD FRCTN
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MOV D,M; OPERAND 3RD FRACTION
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; SAVE INITIAL EXPONENT.
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LXI H,ACCE; TO ADDR ACCUM EXPONENT
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MOV A,M; ACCUMULATOR EXPONENT
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DCR L; TO ADDR INITIAL EXPONENT
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MOV M,A; INITIAL EXPONENT
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; CHECK FOR ZERO OPERAND.
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MOV A,E; OPERAND EXPONENT
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ANA A ; SET CONTROL BITS
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JZ FTEST; IF OPERAND IS ZERO
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; GENERATE SUBTRACTION FLAG, RESTORE
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; SUPPRESSED FRACTION BIT.
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MOV L,B; OPERAND SIGN AND 1ST FRCTN
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MOV A,B; OPERAND SIGN AND 1ST FRACTION
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ORI 80H; OPERAND 1ST FRACTION
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MOV B,A; OPERAND 1ST FRACTION
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XRA L; OPERAND SIGN
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MVI L,LOW(ACCS); TO ADDRESS ACCUMULATOR SIGN
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XRA M; SUBTRACTION FLAG
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MVI L,LOW(SF); TO ADDRESS SUBTRACTION FLAG
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MOV M,A; SUBTRACTION FLAG
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; DETERMINE RELATIVE MAGNITUDES OF
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; OPERAND AND ACCUMULATOR.
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MVI L,LOW(ACCE); TO ADDRESS ACCUMULATOR EXPONENT
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MOV A,M; ACCUMULATOR EXPONENT
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ANA A ; SET CONTROL BITS
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JZ ADD17; IF ACCUMULATOR IS ZERO
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SUB E; DIFFERENCE IN EXPONENTS
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JC ADD2; IF ACCUM SMALLER THAN OP
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; CHECK FOR INSIGNIFICANT OPERAND.
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JM FTEST; IF THE OPERAND IS INSIGNIFICANT
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CPI 25; COMPARE SHIFT COUNT TO 25
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JC ADD3; JOIN EXCH PATH IF OP SIGNIF
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JMP FTEST; OPERAND IS INSIGNIFICANT
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; CHECK FOR INSIGNIFICANT ACCUMULATOR
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ADD2: JP ADD17; IF ACCUM IS INSIGNIFICANT
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CPI 0E7H; COMPARE SHIFT COUNT TO MINUS 25
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JC ADD17; IF ACCUM IS INSIGNIFICANT
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MOV M,E; OPERAND EXPONENT
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MOV E,A; SHIFT COUNT
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LXI H,SF; TO ADDRESS THE SUBTRACTION FLAG
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MOV A,M; SUBTRACTION FLAG
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MVI L,LOW(ACCS); TO ADDRESS THE ACCUMULATOR SIGN
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XRA M; OPERAND SIGN
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MOV M,A; ACCUMULATOR SIGN
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XRA A; ZERO
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SUB E; COMPLEMENT SHIFT COUNT
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; EXCHANGE ACCUMULATOR AND OPERAND.
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INR L; TO ADDR ACCUM 1ST FRACTION
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MOV E,M; ACCUMULATOR 1ST FRACTION
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MOV M,B; OPERAND 1ST FRACTION
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MOV B,E; ACCUMULATOR 1ST FRACTION
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INR L; TO ADDR ACCUM 2ND FRACTION
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MOV E,M; ACCUMULATOR 2ND FRACTION
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MOV M,C; OPERAND 2ND FRACTION
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MOV C,E; ACCUMULATOR 2ND FRACTION
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INR L; TO ADDR ACCUM 3RD FRACTION
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MOV E,M; ACCUMULATOR 3RD FRACTION
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MOV M,D; OPERAND 3RD FRACTION
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MOV D,E; ACCUMULATOR 3RD FRACTION
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; POSITION THE OPERAND.
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ADD3: CALL RSH; POSITION THE OPERAND
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LXI H,SF; TO ADDRESS SUBTRACTION FLAG
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MOV A,M; SUBTRACTION FLAG
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ANA A ; SET CONTROL BITS
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MVI L,LOW(ACC3); TO ADDR ACCUM 3RD FRCTN
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JM ADD9; IF SUBTRACTION REQUIRED
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; ADD ADDEND TO AUGEND.
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MOV A,M; AUGEND 3RD FRACTION
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ADD D; ADDEND 3RD FRACTION
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MOV D,A; SUM 3RD FRACTION
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DCR L; TO ADDRESS AUGEND 2ND FRACTION
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MOV A,M; AUGEND 2ND FRACTION
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ADC C; ADDEND 2ND FRACTION
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MOV C,A; SUM 2ND FRACTION
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DCR L; TO ADDRESS AUGEND 1ST FRACTION
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MOV A,M; AUGEND 1ST FRACTION
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ADC B; ADDEND 1ST FRACTION
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MOV B,A; SUM 1ST FRACTION
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JNC ADD11; IF NO CARRY FROM 1ST FRCTN
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; RIGHT SHIFT SUM TO NORMALIZED POSITION.
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RAR ; RIGHT SHIFT SUM 1ST FRACTION
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MOV B,A; SUM 1ST FRACTION
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MOV A,C; SUM 2ND FRACTION
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RAR ; RIGHT SHIFT SUM 2ND FRACTION
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MOV C,A; SUM 2ND FRACTION
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MOV A,D; SUM 3RD FRACTION
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RAR ; RIGHT SHIFT SUM 3RD FRACTION
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MOV D,A; SUM 3RD FRACTION
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RAR ; 4TH FRCTN = LOW BIT OF 3RD
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MOV E,A; SUM 4TH FRACTION
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MVI L,LOW(ACCE); TO ADDRESS ACCUMULATOR EXPONENT
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MOV A,M; ACCUMULATOR EXPONENT
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ADI 1; INCREMENT ACCUMULATOR EXPONENT
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JC OVERF; IF OVERFLOW
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MOV M,A; ACCUMULATOR EXPONENT
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JMP ADD11; TO ROUND FRACTION
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; SUBTRACT SUBTRAHEND FROM MINUEND.
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ADD9: XRA A; MINUEND 4TH FRCTN IS ZERO
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SUB E; SUBTRAHEND 4TH FRACTION
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MOV E,A; DIFFERENCE 4TH FRACTION
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MOV A,M; MINUEND 3RD FRACTION
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SBB D; SUBTRAHEND 3RD FRACTION
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MOV D,A; DIFFERENCE 3RD FRACTION
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DCR L; TO ADDRESS MINUEND 2ND FRACTION
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MOV A,M; MINUEND 2ND FRACTION
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SBB C; SUBTRAHEND 2ND FRACTION
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MOV C,A; DIFFERENCE 2ND FRACTION
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DCR L; TO ADDRESS MINUEND 1ST FRACTION
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MOV A,M; MINUEND 1ST FRACTION
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SBB B; SUBTRAHEND 1ST FRACTION
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MOV B,A; DIFFERENCE 1ST FRACTION
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ADD10: CC FCOMP; COMPLEMENT IF NEGATIVE
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CP NORM; NORMALIZE IF NECESSARY
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JP FZERO; IF UNDERFLOW OR ZERO
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ADD11: CALL ROND; CALL ROUNDING SUBROUTINE
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JC OVERF; IF OVERFLOW
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ADD12: MOV B,A; ACCUM SIGN AND 1ST FRCTN
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LXI H,PREX; TO ADDRESS PREV EXPONENT
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MOV A,E; ACCUMULATOR EXPONENT
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SUB M; DIFFERENCE IN EXPONENTS
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MOV L,A; DIFFERENCE IN EXPONENTS
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MOV A,B; ACCUM SIGN AND 1ST FRCTN
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ORI 1; SET SIGN BIT FOR EXIT
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MOV A,E; ACCUMULATOR EXPONENT
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MOV E,L; SIGNIFICANCE INDEX
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RET ; RETURN TO CALLER
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; LOAD THE ACCUMULATOR WITH THE OPERAND.
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ADD17: LXI H,SF; TO ADDR SUBTRACTION FLAG
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MOV A,M; SUBTRACTION FLAG
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MVI L,LOW(ACCS); TO ADDR ACCUMULATOR SIGN
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XRA M; OPERAND SIGN
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DCR L; TO ADDR ACCUM EXPONENT
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CALL FSTR0; SET THE ACCUMULATOR
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XRA B; ACCUM SIGN AND 1ST FRCTN
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JMP ADD12; JOIN EXIT CODE
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DB 0; CHECK SUM WORD
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; SUBROUTINE TO READ THE OPERAND AND
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; CHECK THE ACCUMULATOR EXPONENT.
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MDEX: MOV B,A; EXPONENT MODIFIER
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INR L; TO ADDR OP SIGN, 1ST FRCTN
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MOV C,M; OPERAND SIGN AND 1ST FRACTION
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||||
INR L; TO ADDRESS OPERAND 2ND FRACTION
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MOV D,M; OPERAND 2ND FRACTION
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||||
INR L; TO ADDRESS OPERAND 3RD FRACTION
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||||
MOV E,M; OPERAND 3RD FRACTION
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||||
LXI H,ACCE; TO ADDRESS ACCUMULATOR EXPONENT
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||||
MOV A,M; ACCUMULATOR EXPONENT
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||||
ANA A ; SET CONTROL BITS
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||||
RZ ; RETURN IF ACCUM IS ZERO
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||||
ADD B; RESULT EXPONENT PLUS BIAS
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||||
MOV B,A; RESULT EXPONENT PLUS BIAS
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||||
RAR ; CARRY TO SIGN
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XRA B; CARRY AND SIGN MUST DIFFER
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||||
MOV A,B; RESULT EXPONENT PLUS BIAS
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MVI B,80H; EXP BIAS, SIGN MASK, MS BIT
|
||||
JP OVUN; IF OVERFLOW OR UNDERFLOW
|
||||
SUB B; REMOVE EXCESS EXP BIAS
|
||||
RZ ; RETURN IF UNDERFLOW
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||||
MOV M,A; RESULT EXPONENT
|
||||
INR L; TO ADDRESS ACCUMULATOR SIGN
|
||||
MOV A,M; ACCUMULATOR SIGN
|
||||
XRA C; RESULT SIGN IN SIGN BIT
|
||||
ANA B ; RESULT SIGN
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||||
MOV M,A; RESULT SIGN
|
||||
MOV A,C; OPERAND SIGN AND 1ST FRCTN
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||||
ORA B; OPERAND 1ST FRACTION
|
||||
RET ; RETURN TO CALLER
|
||||
OVUN: RLC ; SET CARRY BIT IF OVERFLOW
|
||||
RC ; RETURN IF OVERFLOW
|
||||
XRA A; ZERO
|
||||
RET ; RETURN IF UNDERFLOW
|
||||
; SUBROUTINE TO LEFT SHIFT THE B, C,
|
||||
; D, AND E REGISTERS ONE BIT.
|
||||
LSH: MOV A,E; ORIGINAL CONTENTS OF E
|
||||
RAL ; LEFT SHIFT E
|
||||
MOV E,A; RESTORE CONTENTS OF E REGISTER
|
||||
LSH1: MOV A,D; ORIGINAL CONTENTS OF D REGISTER
|
||||
RAL ; LEFT SHIFT D
|
||||
MOV D,A; RESTORE CONTENTS OF D REGISTER
|
||||
MOV A,C; ORIGINAL CONTENTS OF C REGISTER
|
||||
RAL ; LEFT SHIFT C
|
||||
MOV C,A; RESTORE CONTENTS OF C REGISTER
|
||||
MOV A,B; ORIGINAL CONTENTS OF B REGISTER
|
||||
ADC A; LEFT SHIFT B
|
||||
MOV B,A; RESTORE CONTENTS OF B REGISTER
|
||||
RET ; RETURN TO CALLER
|
||||
; RIGHT SHIFT THE B, C, D AND E REGISTERS
|
||||
; BY THE SHIFT COUNT IN THE A REGISTER
|
||||
; SHIFT OPERAND TO REGISTER INDICATED BY
|
||||
; SHIFT COUNT
|
||||
RSH: MVI E,0; OPERAND 4TH FRCTN IS ZERO
|
||||
RSH0: MVI L,8; EACH REG IS 8 BITS OF SHIFT
|
||||
RSH1: CMP L; COMPARE SHIFT COUNT TO 8
|
||||
JM RSH2; IF REQ SHIFT LESS THAN 8
|
||||
MOV E,D; OPERAND 4TH FRACTION
|
||||
MOV D,C; OPERAND 3RD FRACTION
|
||||
MOV C,B; OPERAND 2ND FRACTION
|
||||
MVI B,0; OPERAND 1ST FRACTION IS ZERO
|
||||
SUB L; REDUCE SHIFT COUNT BY 1 REG
|
||||
JNZ RSH1; IF MORE SHIFTS REQUIRED
|
||||
; SHIFT OPERAND RIGHT BY -SHIFT COUNT-
|
||||
; BITS.
|
||||
RSH2: ANA A ; SET CONTROL BITS
|
||||
RZ ; RETURN IF SHIFT COMPLETE
|
||||
MOV L,A; SHIFT COUNT
|
||||
RSH3: ANA A ; CLEAR CARRY BIT
|
||||
MOV A,B; OPERAND 1ST FRACTION
|
||||
RAR ; RIGHT SHIFT OP 1ST FRCTN
|
||||
MOV B,A; OPERAND 1ST FRACTION
|
||||
MOV A,C; OPERAND 2ND FRACTION
|
||||
RAR ; RIGHT SHIFT OP 2ND FRCTN
|
||||
MOV C,A; OPERAND 2ND FRACTION
|
||||
MOV A,D; OPERAND 3RD FRACTION
|
||||
RAR ; RIGHT SHIFT OP 3RD FRCTN
|
||||
MOV D,A; OPERAND 3RD FRACTION
|
||||
MOV A,E; OPERAND 4TH FRACTION
|
||||
RAR ; RIGHT SHIFT OP 4TH FRCTN
|
||||
MOV E,A; OPERAND 4TH FRACTION
|
||||
DCR L; DECREMENT SHIFT COUNT
|
||||
JNZ RSH3; IF MORE SHIFTS REQUIRED
|
||||
RET ; RETURN TO CALLER
|
||||
; COMPLEMENT THE B, C, D, AND E REGISTERS.
|
||||
FCOMP: DCR L; TO ADDR ACCUM SIGN
|
||||
MOV A,M; ACCUMULATOR SIGN
|
||||
XRI 80H; CHANGE SIGN
|
||||
MOV M,A; ACCUMULATOR SIGN
|
||||
COMP1: XRA A; ZERO
|
||||
MOV L,A; ZERO
|
||||
SUB E; COMPLEMENT 4TH FRCTN
|
||||
MOV E,A; 4TH FRACTION
|
||||
MOV A,L; ZERO
|
||||
SBB D; COMPLEMENT 3RD FRCTN
|
||||
MOV D,A; 3RD FRACTION
|
||||
MOV A,L; ZERO
|
||||
SBB C; COMPLEMENT 2ND FRCTN
|
||||
MOV C,A; 2ND FRACTION
|
||||
MOV A,L; ZERO
|
||||
SBB B; COMPLEMENT 1ST FRCTN
|
||||
MOV B,A; 1ST FRACTION
|
||||
RET ; RETURN TO CALLER
|
||||
; NORMALIZE THE REGISTERS.
|
||||
NORM: MVI L,20H; MAX NORMALIZING SHIFT
|
||||
NORM1: MOV A,B; 1ST FRACTION
|
||||
ANA A ; SET CONTROL BITS
|
||||
JNZ NORM3; IF 1ST FRACTION NONZERO
|
||||
MOV B,C; 1ST FRACTION
|
||||
MOV C,D; 2ND FRACTION
|
||||
MOV D,E; 3RD FRACTION
|
||||
MOV E,A; ZERO 4TH FRACTION
|
||||
MOV A,L; NORMALIZING SHIFT COUNT
|
||||
SUI 8; REDUCE SHIFT COUNT
|
||||
MOV L,A; NORMALIZING SHIFT COUNT
|
||||
JNZ NORM1; IF FRACTION NONZERO
|
||||
RET ; IF FRACTION IS ZERO
|
||||
NORM2: DCR L; DECREMENT SHIFT COUNT
|
||||
MOV A,E; ORIGINAL CONTENTS OF E
|
||||
RAL ; LEFT SHIFT E
|
||||
MOV E,A; RESTORE CONTENTS OF E REGISTER
|
||||
MOV A,D; ORIGINAL CONTENTS OF D REGISTER
|
||||
RAL ; LEFT SHIFT D
|
||||
MOV D,A; RESTORE CONTENTS OF D REGISTER
|
||||
MOV A,C; ORIGINAL CONTENTS OF C REGISTER
|
||||
RAL ; LEFT SHIFT C
|
||||
MOV C,A; RESTORE CONTENTS OF C REGISTER
|
||||
MOV A,B; ORIGINAL CONTENTS OF B REGISTER
|
||||
ADC A; LEFT SHIFT B
|
||||
MOV B,A; RESTORE CONTENTS OF B REGISTER
|
||||
NORM3: JP NORM2; IF NOT NORMALIZED
|
||||
MOV A,L; NORMALIZING SHIFT COUNT
|
||||
SUI 20H; REMOVE BIAS
|
||||
LXI H,ACCE; TO ADDR ACCUM EXPONENT
|
||||
ADD M; ADJUST ACCUM EXPONENT
|
||||
MOV M,A; NEW ACCUM EXPONENT
|
||||
RZ ; RETURN IF ZERO EXP
|
||||
RAR ; BORROW BIT TO SIGN
|
||||
ANA A ; SET SIGN TO IND. UNDERFLOW
|
||||
RET ; RETURN TO CALLER
|
||||
; SUBROUTINE TO ROUND THE B, C, D REGISTERS.
|
||||
ROND: LXI H,ACCE; TO ADDR ACCUM EXPONENT
|
||||
MOV A,E; 4TH FRACTION
|
||||
ANA A ; SET CONTROL BITS
|
||||
MOV E,M; ACCUMULATOR EXPONENT
|
||||
CM RNDR; CALL 2ND LEVEL ROUNDER
|
||||
RC ; IF OVERFLOW
|
||||
MOV A,B; 1ST FRACTION
|
||||
INR L; TO ADDR ACCUM SIGN
|
||||
XRA M; ACCUM SIGN AND 1ST FRCTN
|
||||
JMP STR1; RETURN THRU STORE SUBR.
|
||||
; SECOND LEVEL ROUNDING SUBROUTINE.
|
||||
RNDR: INR D; ROUND 3RD FRACTION
|
||||
RNZ ; RETURN IF NO CARRY
|
||||
INR C; CARRY TO 2ND FRACTION
|
||||
RNZ ; RETURN IF NO CARRY
|
||||
INR B; CARRY TO 1ST FRACTION
|
||||
RNZ ; RETURN IF NO CARRY
|
||||
MOV A,E; ACCUMULATOR EXPONENT
|
||||
ADI 1; INCREMENT ACCUM EXPONENT
|
||||
MOV E,A; NEW ACCUM EXPONENT
|
||||
MVI B,80H; NEW 1ST FRACTION
|
||||
MOV M,A; NEW ACCUM EXPONENT
|
||||
RET ; RETURN TO ROND SUBROUTINE
|
||||
; FIXED POINT MULTIPLY SUBROUTINE.
|
||||
MULX: LXI H,MULP1+1; TO ADDR 1ST MULTIPLICAND
|
||||
MOV M,A; 1ST MULTIPLICAND
|
||||
LXI H,MULP2+1; TO ADDR 2ND MULTIPLICAND
|
||||
MOV M,D; 2ND MULTIPLICAND
|
||||
LXI H,MULP3+1; TO ADDR 3RD MULTIPLICAND
|
||||
MOV M,E; 3RD MULTIPLICAND
|
||||
XRA A; CLEAR 6TH PRODUCT
|
||||
MOV E,A; CLEAR 5TH PRODUCT
|
||||
MOV D,A; CLEAR 4TH PRODUCT
|
||||
; MULTIPLY BY EACH ACCUMULATOR
|
||||
; FRACTION IN TURN.
|
||||
LXI H,ACC3; TO ADDRESS 3RD FRCTN
|
||||
CALL MULX2; MULTIPLY BY ACCUM 3RD FRCTN
|
||||
MVI L,LOW(ACC2); TO ADDRESS 2ND FRCTN
|
||||
CALL MULX1; MULTIPLY BY ACCUM 2ND FRCTN
|
||||
MVI L,LOW(ACC1); TO ADDRESS 1ST FRCTN
|
||||
; MULTIPLY BY ONE ACCUMULATOR WORD.
|
||||
MULX1: MOV A,D; 5TH PARTIAL PRODUCT
|
||||
MOV E,C; 4TH PARTIAL PRODUCT
|
||||
MOV D,B; 3RD PARTIAL PRODUCT
|
||||
MULX2: MOV B,M; MULTIPLIER
|
||||
MOV L,A; 5TH PARTIAL PRODUCT
|
||||
XRA A; ZERO
|
||||
MOV C,A; 2ND PARTIAL PRODUCT
|
||||
SUB B; SET CARRY BIT FOR EXIT FLAG
|
||||
JC MULX3; IF MULTIPLIER IS NOT ZERO
|
||||
MOV C,D; 2ND PARTIAL PRODUCT
|
||||
MOV D,E; 3RD PARTIAL PRODUCT
|
||||
RET ; MULT BY ZERO COMPLETE
|
||||
; COMPLETE ADDITION OF MULTIPLICAND.
|
||||
MULX5: MOV C,A; 2ND PARTIAL PRODUCT
|
||||
JNC MULX3; IF NO CARRY TO 1ST PRODUCT
|
||||
INR B; ADD CARRY TO 1ST PRODUCT
|
||||
ANA A ; CLEAR CARRY BIT
|
||||
; LOOP FOR EACH BIT OF MULTIPLIER WORD.
|
||||
MULX3: MOV A,L; 5TH PART PRODUCT, EXIT FLAG
|
||||
ADC A; SHIFT EXIT FLAG OUT IF DONE
|
||||
RZ ; EXIT IF MULTIPLICATION DONE
|
||||
MOV L,A; 5TH PART PRODUCT, EXIT FLAG
|
||||
MOV A,E; 4TH PARTIAL PRODUCT
|
||||
RAL ; SHIFT 4TH PARTIAL PRODUCT
|
||||
MOV E,A; 4TH PARTIAL PRODUCT
|
||||
MOV A,D; 3RD PARTIAL PRODUCT
|
||||
RAL ; SHIFT 3RD PARTIAL PRODUCT
|
||||
MOV D,A; 3RD PARTIAL PRODUCT
|
||||
MOV A,C; 2ND PARTIAL PRODUCT
|
||||
RAL ; SHIFT 2ND PARTIAL PRODUCT
|
||||
MOV C,A; 2ND PARTIAL PRODUCT
|
||||
MOV A,B; 1ST PART PROD AND MULTPLIER
|
||||
RAL ; SHIFT 1ST PROD AND MULTIPLIER
|
||||
MOV B,A; 1ST PART PROD AND MULTIPLIER
|
||||
JNC MULX3; IF NO ADDITION REQUIRED
|
||||
; ADD THE MULTIPLICAND TO THE PRODUCT
|
||||
; IF THE MULTIPLIER BIT IS ONE.
|
||||
MOV A,E; 4TH PARTIAL PRODUCT
|
||||
|
||||
; THE FOLLOWING CODE WAS MOVED FROM THE BEGINNING
|
||||
; OF THE PROGRAM TO THIS LOCATION TO MAKE THINGS
|
||||
; A LITTLE EASIER...
|
||||
|
||||
MULX4:
|
||||
MULP3:
|
||||
ADI 0; ADD OPERAND 3RD FRACTION
|
||||
MOV E,A; 4TH PARTIAL PRODUCT
|
||||
MOV A,D; 3RD PARTIAL PRODUCT
|
||||
MULP2:
|
||||
ACI 0; ADD OPERAND 2ND FRACTION
|
||||
MOV D,A; 3RD PARTIAL PRODUCT
|
||||
MOV A,C; 2ND PARTIAL PRODUCT
|
||||
MULP1:
|
||||
ACI 0; ADD OPERAND 1ST FRACTION
|
||||
|
||||
JMP MULX5
|
||||
; FIXED POINT DIVIDE SUBROUTINE.
|
||||
; SUBTRACT DIVISOR FROM ACCUMULATOR TO
|
||||
; OBTAIN 1ST REMAINDER.
|
||||
DIVX: LXI H,ACC3; TO ADDRESS ACCUM 3RD FRCTN
|
||||
MOV A,M; ACCUMULATOR 3RD FRACTION
|
||||
SUB E; DIVISOR 3RD FRACTION
|
||||
MOV M,A; REMAINDER 3RD FRACTION
|
||||
DCR L; TO ADDRESS ACCUM 2ND FRCTN
|
||||
MOV A,M; ACCUMULATOR 2ND FRACTION
|
||||
SBB D; DIVISOR 2ND FRACTION
|
||||
MOV M,A; REMAINDER 2ND FRACTION
|
||||
DCR L; TO ADDRESS ACCUM 1ST FRCTN
|
||||
MOV A,M; ACCUMULATOR 1ST FRACTION
|
||||
SBB C; DIVISOR 1ST FRACTION
|
||||
MOV M,A; REMAINDER 1ST FRACTION
|
||||
; HALVE THE DIVISOR AND STORE FOR
|
||||
; ADDITION OR SUBTRACTION.
|
||||
MOV A,C; DIVISOR 1ST FRACTION
|
||||
RAL ; SET CARRY BIT
|
||||
MOV A,C; DIVISOR 1ST FRACTION
|
||||
RAR ; HALF OF DIVISOR 1ST FRCTN
|
||||
; + 80H TO CORRECT QUOTIENT
|
||||
LXI H,OP1S+1; TO ADDRESS 1ST SUBTRACT DIVISOR
|
||||
MOV M,A; 1ST SUBTRACT DIVISOR
|
||||
LXI H,OP1A+1; TO ADDRESS 1ST ADD DIVISOR
|
||||
MOV M,A; 1ST ADD DIVISOR
|
||||
MOV A,D; DIVISOR 2ND FRACTION
|
||||
RAR ; HALF OF DIVISOR 2ND FRACTION
|
||||
LXI H,OP2S+1; TO ADDRESS 2ND SUBTRACT DIVISOR
|
||||
MOV M,A; 2ND SUBTRACT DIVISOR
|
||||
LXI H,OP2A+1; TO ADDRESS 2ND ADD DIVISOR
|
||||
MOV M,A; 2ND ADD DIVISOR
|
||||
MOV A,E; DIVISOR 3RD FRACTION
|
||||
RAR ; HALF OF DIVISOR 3RD FRACTION
|
||||
LXI H,OP3S+1; TO ADDRESS 3RD SUBTRACT DIVISOR
|
||||
MOV M,A; 3RD SUBTRACT DIVISOR
|
||||
LXI H,OP3A+1; TO ADDRESS 3RD ADD DIVISOR
|
||||
MOV M,A; 3RD ADD DIVISOR
|
||||
MVI B,0; INIT QUOTIENT 1ST FRCTN
|
||||
MOV A,B; DIVISOR FOURTH FRACTION IS ZERO
|
||||
RAR ; LOW BIT OF DIVISOR 3RD FRACTION
|
||||
LXI H,OP4S+1; TO ADDRESS 4TH SUBTRACT DIVISOR
|
||||
MOV M,A; 4TH SUBTRACT DIVISOR
|
||||
LXI H,OP4A+1; TO ADDRESS 4TH ADD DIVISOR
|
||||
MOV M,A; 4TH ADD DIVISOR
|
||||
LXI H,OP4X+1; TO ADDRESS 4TH ADD DIVISOR
|
||||
MOV M,A; 4TH ADD DIVISOR
|
||||
; LOAD 1ST REMAINDER, CHECK SIGN.
|
||||
LXI H,ACC1; TO ADDR REMAINDER 1ST FRCTN
|
||||
MOV A,M; REMAINDER 1ST FRACTION
|
||||
INR L; TO ADDR REMAINDER 2ND FRCTN
|
||||
MOV D,M; REMAINDER 2ND FRACTION
|
||||
INR L; TO ADDR REMAINDER 3RD FRCTN
|
||||
MOV E,M; REMAINDER 3RD FRACTION
|
||||
ANA A ; SET CONTROL BITS
|
||||
JM DIVX4; IF REMAINDER IS NEGATIVE
|
||||
; ADJUST EXPONENT,POSITION REMAINDER
|
||||
; AND INITIALIZE THE QUOTIENT.
|
||||
MVI L,LOW(ACCE); TO ADDRESS ACCUMULATOR EXPONENT
|
||||
MOV C,M; QUOTIENT EXPONENT
|
||||
INR C; INCREMENT QUOTIENT EXPONENT
|
||||
RZ ; RETURN IF OVERFLOW
|
||||
MOV M,C; QUOTIENT EXPONENT
|
||||
MOV L,E; REMAINDER 3RD FRACTION
|
||||
MOV H,D; REMAINDER 2ND FRACTION
|
||||
MOV E,A; REMAINDER 1ST FRACTION
|
||||
MVI D,1; INITIALIZE QUOT 3RD FRCTN
|
||||
MOV C,B; INITIALIZE QUOT 2ND FRCTN
|
||||
; SUBTRACT THE DIVISOR FROM THE REMAINDER
|
||||
; IF IT IS POSITIVE
|
||||
DIVX1: XRA A; REMAINDER 4TH FRCTN IS ZERO
|
||||
CALL DIVX5;
|
||||
DIVX2: RLC ; SHFT REM 4TH FRCTN TO CY
|
||||
; SHIFT THE REMAINDER LEFT ONE BIT.
|
||||
MOV A,B; QUOTIENT 1ST FRACTION
|
||||
RAL ; MS BIT OF QUOTIENT TO CY
|
||||
RC ; IF DIVISION COMPLETE
|
||||
RAR ; REMAINDER 4TH FRCTN TO CY
|
||||
MOV A,L; REMAINDER 3RD FRACTION
|
||||
RAL ; LEFT SHIFT REM 3RD FRCTN
|
||||
MOV L,A; REMAINDER 3RD FRACTION
|
||||
MOV A,H; REMAINDER 2ND FRACTION
|
||||
RAL ; LEFT SHIFT REM 2ND FRCTN
|
||||
MOV H,A; REMAINDER 2ND FRACTION
|
||||
CALL LSH; CALL LEFT SHIFT SUBROUTINE
|
||||
; BRANCH IF SUBTRACTION IS REQUIRED
|
||||
MOV A,D; QUOTIENT 3RD FRACTION
|
||||
RRC ; REM SIGN INDIC TO CARRY BIT
|
||||
JC DIVX1; TO SUB DIVISOR IF REM POS
|
||||
; ADD THE DIVISOR IF THE REMAINDER
|
||||
; IS NEGATIVE.
|
||||
DIVX3: MOV A,L; REMAINDER 3RD FRACTION
|
||||
JMP DIVX6;
|
||||
; POSITION THE REMAINDER AND INITIALIZE
|
||||
; THE QUOTIENT.
|
||||
DIVX4: MOV L,E; REMAINDER 3RD FRACTION
|
||||
MOV H,D; REMAINDER 2ND FRACTION
|
||||
MOV E,A; REMAINDER 1ST FRACTION
|
||||
MOV D,B; INITIALIZE QUOT 3RD FRCTN
|
||||
MOV C,B; INITIALIZE QUOT 2ND FRCTN
|
||||
JMP DIVX3; ADD DIVISOR IF REM IS NEG
|
||||
; ORIGINALLY, THIS CODE WAS AT THE BEGINNING
|
||||
; OF THE PROGRAM...
|
||||
|
||||
DIVX5:
|
||||
OP4S:
|
||||
SUI 0; SUB DIVISOR 4TH FRACTION
|
||||
MOV A,L; REM 3RD FRACTION
|
||||
OP3S:
|
||||
SBI 0; SUB DIVISOR 3RD FRACTION
|
||||
MOV L,A; REM 3RD FRACTION
|
||||
MOV A,H; REM 2ND FRACTION
|
||||
OP2S:
|
||||
SBI 0; SUB DIVISOR 2ND FRACTION
|
||||
MOV H,A; REM 2ND FRACTION
|
||||
MOV A,E; REM 1ST FRACTION
|
||||
OP1S:
|
||||
SBI 0; SUB DIVISOR 1ST FRACTION
|
||||
MOV E,A; REM 1ST FRACTION
|
||||
OP4A:
|
||||
MVI A,0; REM 4TH FRACTION
|
||||
RET
|
||||
|
||||
DIVX6:
|
||||
OP3A:
|
||||
ADI 0; ADD DIVISOR 3RD FRACTION
|
||||
MOV L,A; REM 3RD FRACTION
|
||||
MOV A,H; REM 2ND FRACTION
|
||||
OP2A:
|
||||
ACI 0; ADD DIVISOR 2ND FRACTION
|
||||
MOV H,A; REM 2ND FRACTION
|
||||
MOV A,E; REM 1ST FRACTION
|
||||
OP1A:
|
||||
ACI 0; ADD DIVISOR 1ST FRACTION
|
||||
MOV E,A; REM 1ST FRACTION
|
||||
OP4X:
|
||||
MVI A,0; REM 4TH FRACTION
|
||||
|
||||
JMP DIVX2
|
||||
|
||||
END
|
||||
Reference in New Issue
Block a user