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2025-10-23 00:14:25 +00:00 · 2020-11-06 18:50:37 +01:00
parent 621ed8ccaf
commit 31738079c4
8481 changed files with 1888323 additions and 0 deletions
--- a/2.2/8800-Manual/CCS_2810_Z80_CPU_1980.pdf
+++ b/2.2/8800-Manual/CCS_2810_Z80_CPU_1980.pdf
--- a/2.2/8800-Manual/MOSS22.PDF
+++ b/2.2/8800-Manual/MOSS22.PDF
--- a/2.2/8800-Manual/MOSS22.TXT
+++ b/2.2/8800-Manual/MOSS22.TXT
--- a/2.2/MOSS22/MOSS22.ASM
+++ b/2.2/MOSS22/MOSS22.ASM
--- a/2.2/MOSS22/MOSS22.HEX
+++ b/2.2/MOSS22/MOSS22.HEX
@@ -0,0 +1,116 @@
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+
--- a/2.2/MOSS22/MOSS22.PRN
+++ b/2.2/MOSS22/MOSS22.PRN
--- a/2.2/MOSS22/MOSS22.SYM
+++ b/2.2/MOSS22/MOSS22.SYM
@@ -0,0 +1,52 @@
+F17D ACT	F33D ACTBL	0015 ALOC	F16E ALT	0009 APLOC
+F173 APT	F178 ART	F103 AS0	F148 AS1	F14E AS2
+F0D3 AS3	F15A AS4	F15E AS5	F0F8 ASGN	F633 BATST
+0000 BC		0007 BELL	F2A8 BITS1	F2A6 BITS2	F2A1 BITS
+F5FE BLK	0013 BLOC	000B BPLOC	F182 BYE	F184 BYE1
+F473 BYTE	F6E8 BYT	F000 CBOOT	F646 CI		0012 CLOC
+F194 CMPA	F1A6 CMPB	F6B5 COMERR	F191 COMP	F68F CONI
+F003 CONIN	F009 CONOUT	F600 CO		F012 CONST	F36E CONV
+000A CPLOC	000D CR		F6A9 CRLF	F6AA CRLFA	F6C2 CRMSG
+F462 CRTIN	F462 CRTOST	F462 CRTOUT	F462 CRTST	F623 CSTS
+0013 CTRLS	F462 CUSI1	F462 CUSO1	F462 CUST1	F5F4 DASH1
+F5F7 DASH	0002 DE		F378 DECHO	F1AF DIS1	F1B7 DIS2
+F1C8 DIS3	F1CF DIS4	F1DB DIS5	F1DD DIS6	F1EA DIS7
+F1AC DISP	F4EE DIV2	0011 DLOC	000D DPLOC	F37E ECH1
+F37B ECHO	0010 ELOC	F462 ENDX	F4F6 EOF	F4FA EOFA
+000C EPLOC	F0DC EX0	F0DF EX1	F0ED EX2	F0D5 EX3
+F0CC EXF	F445 EXIT	F6A4 EXLF	F0D7 EXPR1	F0D9 EXPR
+F386 EXPR3	F097 FAKE	F13C FILL	F13F FIO	0014 FLOC
+000C FMFD	0008 FPLOC	F214 GO0	F21A GO1	F231 GO2
+F239 GO3	F1FD GOTO	F5E6 HEX1	F5EF HEX2	F5D0 HEXN
+F38F HILO	F399 HILOD	F39B HILOXB	F39C HILOX	0004 HL
+0031 HLOC	000F HPLOC	F462 HSP	F462 HSPST	F49F I8250
+F4A8 I8250A	F4AD I8250B	F4BD I8250C	F4C6 I8250D	0003 ILOC
+F05B INIT	F067 INIT1	F0B7 INIT2	F24D INPT	0003 IOBYTE
+F16A IOCHK	F462 IOER	F46C IOMSG	F165 IOSET	0004 IX
+0004 IY		F5DE LADRA	F5FB LADRB	F5E1 LADR	F51B LE1
+F50E LEADER	F511 LEO	000A LF		F00F LIST	0030 LLOC
+0020 LLOCX	F610 LO		F490 LOGMSG	000E LPLOC	F462 LPRST
+F462 LPRT	F669 LSTAT	F462 LUSE1	F462 LUST1	F08A MEMCK
+F094 MEMCK0	F06F MEMSIZ	F076 MEMSZ1	F083 MEMSZ2	F000 MOSS
+F260 MOV1	F25D MOVE	F28F MTEST	F292 MTEST1	F29A MTEST2
+0002 NBKPTS	F3B0 NIBBLE	F255 OUPT	F3C3 P2C	F6F9 PADR
+F6F6 PBADR	F6FE PBYTE	F3C0 PCHK	F47C PEOL	0034 PLOC
+F67C PO		F355 PRMTB	F699 PRTA	F6A2 PRTB	F315 PRTVAL
+F698 PRTWA	F695 PRTWD	F5C8 PSOR	F462 PTRIN	F462 PTRST
+F00C PUNCH	F462 PUSO1	F462 PUSO2	F335 PV1	F336 PV2
+F48C QMSG	F109 QPRT	F52C QUE1	F53A QUE2	F521 QUERY
+F006 READER	F54C READ	F551 RED1	F56C RED2	F581 RED3
+F54F REDO	F3CF REST	F656 RI		F6F0 RIBBLE	F486 RIX
+0002 RLOC	F000 ROM	F3DE RS1	F3EF RS2	F3F6 RS3
+F3FB RS4	F3FC RS5	F419 RS6	F420 RS7	F42C RS8
+F443 RS9	F6B2 RSTER	F6BB RSTMSG	F694 RTS	F462 RUSI1
+F462 RUSI2	F462 RUST1	F462 RUST2	0020 SDATA	0022 SIDENT
+0021 SINTEN	0023 SLCTRL	0017 SLOC	0025 SLSTAT	0024 SMDMCT
+0026 SMDMST	0006 SPSV	F26B SUB1	F284 SUB2	F286 SUB3
+F267 SUBS	F027 TBL	0035 TLOC	0025 TLOCX	F1F7 TRPL1
+F1F5 TRPL2	F1F0 TRPLSP	F6D6 TTOST	F6DE TTPNCH	F6C6 TTST
+F6CE TTYIN	F6DE TTYOUT	F6CE TTYRDR	F10F WINIT	F113 WINITA
+F597 WRI1	F5A9 WRI2	F5B8 WRI3	F58D WRITE	0000 WSVEC
+F2B6 XAA	F2B8 XA		F2C1 XAB	F2C3 XAC	F2E7 XE
+F2E8 XF		F2FF XG		0007 XLOC	F2EC XMNE	F2EF XMNE1
+0005 YLOC
--- a/2.2/Z80LIB/Z80.DOC
+++ b/2.2/Z80LIB/Z80.DOC
@@ -0,0 +1,419 @@
+		Z-80 Macro Library Documentation
+		--------------------------------
+
+I.
+	The purpose of this library is to enable the assembly of the Z-80
+    instruction set on a CP/M sytem using the CP/M MAC macro assembler.
+
+	This library is invoked with the pseudo-op:
+
+		"  MACLIB  Z80  "
+
+II.
+	The following symbols and notations are used in the individual macro
+    descriptions;
+
+	r - Any of the 8 bit registers: A, B, C, D, E, H, L, or M
+	rr - Any of the 16 bit register pairs: BC, DE, HL, or SP
+	nn - 8 bit immediate data (0 through 255)
+	d  - 8 bit signed displacment (-128 through +127)
+	nnnn - 16 bit address or immediate data (0 through 65535)
+	b  - bit number (0-7, 7 is most significant, 0 is least)
+	addr - 16 bit address within PC+127 through PC-128
+	m(zzz) - Memory at address "zzz"
+
+III.
+
+ MACLIB ver.		  Zilog ver		   TDL ver
+--------------		-------------		-------------
+
+LDX	r,d		LD	r,(IX+d)	MOV	r,d(IX)
+    Load register from indexed memory (with IX)
+
+LDY	r,d		LD	r,(IY+d)	MOV	r,d(IY)
+    Load register from indexed memory (with IY)
+
+STX	r,d		LD	(IX+d),r	MOV	d(IX),r
+    Store register to indexed memory (with IX)
+
+STY	r,d		LD	(IY+d),r	MOV	d(IY),r
+    Store register to indexed memory (with IY)
+
+MVIX	nn,d		LD	(IX+d),nn	MVI	d(IX)
+    Move immediate to indexed memory (with IX)
+
+MVIY	nn,d		LD	(IY+d),nn	MVI	d(IY)
+    Move immediate to indexed memory (with IY)
+
+LDAI			LD	A,I		LDAI
+    Move I to A
+
+LDAR			LD	A,R		LDAR
+    Move R to A
+
+STAI			LD	I,A		STAI
+    Move A to I
+
+STAR			LD	R,A		STAR
+    Move A to R
+
+LXIX	nnnn		LD	IX,nnnn		LXI	IX,nnnn
+    Load IX immediate (16 bits)
+
+LXIY	nnnn		LD	IY,nnnn		LXI	IY,nnnn
+    Load IY immediate (16 bits)
+
+LBCD	nnnn		LD	BC,(nnnn)	LBCD	nnnn
+    Load BC direct (from memory at nnnn)
+
+LDED	nnnn		LD	DE,(nnnn)	LDED	nnnn
+    Load DE direct
+
+LSPD	nnnn		LD	SP,(nnnn)	LSPD	nnnn
+    Load SP direct
+
+LIXD	nnnn		LD	IX,(nnnn)	LIXD	nnnn
+    Load IX direct
+
+LIYD	nnnn		LD	IY,(nnnn)	LIYD	nnnn
+    Load IY direct
+
+SBCD	nnnn		LD	(nnnn),BC	SBCD	nnnn
+    Store BC direct (to memory at nnnn)
+
+SDED	nnnn		LD	(nnnn),DE	SDED	nnnn
+    Store DE direct
+
+SSPD	nnnn		LD	(nnnn),SP	SSPD	nnnn
+    Store SP direct
+
+SIXD	nnnn		LD	(nnnn),IX	SIXD	nnnn
+    Store IX direct
+
+SIYD	nnnn		LD	(nnnn),IY	SIYD	nnnn
+    Store IY direct
+
+SPIX			LD	SP,IX		SPIX
+    Copy IX to the SP
+
+SPIY			LD	SP,IY		SPIY
+    Copy IY to the SP
+
+PUSHIX			PUSH	IX		PUSH	IX
+    Push IX into the stack
+
+PUSHIY			PUSH	IY		PUSH	IY
+    Push IY into the stack
+
+POPIX			POP	IX		POP	IX
+    Pop IX from the stack
+
+POPIY			POP	IY		POP	IY
+    Pop IY from the stack
+
+EXAF			EX	AF,AF'		EXAF
+    Exchange AF and the alternate, AF'
+
+EXX			EXX			EXX
+    Exchange BC DE HL with BC' DE' HL'
+
+XTIX			EX	(SP),IX		XTIX
+    Exchange IX with the top of the stack
+
+XTIY			EX	(SP),IY		XTIY
+    Exchange IY with the top of the stack
+
+LDI			LDI			LDI
+    Move m(HL) to m(DE), increment DE and HL, decrement BC
+
+LDIR			LDIR			LDIR
+    Repeat LDI until BC = 0
+
+LDD			LDD			LDD
+    Move m(HL) to m(DE), decrement HL, DE, and BC
+
+LDDR			LDDR			LDDR
+    Repeat LDD until BC = 0
+
+CCI			CPI			CCI
+    Compare A with m(HL), increment HL, decrement BC
+
+CCIR			CPIR			CCIR
+    Repeat CCI until BC = 0  or  A = m(HL)
+
+CCD			CPD			CCD
+    Compare A with m(HL), decrement HL and BC
+
+CCDR			CPDR			CCDR
+    Repeat CCD until BC = 0 or A = m(HL)
+
+ADDX	d		ADD	(IX+d)		ADD	d(IX)
+    Indexed add to A
+
+ADDY	d		ADD	(IY+d)		ADD	d(IY)
+    Indexed add to A
+
+ADCX	d		ADC	(IX+d)		ADC	d(IX)
+    Indexed add with carry
+
+ADCY	d		ADC	(IY+d)		ADC	d(IY)
+    Indexed add with carry
+
+SUBX	d		SUB	(IX+d)		SUB	d(IX)
+    Indexed subtract
+
+SUBY	d		SUB	(IY+d)		SUB	d(IY)
+    Indexed Subtract
+
+SBCX	d		SBC	(IX+d)		SBB	d(IX)
+    Indexed subtract with "borrow"
+
+SBCY	d		SBC	(IY+d)		SBB	d(IY)
+    Indexed subtract with borrow
+
+ANDX	d		AND	(IX+d)		ANA	d(IX)
+    Indexed logical and
+
+ANDY	d		AND	(IY+d)		ANA	d(IY)
+    Indexed logical and
+
+XORX	d		XOR	(IX+d)		XRA	d(IX)
+    Indexed logical exclusive or
+
+XORY	d		XOR	(IY+d)		XRA	d(IY)
+    Indexed logical exclusive or
+
+ORX	d		OR	(IX+d)		ORA	d(IX)
+    Indexed logical or
+
+ORY	d		OR	(IY+d)		ORA	d(IY)
+    Indexed logical exclusive or
+
+CMPX	d		CP	(IX+d)		CMP	d(IX)
+    Indexed compare
+
+CMPY	d		CP	(IY+d)		CMP	d(IY)
+    Index compare
+
+INRX	d		INC	(IX+d)		INR	d(IX)
+    Increment memory at m(IX+d)
+
+INRY	d		INC	(IY+d)		INR	d(IY)
+    Increment memory at m(IY+d)
+
+DCRX	d		INC	(IX+d)		INR	d(IX)
+    Decrement memory at m(IX+d)
+
+DCRY	d		DEC	(IY+d)		DCR	d(IY)
+    Decrement memory at m(IX+d)
+
+NEG			NEG			NEG
+    Negate A (two's complement)
+
+IM0			IM0			IM0
+    Set interrupt mode 0
+
+IM1			IM1			IM1
+    Set interrupt mode 1
+
+IM2			IM2			IM2
+    Set interrupt mode 2
+
+DADC	rr		ADC	HL,rr		DADC	rr
+    Add with carry rr to HL
+
+DSBC	rr		SBC	HL,rr		DSBC	rr
+    Subtract with "borrow" rr from HL
+
+DADX	rr		ADD	IX,rr		DADX	rr
+    Add rr to IX (rr may be BC, DE, SP, IX)
+
+DADY	rr		ADD	IY,rr		DADY	rr
+    Add rr to IY (rr may be BC, DE, SP, IY)
+
+INXIX			INC	IX		INX	IX
+    Increment IX
+
+INXIY			INC	IY		INX	IY
+    Increment IY
+
+DCXIX			DEC	IX		DCX	IX
+    Decrement IX
+
+DCXIY			DEC	IY		DCX	IY
+    Decrement IY
+
+BIT	b,r		BIT	b,r		BIT	b,r
+    Test bit b in register r
+
+SETB	b,r		SET	b,r		SET	b,r
+    Set bit b in register r
+
+RES	b,r		RES	b,r		RES	b,r
+    Reset bit b in register r
+
+BITX	b,d		BIT	b,(IX+d)	BIT	b,d(IX)
+    Test bit b in memory at m(IX+d)
+
+BITY	b,d		BIT	b,(IY+d)	BIT	b,d(IY)
+    Test bit b in memory at m(IY+d)
+
+SETX	b,d		SET	b,(IX+d)	SET	b,d(IX)
+    Set bit b in memory at m(IX+d)
+
+SETY	b,d		SET	b,(IY+d)	SET	b,d(IY)
+    Set bit b in memory at m(IY+d)
+
+RESX	b,d		RES	b,(IX+d)	RES	b,d(IX)
+    Reset bit b in memory at m(IX+d)
+
+RESY	b,d		RES	b,(IY+d)	RES	b,d(IY)
+    Reset bit b in memory at m(IY+d)
+
+JR	addr		JR	addr-$		JMPR	addr
+    Jump relative unconditional
+
+JRC	addr		JR	C,addr-$	JRC	addr
+    Jump relative if Carry indicator true
+
+JRNC	addr		JR	NC,addr-$	JRNC	addr
+    Jump relative if carry indicator false
+
+JRZ	addr		JR	Z,addr-$	JRC	addr
+    Jump relative if Zero indicator true
+
+JRNZ	addr		JR	NZ,addr-$	JRNZ	addr
+    Jump relative if Zero indicator false
+
+DJNZ	addr		DJNZ	addr-$		DJNZ	addr
+    Decrement B, jump relative if non-zero
+
+PCIX			JMP	(IX)		PCIX
+    Jump to address in IX ie, Load PC from IX
+
+PCIY			JMP	(IY)		PCIY
+    Jump to address in IY
+
+RETI			RETI			RETI
+    Return from interrupt
+
+RETN			RETN			RETN
+    Return from non-maskable interrupt
+
+INP	r		IN	r,(C)		INP	r
+    Input from port C to register r
+
+OUTP	r		OUT	(C),r		OUTP	r
+    Output from register r to port (C)
+
+INI			INI			INI
+    Input from port (C) to m(HL), increment HL, decrement b
+
+INIR			INIR			INIR
+    Input from port (C) to m(HL), increment HL, decrement B, repeat if B <> 0
+
+OUTI			OTI			OUTI
+    Output from m(HL) to port (C), increment HL, decrement B
+
+OUTIR			OTIR			OUTIR
+    Repeat OUTI until B = 0
+
+IND			IND			IND
+    Input from port (C) to m(HL), decrement HL & B
+
+INDR			INDR			INDR
+    Repeat IND until B = 0
+
+OUTD			OTD			OUTD
+    Output from m(HL) to port (C), decrement HL & B
+
+OUTDR			OTDR			OUTDR
+    Repeat OUTD until B = 0
+
+RLCR	r		RLC	r		RLCR	r
+    Rotate left circular register
+
+RLCX	d		RLC	(IX+d)		RLCR	d(IX)
+    Rotate left circular indexed memory
+
+RLCY	d		RLC	(IY+d)		RLCR	d(IY)
+    Rotate left circular indexed memory
+
+RALR	r		RL	r		RALR	r
+    Rotate left arithmetic register
+
+RALX	d		RL	(IX+d)		RALR	d(IX)
+    Rotate left arithmetic indexed memory
+
+RALY	d		RL	(IY+d)		RALR	d(IY)
+    Rotate left arithmetic indexed memory
+
+RRCR	r		RRC	r		RRCR	r
+    Rotate right circular register
+
+RRCX	d		RRC	(IX+d)		RRCR	d(IX)
+    Rotate right circular indexed
+
+RRCY	d		RRC	(IY+d)		RRCR	d(IY)
+    Rotate right circular indexed
+
+RARR	r		RR	r		RARR	r
+    Rotate right arithmetic register
+
+RARX	d		RR	(IX+d)		RARR	d(IX)
+    Rotate right arithmetic indexed memory
+
+RARY	d		RR	(IY+d)		RARR	d(IY)
+    Rotate right arithmetic indexed memory
+
+SLAR	r		SLA	r		SLAR	r
+    Shift left register
+
+SLAX	d		SLA	(IX+d)		SLAR	d(IX)
+    Shift left indexed memory
+
+SLAY	d		SLA	(IY+d)		SLAR	d(IY)
+    Shift left indexed memory
+
+SRAR	r		SRA	r		SRAR	r
+    Shift right arithmetic register
+
+SRAX	d		SRA	(IX+d)		SRAR	d(IX)
+    Shift right arithmetic indexed memory
+
+SRAY	d		SRA	(IY+d)		SRAR	d(IY)
+    Shift right arithmetic indexed memory
+
+SRLR	r		SRL	r		SRLR	r
+    Shift right logical register
+
+SRLX	d		SRL	(IX+d)		SRLR	d(IX)
+    Shift right logical indexed memory
+
+SRLY	d		SRL	(IY+d)		SRLR	d(IY)
+    Shift right logical indexed memory
+
+RLD			RLD			RLD
+    Rotate left digit
+
+RRD			RRD			RRD
+    Rotate right digit
+
+HK	?D
+	DB	0FDH, 0CBH, ?D, 16H
+	ENDM
+RRCR	MACRO	?R	
+	DB	0CBH, 08H + ?R
+	ENDM
+RRCX	MACRO	?D	
+	@CHK	?D
+	DB	0DDH, 0CBH, ?D, 0EH
+	ENDM
+RRCY	MACRO	?D	
+	@CHK	?D
+	DB	0FDH, 0CBH, ?D, 0EH
+	ENDM
+RARR	MACRO	?R	
+	DB	0CBH, 18H + ?R
+	ENDM
+RARX	MACRO	?D	
--- a/2.2/Z80LIB/Z80.LIB
+++ b/2.2/Z80LIB/Z80.LIB
@@ -0,0 +1,630 @@
+;;
+;;	Z-80 MACRO LIBRARY
+;;
+;;    THE FOLLOWING MACROS ENABLE ASSEMBLING Z-80 INSTRUCTIONS
+;;    WITH THE DIGITAL RESEARCH MACRO ASSEMBLER.
+;;
+;;  INVOKE WITH "MACLIB Z80"
+;;
+;;
+;;  Macro's added to support Z80 Opcodes by Garry Kraemer - Senior Software Engineer
+;;
+;;
+;;			MACRO FORMATS
+;;			----- -------
+;;
+;;
+;;	MACRO			ZILOG			TDL
+;;	-----			-----			---
+;;
+;;	LDX	R,D		LD	R,(IX+D)	MOV	R,D(IX)
+;;	LDY	R,D		LD	R,(IY+D)	MOV	R,D(IY)
+;;	STX	R,D		LD	(IX+D),R	MOV	D(IX),R
+;;	STY	R,D		LD	(IY+D),R	MOV	D(IY),R
+;;	MVIX	NN,D		LD	(IX+D),NN	MVI	D(IX)
+;;	MVIY	NN,D		LD	(IY+D),NN	MVI	D(IY)
+;;	LDAI			LD	A,I		LDAI
+;;	LDAR			LD	A,R		LDAR
+;;	STAI			LD	I,A		STAI
+;;	STAR			LD	R,A		STAR
+;;	LXIX	NNNN		LD	IX,NNNN		LXI	IX,NNNN
+;;	LXIY	NNNN		LD	IY,NNNN		LXI	IY,NNNN
+;;	LBCD	NNNN		LD	BC,(NNNN)	LBCD	NNNN
+;;	LDED	NNNN		LD	DE,(NNNN)	LDED	NNNN
+;;	LSPD	NNNN		LD	SP,(NNNN)	LSPD	NNNN
+;;	LIXD	NNNN		LD	IX,(NNNN)	LIXD	NNNN
+;;	LIYD	NNNN		LD	IY,(NNNN)	LIYD	NNNN
+;;	SBCD	NNNN		LD	(NNNN),BC	SBCD	NNNN
+;;	SDED	NNNN		LD	(NNNN),DE	SDED	NNNN
+;;	SSPD	NNNN		LD	(NNNN),SP	SSPD	NNNN
+;;	SIXD	NNNN		LD	(NNNN),IX	SIXD	NNNN
+;;	SIYD	NNNN		LD	(NNNN),IY	SIYD	NNNN
+;;	SPIX			LD	SP,IX		SPIX
+;;	SPIY			LD	SP,IY		SPIY
+;;	PUSHIX			PUSH	IX		PUSH	IX
+;;	PUSHIY			PUSH	IY		PUSH	IY
+;;	POPIX			POP	IX		POP	IX
+;;	POPIY			POP	IY		POP	IY
+;;	EXAF			EX	AF,AF'		EXAF
+;;	EXX			EXX			EXX
+;;	XTIX			EX	(SP),IX		XTIX
+;;	XTIY			EX	(SP),IY		XTIY
+;;	LDI			LDI			LDI
+;;	LDIR			LDIR			LDIR
+;;	LDD			LDD			LDD
+;;	LDDR			LDDR			LDDR
+;;	CCI			CPI			CCI
+;;	CCIR			CPIR			CCIR
+;;	CCD			CPD			CCD
+;;	CCDR			CPDR			CCDR
+;;	ADDX	D		ADD	(IX+D)		ADD	D(IX)
+;;	ADDY	D		ADD	(IY+D)		ADD	D(IY)
+;;	ADCX	D		ADC	(IX+D)		ADC	D(IX)
+;;	ADCY	D		ADC	(IY+D)		ADC	D(IY)
+;;	SUBX	D		SUB	(IX+D)		SUB	D(IX)
+;;	SUBY	D		SUB	(IY+D)		SUB	D(IY)
+;;	SBCX	D		SBC	(IX+D)		SBB	D(IX)
+;;	SBCY	D		SBC	(IY+D)		SBB	D(IY)
+;;	ANDX	D		AND	(IX+D)		ANA	D(IX)
+;;	ANDY	D		AND	(IY+D)		ANA	D(IY)
+;;	XORX	D		XOR	(IX+D)		XRA	D(IX)
+;;	XORY	D		XOR	(IY+D)		XRA	D(IY)
+;;	ORX	D		OR	(IX+D)		ORA	D(IX)
+;;	ORY	D		OR	(IY+D)		ORA	D(IY)
+;;	CMPX	D		CP	(IX+D)		CMP	D(IX)
+;;	CMPY	D		CP	(IY+D)		CMP	D(IY)
+;;	INRX	D		INC	(IX+D)		INR	D(IX)
+;;	INRY	D		INC	(IY+D)		INR	D(IY)
+;;	DCRX	D		INC	(IX+D)		INR	D(IX)
+;;	DCRY	D		DEC	(IY+D)		DCR	D(IY)
+;;	NEG			NEG			NEG
+;;	IM0			IM0			IM0
+;;	IM1			IM1			IM1
+;;	IM2			IM2			IM2
+;;	DADC	RR		ADC	HL,RR		DADC	RR
+;;	DSBC	RR		SBC	HL,RR		DSBC	RR
+;;	DADX	RR		ADD	IX,RR		DADX	RR
+;;	DADY	RR		ADD	IY,RR		DADY	RR
+;;	INXIX			INC	IX		INX	IX
+;;	INXIY			INC	IY		INX	IY
+;;	DCXIX			DEC	IX		DCX	IX
+;;	DCXIY			DEC	IY		DCX	IY
+;;	BIT	B,R		BIT	B,R		BIT	B,R
+;;	SETB	B,R		SET	B,R		SET	B,R
+;;	RES	B,R		RES	B,R		RES	B,R
+;;	BITX	B,D		BIT	B,(IX+D)	BIT	B,D(IX)
+;;	BITY	B,D		BIT	B,(IY+D)	BIT	B,D(IY)
+;;	SETX	B,D		SET	B,(IX+D)	SET	B,D(IX)
+;;	SETY	B,D		SET	B,(IY+D)	SET	B,D(IY)
+;;	RESX	B,D		RES	B,(IX+D)	RES	B,D(IX)
+;;	RESY	B,D		RES	B,(IY+D)	RES	B,D(IY)
+;;	JR	ADDR		JR	ADDR-$		JMPR	ADDR
+;;	JRC	ADDR		JR	C,ADDR-$	JRC	ADDR
+;;	JRNC	ADDR		JR	NC,ADDR-$	JRNC	ADDR
+;;	JRZ	ADDR		JR	Z,ADDR-$	JRC	ADDR
+;;	JRNZ	ADDR		JR	NZ,ADDR-$	JRNZ	ADDR
+;;	DJNZ	ADDR		DJNZ	ADDR-$		DJNZ	ADDR
+;;	PCIX			JMP	(IX)		PCIX
+;;	PCIY			JMP	(IY)		PCIY
+;;	RETI			RETI			RETI
+;;	RETN			RETN			RETN
+;;	INP	R		IN	R,(C)		INP	R
+;;	OUTP	R		OUT	(C),R		OUTP	R
+;;	INI			INI			INI
+;;	INIR			INIR			INIR
+;;	OUTI			OTI			OUTI
+;;	OUTIR			OTIR			OUTIR
+;;	IND			IND			IND
+;;	INDR			INDR			INDR
+;;	OUTD			OTD			OUTD
+;;	OUTDR			OTDR			OUTDR
+;;	RLCR	R		RLC	R		RLCR	R
+;;	RLCX	D		RLC	(IX+D)		RLCR	D(IX)
+;;	RLCY	D		RLC	(IY+D)		RLCR	D(IY)
+;;	RALR	R		RL	R		RALR	R
+;;	RALX	D		RL	(IX+D)		RALR	D(IX)
+;;	RALY	D		RL	(IY+D)		RALR	D(IY)
+;;	RRCR	R		RRC	R		RRCR	R
+;;	RRCX	D		RRC	(IX+D)		RRCR	D(IX)
+;;	RRCY	D		RRC	(IY+D)		RRCR	D(IY)
+;;	RARR	R		RR	R		RARR	R
+;;	RARX	D		RR	(IX+D)		RARR	D(IX)
+;;	RARY	D		RR	(IY+D)		RARR	D(IY)
+;;	SLAR	R		SLA	R		SLAR	R
+;;	SLAX	D		SLA	(IX+D)		SLAR	D(IX)
+;;	SLAY	D		SLA	(IY+D)		SLAR	D(IY)
+;;	SRAR	R		SRA	R		SRAR	R
+;;	SRAX	D		SRA	(IX+D)		SRAR	D(IX)
+;;	SRAY	D		SRA	(IY+D)		SRAR	D(IY)
+;;	SRLR	R		SRL	R		SRLR	R
+;;	SRLX	D		SRL	(IX+D)		SRLR	D(IX)
+;;	SRLY	D		SRL	(IY+D)		SRLR	D(IY)
+;;	RLD			RLD			RLD
+;;	RRD			RRD			RRD
+;;
+;;******************************************************************
+;;
+;;	@CHK MACRO USED FOR CHECKING 8 BIT DISPLACMENTS
+;;
+@CHK	MACRO	?DD	;; USED FOR CHECKING RANGE OF 8-BIT DISP.S
+	IF (?DD GT 07FH) AND (?DD LT 0FF80H)
+ 'DISPLACEMENT RANGE ERROR - Z80 LIB'
+	ENDIF
+	ENDM
+@CHECK	MACRO	?N
+	?DD	SET ?N-$-2
+	IF (?DD GT 07FH) AND (?DD LT 0FF80H)
+'RANGE ERROR - Z80 LIB'
+	?DD	SET	0FEH
+	ENDIF 
+	ENDM
+;;
+;;
+LDX	MACRO	?R,?D		;;LOAD REG R FROM MEMORY AT (IX+D)
+	@CHK	?D
+	DB	0DDH,?R*8+46H,?D
+	ENDM
+LDY	MACRO	?R,?D		;;LOAD REG R FROM MEMORY AT (IY+D)
+	@CHK	?D
+	DB	0FDH,?R*8+46H,?D
+	ENDM
+STX	MACRO	?R,?D		;;STORE REG R AT MEMORY (IX+D)
+	@CHK	?D
+	DB	0DDH,70H+?R,?D
+	ENDM
+STY	MACRO	?R,?D		;;STORE REG R AT MEMORY (IY+D)
+	@CHK	?D
+	DB	0FDH,70H+?R,?D
+	ENDM
+MVIX	MACRO	?N,?D		;;MOV #N (8 BITS) INTO MEMORY AT (IX+D)
+	@CHK	?D
+	DB	0DDH,36H,?D,?N
+	ENDM
+MVIY	MACRO	?N,?D		;;MOV #N (8 BITS) INTO MEMORY AT (IY+D)
+	@CHK	?D
+	DB	0FDH,36H,?D,?N
+	ENDM
+LDAI	MACRO			;;LOAD ACC WITH REG I (INTERRUPT VECTOR)
+	DB	0EDH,57H
+	ENDM
+LDAR	MACRO			;;LOAD ACC WITH THE REFRESH REG
+	DB	0EDH,5FH
+	ENDM
+STAI	MACRO			;;STORE ACC INTO REG I
+	DB	0EDH,47H
+	ENDM
+STAR	MACRO			;;STORE ACC INTO THE REFRESH REG
+	DB	0EDH,4FH
+	ENDM
+LXIX	MACRO	?NNNN		;;LOAD IMMEDIATE (LDI) IX WITH #NNNN (16 BITS)
+	DB	0DDH,21H
+	DW	?NNNN
+	ENDM
+LXIY	MACRO	?NNNN		;;LDI REG PAIR IY WITH #NNNN (16 BITS)
+	DB	0FDH,21H
+	DW	?NNNN
+	ENDM
+LDED	MACRO	?NNNN		;;LOAD DE WITH CONTENTS OF MEMORY AT NNNN
+	DB	0EDH,5BH	;;  (E)=((NN)(NN))
+	DW	?NNNN		;;  (D)=((NN)(NN+1))
+	ENDM
+LBCD	MACRO	?NNNN		;;LOAD BC WITH CONTENTS OF MEMORY AT NNNN
+	DB	0EDH,4BH
+	DW	?NNNN
+	ENDM
+LSPD	MACRO	?NNNN		;;LOAD STACK POINTER WITH CONTENTS OF MEMORY
+	DB	0EDH,07BH	;;  AT NNNN
+	DW	?NNNN
+	ENDM
+LIXD	MACRO	?NNNN		;;LOAD IX WITH CONTENTS OF MEMORY AT NNNN
+	DB	0DDH,2AH
+	DW	?NNNN
+	ENDM
+LIYD	MACRO	?NNNN		;;LOAD IY WITH CONTENTS OF MEMORY AT NNNN
+	DB	0FDH,2AH
+	DW	?NNNN
+	ENDM
+SBCD	MACRO	?NNNN		;;STORE BC IN MEMORY LOCATION NNNN
+	DB	0EDH,43H	;;  ((NN)(NN))=(C)
+	DW	?NNNN		;;  ((NN)(NN+1))=(B)
+	ENDM
+SDED	MACRO	?NNNN		;;STORE DE IN MEMORY LOC NNNN
+	DB	0EDH,53H
+	DW	?NNNN
+	ENDM
+SSPD	MACRO	?NNNN		;;STORE STACK POINTER IN MEMORY LOC NNNN
+	DB	0EDH,73H
+	DW	?NNNN
+	ENDM
+SIXD	MACRO	?NNNN		;;STORE IX IN MEMORY LOC NNNN
+	DB	0DDH,22H
+	DW	?NNNN
+	ENDM
+SIYD	MACRO	?NNNN		;;STORE IY IN MEMORY LOC NNNN
+	DB	0FDH,22H
+	DW	?NNNN
+	ENDM
+SPIX	MACRO			;;MOV IX INTO STACK POINTER (SP)
+	DB	0DDH,0F9H
+	ENDM
+SPIY	MACRO			;;MOV IY INTO STACK POINTER (SP)
+	DB	0FDH,0F9H
+	ENDM
+PUSHIX	MACRO			;;PUSH IX ONTO STACK
+	DB	0DDH,0E5H
+	ENDM
+PUSHIY	MACRO			;;PUSH IY ONTO STACK
+	DB	0FDH,0E5H
+	ENDM
+POPIX	MACRO			;;POP IX OFF STACK
+	DB	0DDH,0E1H
+	ENDM
+POPIY	MACRO			;;POP IY OFF STACK
+	DB	0FDH,0E1H
+	ENDM
+EXAF	MACRO			;;EXCHANGE AF AND AF' REGS
+	DB	08H
+	ENDM
+EXX	MACRO			;;EXCHANGE BC AND BC'
+	DB	0D9H		;;         DE AND DE'
+				;;	  HL AND HL'
+	ENDM
+XTIX	MACRO			;;EXCHANGE TOP OF STACK WITH IX
+	DB	0DDH,0E3H
+	ENDM
+XTIY	MACRO			;;EXCHANGE TOP OF STACK WITH IY
+	DB	0FDH,0E3H
+	ENDM
+
+LDI	MACRO			;;LOAD MEMORY AT (H,L) TO MEMORY AT (D,E)
+	DB	0EDH,0A0H	;;  INC D,E   INC H,L  DEC B,C
+	ENDM
+LDIR	MACRO			;;AS ABOVE REPEAT UNTIL B=0
+	DB	0EDH,0B0H
+	ENDM
+LDD	MACRO			;;LOAD MEMORY AT (H,L) TO MEMORY AT (D,E)
+	DB	0EDH,0A8H	;;  DEC H,L  DEC D,E  DEC B,C
+	ENDM
+LDDR	MACRO			;;AS ABOVE REPEAT UNTIL B=0
+	DB	0EDH,0B8H
+	ENDM
+CCI	MACRO			;;COMPARE ACC WITH MEMORY AT (H,L)
+	DB	0EDH,0A1H	;;  INC H,L  DEC B,C  (P/V=0 IF B=0)
+				;;  (ACC=(H,L) IF Z=0)
+	ENDM
+CCIR	MACRO			;;AS ABOVE REPEAT UNTIL (B,C) = 0 OR
+				;;	(A) = (H,L)
+	DB	0EDH,0B1H
+	ENDM
+CCD	MACRO			;;COMPARE ACC WITH MEMORY AT (H,L)
+	DB	0EDH,0A9H	;;  DEC H,L  DEC B,C
+	ENDM
+CCDR	MACRO			;;AS ABOVE REPEAT UNTIL (BC) = 0 OR
+				;;	(A) = (H,L)
+	DB	0EDH,0B9H
+	ENDM
+ADDX	MACRO	?D		;;ACC=ACC+CONTENTS OF MEMORY AT (IX+D)
+	@CHK	?D		;;  ACC=ACC+((IX+D))
+	DB	0DDH,86H,?D
+	ENDM
+ADDY	MACRO	?D		;;ACC=ACC+((IY+D))
+	@CHK	?D
+	DB	0FDH,86H,?D
+	ENDM
+ADCX	MACRO	?D		;;ACC=ACC+((IX+D))+CARRY
+	@CHK	?D
+	DB	0DDH,8EH,?D
+	ENDM
+ADCY	MACRO	?D		;;ACC=ACC+((IY+D))+CARRY
+	@CHK	?D
+	DB	0FDH,8EH,?D
+	ENDM
+SUBX	MACRO	?D		;;ACC=ACC-((IX+D))
+	@CHK	?D
+	DB	0DDH,96H,?D
+	ENDM
+SUBY	MACRO	?D		;;ACC=ACC-((IY+D))
+	@CHK	?D
+	DB	0FDH,96H,?D
+	ENDM
+SBCX	MACRO	?D		;;ACC=ACC-((IX+D))-BORROW
+	@CHK	?D
+	DB	0DDH,9EH,?D
+	ENDM
+SBCY	MACRO	?D		;;ACC=ACC-((IY+D))-BORROW
+	@CHK	?D
+	DB	0FDH,9EH,?D
+	ENDM
+ANDX	MACRO	?D		;;AND ACC WITH CONTENTS OF MEMORY (IX+D)
+	@CHK	?D
+	DB	0DDH,0A6H,?D
+	ENDM
+ANDY	MACRO	?D		;;AND ACC WITH CONTENTS OF MEMORY (IY+D)
+	@CHK	?D
+	DB	0FDH,0A6H,?D
+	ENDM
+XORX	MACRO	?D		;;EXCLUSIVE OR THE ACC WITH CONTEMTS OF
+	@CHK	?D		;;  MEMORY AT (IX+D)
+	DB	0DDH,0AEH,?D
+	ENDM
+XORY	MACRO	?D		;;XOR ACC WITH CONTENTS OF MEMORY (IY+D)
+	@CHK	?D
+	DB	0FDH,0AEH,?D
+	ENDM
+ORX	MACRO	?D		;;OR THE ACC WITH CONTENTS OF MEMORY (IX+D)
+	@CHK	?D
+	DB	0DDH,0B6H,?D
+	ENDM
+ORY	MACRO	?D		;;OR ACC WITH CONTENTS OF MEMORY (IY+D)
+	@CHK	?D
+	DB	0FDH,0B6H,?D
+	ENDM
+CMPX	MACRO	?D		;;COMPARE THE ACC WITH CONTENTS OF MEMORY
+	@CHK	?D		;;  AT LOC (IX+D)
+	DB	0DDH,0BEH,?D
+	ENDM
+CMPY	MACRO	?D		;;CMP ACC WITH CONTENTS OF MEMORY (IY+D)
+	@CHK	?D
+	DB	0FDH,0BEH,?D
+	ENDM
+INRX	MACRO	?D		;;INC MEMORY CONTENTS AT (IX+D)
+	@CHK	?D
+	DB	0DDH,34H,?D
+	ENDM
+INRY	MACRO	?D		;;INC MEMORY CONTENTS AT (IY+D)
+	@CHK	?D
+	DB	0FDH,34H,?D
+	ENDM
+DCRX	MACRO	?D		;;DEC MEMORY CONTENTS AT (IX+D)
+	@CHK	?D
+	DB	0DDH,035H,?D
+	ENDM
+DCRY	MACRO	?D		;;DEC MEMORY CONTENTS AT (IY+D)
+	@CHK	?D
+	DB	0FDH,35H,?D
+	ENDM
+NEG	MACRO			;;NEGATE ACC (2'S COMPLEMENT)
+	DB	0EDH,44H
+	ENDM
+IM0	MACRO			;;SET INTERRUPT MODE #0
+	DB	0EDH,46H
+	ENDM
+IM1	MACRO			;;SET INTERRUPT MODE #1 (RESTART 0038H)
+	DB	0EDH,56H
+	ENDM
+IM2	MACRO			;;SET INTERRUPT MODE #2 
+	DB	0EDH,5EH	;;   RESTART AT LOC (INT REG I)(DEV SUPPLIED)
+	ENDM
+BC	EQU	0
+DE	EQU	2
+HL	EQU	4
+IX	EQU	4	
+IY	EQU	4	
+DADC	MACRO	?R		;;DOUBLE ADD (H,L)=(H,L)+(RP)+CARRY
+	DB	0EDH,?R*8+4AH
+	ENDM
+DSBC	MACRO	?R		;;DOUBLE SUB (H,L)=(H,L)-(RP)-CARRY
+	DB	0EDH,?R*8+42H
+	ENDM
+DADX	MACRO	?R		;;DOUBLE ADD (IX)=(IX)+(RP)
+	DB	0DDH,?R*8+09H
+	ENDM
+DADY	MACRO	?R		;;DOUBLE ADD (IY)=(IY)+(RP)
+	DB	0FDH,?R*8+09H
+	ENDM
+INXIX	MACRO			;;INC (IX)
+	DB	0DDH,23H
+	ENDM
+INXIY	MACRO			;;INC (IY)
+	DB	0FDH,23H
+	ENDM
+DCXIX	MACRO			;;DEC (IX)
+	DB	0DDH,2BH
+	ENDM
+DCXIY	MACRO			;;DEC (IY)
+	DB	0FDH,2BH
+	ENDM
+BIT	MACRO	?N,?R		;;TEST BIT N IN REG R
+	DB	0CBH,?N*8+?R+40H
+	ENDM
+SETB	MACRO	?N,?R		;;SET BIT N IN REG R
+	DB	0CBH,?N*8+?R+0C0H
+	ENDM
+RES	MACRO	?N,?R		;;RESET BIT N IN REG R
+	DB	0CBH,?N*8+?R+80H
+	ENDM
+BITX	MACRO	?N,?D		;;TEST BIT N IN MEMORY LOC (IX+D)
+	@CHK	?D
+	DB	0DDH,0CBH,?D,?N*8+46H
+	ENDM
+BITY	MACRO	?N,?D		;;TEST BIT N IN MEMORY LOC (IY+D)
+	@CHK	?D
+	DB	0FDH,0CBH,?D,?N*8+46H
+	ENDM
+SETX	MACRO	?N,?D		;;SET BIT N IN MEMORY LOC (IX+D)
+	@CHK	?D
+	DB	0DDH,0CBH,?D,?N*8+0C6H
+	ENDM
+SETY	MACRO	?N,?D		;;SET BIT N IN MEMORY LOC (IY+D)
+	@CHK	?D
+	DB	0FDH,0CBH,?D,?N*8+0C6H
+	ENDM
+RESX	MACRO	?N,?D		;;RESET BIT N IN MEMORY LOC (IX+D)
+	@CHK	?D
+	DB	0DDH,0CBH,?D,?N*8+86H
+	ENDM
+RESY	MACRO	?N,?D		;;RESET BIT N IN MEMORY LOC (IY+D)
+	@CHK	?D
+	DB	0FDH,0CBH,?D,?N*8+86H
+	ENDM
+JR	MACRO	?N		;;JUMP RELATIVE 
+	@CHECK  ?N
+	DB	18H,?DD
+	ENDM
+JMPR	MACRO	?N		;;JUMP RELATIVE AS ABOVE
+	@CHECK 	?N
+	DB 	18H,?DD
+	ENDM
+JRC	MACRO	?N		;;JUMP RELATIVE ON CARRY
+	@CHECK	?N
+	DB	38H,?DD
+	ENDM
+JRNC	MACRO	?N		;;JUMP RELATIVE ON NOT CARRY
+	@CHECK	?N
+	DB	30H,?DD
+	ENDM
+JRZ	MACRO	?N		;;JUMP RELATIVE ON ZERO
+	@CHECK	?N
+	DB	28H,?DD
+	ENDM
+JRNZ	MACRO	?N		;;JUMP RELATIVE ON NOT ZERO
+	@CHECK	?N
+	DB	20H,?DD
+	ENDM
+DJNZ	MACRO	?N		;;DEC B AND JUMP RELATIVE ON B NOT ZERO
+	@CHECK	?N
+	DB	10H,?DD
+	ENDM
+PCIX	MACRO			;;MOV IX INTO PROGRAM COUNTER
+	DB	0DDH,0E9H
+	ENDM
+PCIY	MACRO			;;MOV IY INTO PROGRAM COUNTER
+	DB	0FDH,0E9H
+	ENDM
+RETI	MACRO			;;RETURN FROM INTERRUPT (EI NOT ENABLED)
+	DB	0EDH,4DH
+	ENDM
+RETN	MACRO			;;RETURN FROM NON-MASKABLE INTERRUPT
+	DB	0EDH,45H
+	ENDM
+RETEI	MACRO			;;RETURN FROM INTERRUPT (EI ENABLED)
+	DB	EI,0EDH,4DH
+	ENDM
+INP	MACRO	?R		;;GO TO INPUT PORT (SPECIFIED BY REG C)
+	DB	0EDH,?R*8+40H	;;	AND LOAD INTO REG R
+	ENDM
+OUTP	MACRO	?R		;;OUTPUT TO PORT (SPECIFIED BY REG C)
+	DB	0EDH,?R*8+41H	;;	FROM REG R
+	ENDM
+INI	MACRO			;;LOAD MEMORY (H,L) WITH INPUT PORT
+	DB	0EDH,0A2H	;;	(SPECIFIED BY REG C)  INC H,L  DEC B
+	ENDM
+INIR	MACRO			;;AS ABOVE REPEAT UNTIL B=0
+	DB	0EDH,0B2H
+	ENDM
+IND	MACRO			;;LOAD MEMORY (H,L) WITH INPUT PORT
+	DB	0EDH,0AAH	;;	(SPECIFIED BY REG C)   DEC H,L  DEC B
+	ENDM
+INDR	MACRO			;;AS ABOVE REPEAT UNTIL B=0
+	DB	0EDH,0BAH
+	ENDM
+OUTI	MACRO			;;OUTPUT TO PORT (SPECIFIED BY REG C)
+	DB	0EDH,0A3H	;;	FROM MEMORY (H,L)  INC H,L  DEC B
+	ENDM
+OUTIR	MACRO			;;AS ABOVE REPEAT UNTIL B=0
+	DB	0EDH,0B3H
+	ENDM
+OUTD	MACRO			;;OUTPUT TO PORT (SPECIFIED BY REG C)
+	DB	0EDH,0ABH	;;	FROM MEMORY (H,L)  DEC H,L  DEC B
+	ENDM
+OUTDR	MACRO			;;AS ABOVE REPEAT UNTIL B=0
+	DB	0EDH,0BBH
+	ENDM
+RLCR	MACRO	?R		;;ROTATE LEFT CIRCULAR REG R
+	DB	0CBH, 00H + ?R
+	ENDM
+RLCX	MACRO	?D		;;ROTATE LEFT CIRCULAR CONTENTS OF MEMORY
+				;;	AT (IX+D)
+	@CHK	?D
+	DB	0DDH, 0CBH, ?D, 06H
+	ENDM
+RLCY	MACRO	?D		;;ROTATE LEFT CIRCULAR CONTENTS OF MEMORY
+				;;	AT (IY+D)
+	@CHK	?D
+	DB	0FDH, 0CBH, ?D, 06H
+	ENDM
+RALR	MACRO	?R		;;ROTATE ARITHMETIC LEFT REG R
+	DB	0CBH, 10H+?R
+	ENDM
+RALX	MACRO	?D		;;ROTATE ARITHMETIC LEFT CONTENTS OF MEMORY
+				;;	AT (IX+D)
+	@CHK	?D
+	DB	0DDH, 0CBH, ?D, 16H
+	ENDM
+RALY	MACRO	?D		;;ROTATE ARITHMETIC LEFT CONTENTS OF MEMORY
+				;;	AT (IY+D)
+	@CHK	?D
+	DB	0FDH, 0CBH, ?D, 16H
+	ENDM
+RRCR	MACRO	?R		;;ROTATE RIGHT CIRCULAR REG R
+	DB	0CBH, 08H + ?R
+	ENDM
+RRCX	MACRO	?D		;;ROTATE RIGHT CIRCULAR CONTENTS OF MEMORY
+				;;	AT (IX+D)
+	@CHK	?D
+	DB	0DDH, 0CBH, ?D, 0EH
+	ENDM
+RRCY	MACRO	?D		;;ROTATE RIGHT CIRCULAR CONTENTS OF MEMORY
+				;;	AT (IY+D)
+	@CHK	?D
+	DB	0FDH, 0CBH, ?D, 0EH
+	ENDM
+RARR	MACRO	?R		;;ROTATE ARITHMETIC RIGHT REG R
+	DB	0CBH, 18H + ?R
+	ENDM
+RARX	MACRO	?D		;;ROTATE ARITHMETIC RIGHT CONTENTS OF MEMORY
+				;;	AT (IX+D)
+	@CHK	?D
+	DB	0DDH, 0CBH, ?D, 1EH
+	ENDM
+RARY	MACRO	?D		;;ROTATE ARITHMETIC RIGHT CONTENTS OF MEMORY
+				;;	AT (IY+D)
+	@CHK	?D
+	DB	0FDH, 0CBH, ?D, 1EH
+	ENDM
+SLAR	MACRO	?R		;;SHIFT LEFT ARITHMETIC REG R
+	DB	0CBH, 20H + ?R
+	ENDM
+SLAX	MACRO	?D		;;SHIFT LEFT ARITHMETIC CONTENTS OF MEMORY
+				;;	AT(IX+D)
+	@CHK	?D
+	DB	0DDH, 0CBH, ?D, 26H
+	ENDM
+SLAY	MACRO	?D		;;SHIFT LEFT ARITHMETIC CONTENTS OF MEMORY
+				;;	AT (IY+D)
+	@CHK	?D
+	DB	0FDH, 0CBH, ?D, 26H
+	ENDM
+SRAR	MACRO	?R		;;SHIFT RIGHT ARITHMETIC REG R
+	DB	0CBH, 28H+?R
+	ENDM
+SRAX	MACRO	?D		;;SHIFT RIGHT ARITHMETIC CONTENTS OF MEMORY
+				;;	AT (IX+D)
+	@CHK	?D
+	DB	0DDH, 0CBH, ?D, 2EH
+	ENDM
+SRAY	MACRO	?D		;;SHIFT RIGHT ARITHMETIC CONTENTS OF MEMORY
+				;;	AT (IY+D)
+	@CHK	?D
+	DB	0FDH, 0CBH, ?D, 2EH
+	ENDM
+SRLR	MACRO	?R		;;SHIFT RIGHT LOGICALLY REG R
+	DB	0CBH, 38H + ?R
+	ENDM
+SRLX	MACRO	?D		;;SHIFT RIGHT LOGICALLY CONTENTS OF MEMORY
+				;;	AT (IX+D)
+	@CHK	?D
+	DB	0DDH, 0CBH, ?D, 3EH
+	ENDM
+SRLY	MACRO	?D		;;SHIFT RIGHT LOGICALLY CONTENTS OF MEMORY
+				;;	AT (IY+D)
+	@CHK	?D
+	DB	0FDH, 0CBH, ?D, 3EH
+	ENDM
+RLD	MACRO			;;ROTATE NIBBLE LEFT & RIGHT BETWEEN ACC 
+	DB	0EDH, 6FH	;;  AND CONTENTS AT (H,L)
+	ENDM
+RRD	MACRO			;;ROTATE NIBBLE RIGHT & LEFT BETWEEN ACC
+	DB	0EDH, 67H	;;  AND CONTENTS AT (H,L)
+	ENDM
+
--- a/CONTRIBUTIONS/MOSS
+++ b/CONTRIBUTIONS/MOSS
@@ -0,0 +1,88 @@
+
+
+This is the Text Document for MOSS22, the Altair 8800 Monitor Program - MOSS Ver 2.2
+
+The files contained in folder 8800-Manual are:
+CCS_2810_Z80_CPU_1980.pdf  -  Original manual
+MOSS22.PDF  -  Monitor Pages - extracted
+MOSS22.TXT  -  Text 
+
+The Monitor (MOSS22) is described in detail in Chapter 3 of the Original Manual.
+
+The appropriate PDF Pages that contain the Monitor Source Code are included in MOSS22.PDF.
+
+The files contained in folder tif are the *.tif images of the PDF pages to be OCR'd.
+page1.tif
+page2.tif
+page3.tif
+page4.tif
+page5.tif
+page6.tif
+page7.tif
+page8.tif
+page9.tif
+page10.tif
+page11.tif
+page12.tif
+page13.tif
+page14.tif
+page15.tif
+page16.tif
+page17.tif
+page18.tif
+page19.tif
+page20.tif
+page21.tif
+page22.tif
+page23.tif
+page24.tif
+
+
+Those pages were extracted, converted to tif files (450 DPI) and OCR'd with TextBridge Classic.
+The Text file was then edited, aligned, and proof read several times to give the MOSS22.ASM file.
+
+The files contained in folder MOSS22 are:
+MOSS22.ASM
+MOSS22.PRN
+MOSS22.HEX
+MOSS22.SYM
+
+
+The files contained in folder Z80LIB are:
+Z80.LIB
+Z80.DOC
+
+The Z80.LIB has to be the file with 9856 Bytes, and needs to be modified so the source assembles properly.
+The above file, has already been modified.
+
+References:
+http://z80cpu.eu/files/archive/roche/Z80LIB.TXT
+http://www.retroarchive.org/cpm/os/
+Z80.LIB = 9856 Bytes
+
+
+The DRI Assemblers and Manuals can be downloaded from:
+http://www.s100computers.com/Software%20Folder/Assembler%20Collection/Assembler%20Collection.htm
+
+Copy the following files to B:
+MAC.COM
+MOSS22.ASM
+Z80.LIB
+Z80.DOC
+
+Execute the DRI Assembler MAC.COM in CP/M 2.2 with:
+B:
+MAC MOSS22.ASM
+
+It will Build:
+MOSS22.HEX
+MOSS22.PRN
+MOSS22.SYM
+
+Compare the MOSS22.PRN file with the MOS22.PDF file for identical bytes.
+
+
+Larry Kraemer & Garry Kraemer
+
+ 
+
--- a/CONTRIBUTIONS/MOSS
+++ b/CONTRIBUTIONS/MOSS
@@ -0,0 +1,90 @@
+Altair 8800 Monitor (MOS Ver 2.2) Source Code, thanks to Larry Kraemer. 
+
+/readme.1st
+
+This is the Text Document for MOSS22, the Altair 8800 Monitor Program - MOSS Ver 2.2
+
+The files contained in folder 8800-Manual are:
+CCS_2810_Z80_CPU_1980.pdf  -  Original manual
+MOSS22.PDF  -  Monitor Pages - extracted
+MOSS22.TXT  -  Text 
+
+The Monitor (MOSS22) is described in detail in Chapter 3 of the Original Manual.
+
+The appropriate PDF Pages that contain the Monitor Source Code are included in MOSS22.PDF.
+
+The files contained in folder tif are the *.tif images of the PDF pages to be OCR'd.
+page1.tif
+page2.tif
+page3.tif
+page4.tif
+page5.tif
+page6.tif
+page7.tif
+page8.tif
+page9.tif
+page10.tif
+page11.tif
+page12.tif
+page13.tif
+page14.tif
+page15.tif
+page16.tif
+page17.tif
+page18.tif
+page19.tif
+page20.tif
+page21.tif
+page22.tif
+page23.tif
+page24.tif
+
+
+Those pages were extracted, converted to tif files (450 DPI) and OCR'd with TextBridge Classic.
+The Text file was then edited, aligned, and proof read several times to give the MOSS22.ASM file.
+
+The files contained in folder MOSS22 are:
+MOSS22.ASM
+MOSS22.PRN
+MOSS22.HEX
+MOSS22.SYM
+
+
+The files contained in folder Z80LIB are:
+Z80.LIB
+Z80.DOC
+
+The Z80.LIB has to be the file with 9856 Bytes, and needs to be modified so the source assembles properly.
+The above file, has already been modified.
+
+References:
+http://z80cpu.eu/files/archive/roche/Z80LIB.TXT
+http://www.retroarchive.org/cpm/os/
+Z80.LIB = 9856 Bytes
+
+
+The DRI Assemblers and Manuals can be downloaded from:
+http://www.s100computers.com/Software%20Folder/Assembler%20Collection/Assembler%20Collection.htm
+
+Copy the following files to B:
+MAC.COM
+MOSS22.ASM
+Z80.LIB
+Z80.DOC
+
+Execute the DRI Assembler MAC.COM in CP/M 2.2 with:
+B:
+MAC MOSS22.ASM
+
+It will Build:
+MOSS22.HEX
+MOSS22.PRN
+MOSS22.SYM
+
+Compare the MOSS22.PRN file with the MOS22.PDF file for identical bytes.
+
+
+Larry Kraemer & Garry Kraemer
+
+ 
+
--- a/CONTRIBUTIONS/MOSS
+++ b/CONTRIBUTIONS/MOSS
@@ -0,0 +1,37 @@
+#!/bin/bash
+#
+#This script will extrace all pages of a PDF to Sequential pages, then convert those PDF
+#pages to text using TextBridge
+#
+#
+#Larry Kraemer  09-21-2014  Chaffee, MO
+#
+#Splitting files
+#
+#Splitting PDF files with pdftk was an interesting experience. The burst option breaks a PDF into #multiple files -- one file for each page:
+#
+# To test the conversion try these commands:  (I have better luck with TextBridge Conversions)
+# convert -monochrome -density 300 pg_0001.pdf pg001.tif
+# tesseract pg001.tif pg001 -psm 6
+# OR Use Textbridge to convert tif files to TXT as spreadsheet or table
+#
+#
+PAGES=24		# set to the number of PDF pages to process
+SOURCE=MOSS22.pdf	# set to the file name of the multipage PDF
+#OUTPUT=moss22.txt	# creates the final "output file"
+RESOLUTION=400		# set to the resolution the scanner used (the higher, the better)
+#
+touch $OUTPUT
+for i in `seq 1 $PAGES`; do
+    convert -monochrome -density $RESOLUTION $SOURCE\[$(($i - 1 ))\] page$i.tif
+#    tesseract page$i.tif page$i -psm 6
+#    cat $OUTPUT page$i.txt > temp.txt
+#    rm $OUTPUT
+#    rm page$i.tif
+#    rm page$i.txt
+#    mv temp.txt $OUTPUT
+#
+#  OR Use Textbridge to convert tif files to TXT as spreadsheet or table
+#
+done
+
--- a/CONTRIBUTIONS/MOSS
+++ b/CONTRIBUTIONS/MOSS
--- a/2.2/tif/page10.tif
+++ b/2.2/tif/page10.tif
--- a/2.2/tif/page11.tif
+++ b/2.2/tif/page11.tif
--- a/2.2/tif/page12.tif
+++ b/2.2/tif/page12.tif
--- a/2.2/tif/page13.tif
+++ b/2.2/tif/page13.tif
--- a/2.2/tif/page14.tif
+++ b/2.2/tif/page14.tif
--- a/2.2/tif/page15.tif
+++ b/2.2/tif/page15.tif
--- a/2.2/tif/page16.tif
+++ b/2.2/tif/page16.tif
--- a/2.2/tif/page17.tif
+++ b/2.2/tif/page17.tif
--- a/2.2/tif/page18.tif
+++ b/2.2/tif/page18.tif
--- a/2.2/tif/page19.tif
+++ b/2.2/tif/page19.tif
--- a/CONTRIBUTIONS/MOSS
+++ b/CONTRIBUTIONS/MOSS
--- a/2.2/tif/page20.tif
+++ b/2.2/tif/page20.tif
--- a/2.2/tif/page21.tif
+++ b/2.2/tif/page21.tif
--- a/2.2/tif/page22.tif
+++ b/2.2/tif/page22.tif
--- a/2.2/tif/page23.tif
+++ b/2.2/tif/page23.tif
--- a/2.2/tif/page24.tif
+++ b/2.2/tif/page24.tif
--- a/CONTRIBUTIONS/MOSS
+++ b/CONTRIBUTIONS/MOSS
--- a/CONTRIBUTIONS/MOSS
+++ b/CONTRIBUTIONS/MOSS
--- a/CONTRIBUTIONS/MOSS
+++ b/CONTRIBUTIONS/MOSS
--- a/CONTRIBUTIONS/MOSS
+++ b/CONTRIBUTIONS/MOSS
--- a/CONTRIBUTIONS/MOSS
+++ b/CONTRIBUTIONS/MOSS
--- a/CONTRIBUTIONS/MOSS
+++ b/CONTRIBUTIONS/MOSS
--- a/CONTRIBUTIONS/MOSS
+++ b/CONTRIBUTIONS/MOSS