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CPM OPERATING SYSTEMS/CPM 68K/1.2 SOURCE/8/FFPADD.S

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+       ttl     fast floating point add/subtract (ffpadd/ffpsub)
+***************************************
+* (c) copyright 1980 by motorola inc. *
+***************************************
+ 
+*************************************************************
+*                  ffpadd/ffpsub                            *
+*             fast floating point add/subtract              *
+*                                                           *
+*  ffpadd/ffpsub - fast floating point add and subtract     *
+*                                                           *
+*  input:                                                   *
+*      ffpadd                                               *
+*          d6 - floating point addend                       *
+*          d7 - floating point adder                        *
+*      ffpsub                                               *
+*          d6 - floating point subtrahend                   *
+*          d7 - floating point minuend                      *
+*                                                           *
+*  output:                                                  *
+*          d7 - floating point add result                   *
+*                                                           *
+*  condition codes:                                         *
+*          n - result is negative                           *
+*          z - result is zero                               *
+*          v - overflow has occured                         *
+*          c - undefined                                    *
+*          x - undefined                                    *
+*                                                           *
+*           registers d3 thru d5 are volatile               *
+*                                                           *
+*  code size: 228 bytes       stack work area:  0 bytes     *
+*                                                           *
+*  notes:                                                   *
+*    1) addend/subtrahend unaltered (d6).                   *
+*    2) underflow returns zero and is unflagged.            *
+*    3) overflow returns the highest value with the         *
+*       correct sign and the 'v' bit set in the ccr.        *
+*                                                           *
+*  time: (8 mhz no wait states assumed)                     *
+*                                                           *
+*           composite average  20.625 microseconds          *
+*                                                           *
+*  add:         arg1=0              7.75 microseconds       *
+*               arg2=0              5.25 microseconds       *
+*                                                           *
+*          like signs  14.50 - 26.00  microseconds          *
+*                    average   18.00  microseconds          *
+*         unlike signs 20.13 - 54.38  microceconds          *
+*                    average   22.00  microseconds          *
+*                                                           *
+*  subtract:    arg1=0              4.25 microseconds       *
+*               arg2=0              9.88 microseconds       *
+*                                                           *
+*          like signs  15.75 - 27.25  microseconds          *
+*                    average   19.25  microseconds          *
+*         unlike signs 21.38 - 55.63  microseconds          *
+*                    average   23.25  microseconds          *
+*                                                           *
+*************************************************************
+         page
+ffpadd idnt    1,1  ffp add/subtract
+ 
+       xdef    ffpadd,ffpsub   entry points
+       xref    ffpcpyrt        copyright notice
+ 
+         section  9
+ 
+************************
+* subtract entry point *
+************************
+ffpsub   move.b  d6,d4    test arg1
+         beq.s   fpart2   return arg2 if arg1 zero
+         eor.b   #$80,d4  invert copied sign of arg1
+         bmi.s   fpami1   branch arg1 minus
+* + arg1
+         move.b  d7,d5    copy and test arg2
+         bmi.s   fpams    branch arg2 minus
+         bne.s   fpals    branch positive not zero
+         bra.s   fpart1   return arg1 since arg2 is zero
+ 
+*******************
+* add entry point *
+*******************
+ffpadd   move.b  d6,d4    test argument1
+         bmi.s   fpami1   branch if arg1 minus
+         beq.s   fpart2   return arg2 if zero
+ 
+* + arg1
+         move.b  d7,d5    test argument2
+         bmi.s   fpams    branch if mixed signs
+         beq.s   fpart1   zero so return argument1
+ 
+* +arg1 +arg2
+* -arg1 -arg2
+fpals    sub.b   d4,d5    test exponent magnitudes
+         bmi.s   fpa2lt   branch arg1 greater
+         move.b  d7,d4    setup stronger s+exp in d4
+ 
+* arg1exp <= arg2exp
+         cmp.b   #24,d5   overbearing size
+         bcc.s   fpart2   branch yes, return arg2
+         move.l  d6,d3    copy arg1
+         clr.b   d3       clean off sign+exponent
+         lsr.l   d5,d3    shift to same magnitude
+         move.b  #$80,d7  force carry if lsb-1 on
+         add.l   d3,d7    add arguments
+         bcs.s   fpa2gc   branch if carry produced
+fparsr   move.b  d4,d7    restore sign/exponent
+         rts              return to caller
+ 
+* add same sign overflow normalization
+fpa2gc   roxr.l  #1,d7    shift carry back into result
+         add.b   #1,d4    add one to exponent
+         bvs.s   fpa2os   branch overflow
+         bcc.s   fparsr   branch if no exponent overflow
+fpa2os   moveq   #-1,d7   create all ones
+         sub.b   #1,d4    back to highest exponent+sign
+         move.b  d4,d7    replace in result
+*        or.b    #$02,ccr show overflow occurred
+         dc.l    $003c0002 ****assembler error****
+         rts              return to caller
+ 
+* return argument1
+fpart1   move.l  d6,d7    move in as result
+         move.b  d4,d7    move in prepared sign+exponent
+         rts              return to caller
+ 
+* return argument2
+fpart2   tst.b   d7       test for returned value
+         rts              return to caller
+ 
+* -arg1exp > -arg2exp
+* +arg1exp > +arg2exp
+fpa2lt   cmp.b   #-24,d5  ? arguments within range
+         ble.s   fpart1   nope, return larger
+         neg.b   d5       change difference to positive
+         move.l  d6,d3    setup larger value
+         clr.b   d7       clean off sign+exponent
+         lsr.l   d5,d7    shift to same magnitude
+         move.b  #$80,d3  force carry if lsb-1 on
+         add.l   d3,d7    add arguments
+         bcs.s   fpa2gc   branch if carry produced
+         move.b  d4,d7    restore sign/exponent
+         rts              return to caller
+ 
+* -arg1
+fpami1   move.b  d7,d5    test arg2's sign
+         bmi.s   fpals    branch for like signs
+         beq.s   fpart1   if zero return argument1
+ 
+* -arg1 +arg2
+* +arg1 -arg2
+fpams    moveq   #-128,d3  create a carry mask ($80)
+         eor.b   d3,d5    strip sign off arg2 s+exp copy
+         sub.b   d4,d5    compare magnitudes
+         beq.s   fpaeq    branch equal magnitudes
+         bmi.s   fpatlt   branch if arg1 larger
+* arg1 <= arg2
+         cmp.b   #24,d5   compare magnitude difference
+         bcc.s   fpart2   branch arg2 much bigger
+         move.b  d7,d4    arg2 s+exp dominates
+         move.b  d3,d7    setup carry on arg2
+         move.l  d6,d3    copy arg1
+fpamss   clr.b   d3       clear extraneous bits
+         lsr.l   d5,d3    adjust for magnitude
+         sub.l   d3,d7    subtract smaller from larger
+         bmi.s   fparsr   return final result if no overflow
+
+* mixed signs normalize
+fpanor   move.b  d4,d5    save correct sign
+fpanrm   clr.b   d7       clear subtract residue
+         sub.b   #1,d4    make up for first shift
+         cmp.l   #$00007fff,d7   ? small enough for swap
+         bhi.s   fpaxqn   branch nope
+         swap.w  d7       shift left 16 bits real fast
+         sub.b   #16,d4   make up for 16 bit shift
+fpaxqn   add.l   d7,d7    shift up one bit
+         dbmi    d4,fpaxqn decrement and branch if positive
+         eor.b   d4,d5    ? same sign
+         bmi.s   fpazro   branch underflow to zero
+         move.b  d4,d7    restore sign/exponent
+         beq.s   fpazro   return zero if exponent underflowed
+         rts              return to caller
+
+* exponent underflowed - return zero
+fpazro   moveq.l #0,d7    create a true zero
+         rts              return to caller
+
+* arg1 > arg2
+fpatlt   cmp.b   #-24,d5  ? arg1 >> arg2
+         ble.s   fpart1   return it if so
+         neg.b   d5       absolutize difference
+         move.l  d7,d3    move arg2 as lower value
+         move.l  d6,d7    set up arg1 as high
+         move.b  #$80,d7  setup rounding bit
+         bra.s   fpamss   perform the addition
+
+* equal magnitudes
+fpaeq    move.b   d7,d5    save arg1 sign
+         exg.l   d5,d4    swap arg2 with arg1 s+exp
+         move.b  d6,d7    insure same low byte
+         sub.l   d6,d7    obtain difference
+         beq.s   fpazro   return zero if identical
+         bpl.s   fpanor   branch if arg2 bigger
+         neg.l   d7       correct difference to positive
+         move.b  d5,d4    use arg2's sign + exponent
+         bra.s   fpanrm   and go normalize
+
+         end
+
+
+ normalize
+
+         end
+
+
+ normalize
+
+         end
+
+
+ normalize
+

CPM OPERATING SYSTEMS/CPM 68K/1.2 SOURCE/8/FFPEXP.S

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+         ttl       fast floating point exponent (ffpexp)
+***************************************
+* (c) copyright 1981 by motorola inc. *
+***************************************
+ 
+*************************************************
+*                  ffpexp                       *
+*       fast floating point exponent            *
+*                                               *
+*  input:   d7 - input argument                 *
+*                                               *
+*  output:  d7 - exponential result             *
+*                                               *
+*     all other registers are transparent       *
+*                                               *
+*  code size: 256 bytes   stack work: 34 bytes  *
+*                                               *
+*  condition codes:                             *
+*        z - set if result in d7 is zero        *
+*        n - cleared                            *
+*        v - set if overlow occurred            *
+*        c - undefined                          *
+*        x - undefined                          *
+*                                               *
+*                                               *
+*  notes:                                       *
+*    1) an overflow returns the largest         *
+*       magnitude number.                       *
+*    2) spot checks show at least 6.8 digit     *
+*       accuracy for all abs(arg) < 30.         *
+*                                               *
+*  time: (8mhz no wait states assumed)          *
+*                                               *
+*              488 microseconds                 *
+*                                               *
+*  logic:   1) find n = int(arg/ln 2).  this is *
+*              added to the mantissa at the end.*
+*           3) reduce argument to range by      *
+*              finding arg = mod(arg, ln 2).    *
+*           4) derive exp(arg) with cordic loop.*
+*           5) add n to exponent giving result. *
+*                                               *
+*************************************************
+         page
+ffpexp   idnt  1,2 ffp exp
+ 
+         opt       pcs
+ 
+         section   9
+ 
+         xdef      ffpexp                        entry point
+ 
+         xref      ffphthet                    hypertangent table
+ 
+         xref      ffpmul2,ffpsub    arithmetic primitives
+         xref      ffptnorm          transcendental normalize routine
+         xref      ffpcpyrt            copyright stub
+ 
+ln2      equ       $b1721840           ln 2 (base e)             .693147180
+ln2inv    equ      $b8aa3b41           inverse of ln 2 (base e) 1.44269504
+cnjkhinv equ       $9a8f4441           floating conjugate of k inverse
+*                                      corrected for the extra convergence
+*                                      during shifts for 4 and 13
+kfctseed equ       $26a3d100           k cordic seed
+ 
+ 
+* overflow - return zero or highest value and "v" bit
+fpeovflw move.w    (sp)+,d6            load sign word and work off stack
+         tst.b     d6                  ? was argument negative
+         bpl.s     fpovnzro            no, continue
+         move.l    #0,d7               return a zero
+         bra.s     fpovrtn             as result is too small
+fpovnzro move.l    #-1,d7              set all zeroes
+         lsr.b     #1,d7               zero sign bit
+*        or.b      #$02,ccr            set overflow bit
+         dc.l      $003c0002           ***assembler error***
+fpovrtn  movem.l   (sp)+,d1-d6/a0      restore registers
+         rts                           return to caller
+ 
+* return one for zero argument
+ffpe1    move.l    #$80000041,d7       return a true one
+         lea       7*4+2(sp),sp        ignore stack saves
+         tst.b     d7                  set condition code properly
+         rts                           return to caller
+ 
+**************
+* exp entry  *
+**************
+ 
+* save work registers and insure positive argument
+ffpexp   movem.l   d1-d6/a0,-(sp)      save all work registers
+         move.w    d7,-(sp)            save sign in low order byte for later
+         beq.s     ffpe1               return a true one for zero exponent
+         and.b     #$7f,d7             take absolute value
+ 
+* divide by log 2 base e for partial result
+fpepos   move.l    d7,d2               save original argument
+         move.l    #ln2inv,d6          load inverse to multiply (faster)
+         jsr       ffpmul2              obtain division thru multiply
+         bvs       fpeovflw            branch if too large
+* convert quotient to both fixed and float integer
+         move.b    d7,d5               copy exponent over
+         move.b    d7,d6               copy exponent over
+         sub.b     #64+32,d5           find non-fractional precision
+         neg.b     d5                  make positive
+         cmp.b     #24,d5              ? insure not too large
+         ble.s     fpeovflw            branch too large
+         cmp.b     #32,d5              ? test upper range
+         bge.s     fpesml              branch less than one
+         lsr.l     d5,d7               shift to integer
+         move.b    d7,(sp)             place adjusted exponent with sign byte
+         lsl.l     d5,d7               back to normal without fraction
+         move.b    d6,d7               re-insert sign+exponent
+         move.l    #ln2,d6             multiply by ln2 to find residue
+         jsr       ffpmul2              multiply back out
+         move.l    d7,d6               setup to subtract multiple of ln 2
+         move.l    d2,d7               move argument in
+         jsr       ffpsub              find remainder of ln 2 divide
+         move.l    d7,d2               copy float argument
+         bra.s     fpeadj              adjust to fixed
+ 
+* multiple less than one
+fpesml   clr.b     (sp)                default initial multiply to zero
+         move.l    d2,d7               back to original argument
+ 
+* convert argument to binary(31,29) precision
+fpeadj   clr.b     d7                  clear sign and exponent
+         sub.b     #64+3,d2            obtain shift value
+         neg.b     d2                  for 2 non-fraction bits
+         cmp.b     #31,d2              insure not too small
+         bls.s     fpeshf              branch to shift if ok
+         move.l    #0,d7               force to zero
+fpeshf   lsr.l     d2,d7               convert to fixed point
+ 
+*****************************************
+* cordic calculation registers:         *
+* d1 - loop count   a0 - table pointer  *
+* d2 - shift count                      *
+* d3 - y'   d5 - y                      *
+* d4 - x'   d6 - x                      *
+* d7 - test argument                    *
+*****************************************
+ 
+* input within range, now start cordic setup
+fpecom   move.l    #0,d5               y=0
+         move.l    #kfctseed,d6        x=1 with jkhinverse factored out
+         lea       ffphthet,a0         point to hperbolic tangent table
+         move.l    #0,d2               prime shift counter
+ 
+* perform cordic loop repeating shifts 4 and 13 to guarantee convergence
+* (ref. "a unified algorithm for elementary functions" j.s.walther
+*        pg. 380 spring joint computer conference 1971)
+         move.l    #3,d1               do shifts 1 thru 4
+         bsr.s     cordic              first cordic loops
+         sub.l     #4,a0               redo table entry
+         sub.w     #1,d2               redo shift count
+         move.l    #9,d1               do four through 13
+         bsr.s     cordic              second cordic loops
+         sub.l     #4,a0               back to entry 13
+         sub.w     #1,d2               redo shift for 13
+         move.l    #10,d1              now 13 through 23
+         bsr.s     cordic              and finish up
+ 
+* now finalize the result
+         tst.b     1(sp)               test original sign
+         bpl.s     fsepos              branch positive argument
+         neg.l     d5                  change y for subtraction
+         neg.b     (sp)                negate adjusted exponent to subtract
+fsepos   add.l     d5,d6               add or subtract y to/from x
+         jsr       ffptnorm            float x
+         move.l    d6,d7               setup result
+* add ln2 factor integer to the exponent
+         add.b     (sp),d7             add to exponent
+         bmi       fpeovflw            branch if too large
+         beq       fpeovflw            branch if too small
+         add.l     #2,sp               rid work data off stack
+         movem.l   (sp)+,d1-d6/a0      restore registers
+         rts                           return to caller
+ 
+*************************
+* cordic loop subroutine*
+*************************
+cordic   add.w     #1,d2               increment shift count
+         move.l    d5,d3               copy y
+         move.l    d6,d4               copy x
+         asr.l     d2,d3               shift for y'
+         asr.l     d2,d4               shift for x'
+         tst.l     d7                  test arg value
+         bmi.s     febmi               branch minus test
+         add.l     d4,d5               y=y+x'
+         add.l     d3,d6               x=x+y'
+         sub.l     (a0)+,d7            arg=arg-table(n)
+         dbra      d1,cordic           loop until done
+         rts                           return
+ 
+febmi    sub.l     d4,d5               y=y-x'
+         sub.l     d3,d6               x=x-y'
+         add.l     (a0)+,d7            arg=arg+table(n)
+         dbra      d1,cordic           loop until done
+         rts                           return
+ 
+ 
+         end
+
+d1,cordic           loop until done
+         rts                           return
+ 
+ 
+         end
+
+d1,cordic           loop until done
+         rts                           return
+ 
+ 
+         end
+
+d1,cordic           loop until done
+         rts                           return
+ 

CPM OPERATING SYSTEMS/CPM 68K/1.2 SOURCE/8/FFPIEEE.S

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+         ttl       ffpieee conversions to/from ffp (ffptieee,ffpfieee)
+******************************************
+*  (c)  copyright 1981 by motorola inc.  *
+******************************************
+ 
+****************************************************
+*        ffptieee and ffpfieee subroutines         *
+*                                                  *
+*   this module contains single-precision          *
+*   conversion routines for ieee format floating   *
+*   point (draft 8.0) to and from motorola fast    *
+*   floating point (ffp) values.                   *
+*   these can be used when large groups of numbers *
+*   need to be converted between formats.  see     *
+*   the mc68344 user's guide for a fuller          *
+*   explanation of the various methods for ieee    *
+*   format support.                                *
+*                                                  *
+*   the fast floating point (non-ieee format)      *
+*   provides results as precise as those required  *
+*   by the ieee specification.  however, this      *
+*   format has some minor differences:             *
+*    1) if the true result of an operation         *
+*       is exactly between representable           *
+*       values, the ffp round-to-nearest           *
+*       function may round to either even or odd.  *
+*    2) the ffp exponent allows half of the range  *
+*       that the single-precision ieee format      *
+*       provides (approx. 10 to the +-19 decimal). *
+*    3) the ieee format specifies infinity,        *
+*       not-a-number, and denormalized data        *
+*       types that are not directly supported      *
+*       by the ffp format.  however, they may be   *
+*       added via customizing or used via the ieee *
+*       format equivalent compatible calls         *
+*       described in the mc68344 user's guide.     *
+*    4) all zeroes are considered positive         *
+*       in ffp format.                             *
+*    5) the slightly higher precision multiply     *
+*       routine "ffpmul2" should be substituted    *
+*       for the default routine "ffpmul" for       *
+*       completely equivalent precision.           *
+*                                                  *
+****************************************************
+         page
+ffpieee  idnt   1,1  ffp conversions to/from ieee format
+ 
+         section   9
+ 
+         xdef      ffptieee,ffpfieee
+ 
+****************************************************
+*               ffptieee                           *
+*                                                  *
+*  fast floating point to ieee format              *
+*                                                  *
+*   input:   d7 - fast floating point value        *
+*                                                  *
+*   output:  d7 - ieee format floating point value *
+*                                                  *
+*   condition codes:                               *
+*            n - set if the result is negative     *
+*            z - set if the result is zero         *
+*            v - undefined                         *
+*            c - undefined                         *
+*            x - undefined                         *
+*                                                  *
+*   notes:                                         *
+*     1) no work storage or registers required.    *
+*     2) all zeroes will be converted positive.    *
+*     3) no not-a-number, inifinity, denormalized, *
+*        or indefinites generated. (unless         *
+*        user customized.)                         *
+*                                                  *
+*   times (assuming in-line code):                 *
+*           value zero      18 cycles              *
+*           value not zero  66 cycles              *
+*                                                  *
+****************************************************
+ 
+ffptieee equ       *
+ 
+         add.l     d7,d7     delete mantissa high bit
+         beq.s     done1     branch zero as finished
+         eor.b     #$80,d7   to twos complement exponent
+         asr.b     #1,d7     form 8-bit exponent
+         sub.b     #$82,d7   adjust 64 to 127 and excessize
+         swap.w    d7        swap for high byte placement
+         rol.l     #7,d7     set sign+exp in high byte
+done1    equ       *
+ 
+         rts                 return to caller
+         page
+************************************************************
+*                     ffpfieee                             *
+*         fast floating point from ieee format             *
+*                                                          *
+*   input:   d7 - ieee format floating point value         *
+*   output:  d7 - ffp format floating point value          *
+*                                                          *
+*   condition codes:                                       *
+*            n - undefined                                 *
+*            z - set if the result is zero                 *
+*            v - set if result overflowed ffp format       *
+*            c - undefined                                 *
+*            x - undefined                                 *
+*                                                          *
+*   notes:                                                 *
+*     1) register d5 is used for work storage and not      *
+*        transparent.                                      *
+*     2) not-a-number, inifinity, and denormalized         *
+*        types as well as an exponent outside of ffp range *
+*        generate a branch to a specific part of the       *
+*        routine.  customizing may easily be done there.   *
+*                                                          *
+*        the default actions for the various types are:    *
+*      label      type         default substitution        *
+*      -----      ----         --------------------        *
+*       nan    not-a-number    zero                        *
+*       inf    infinity        largest ffp value same sign *
+*                              ("v" set in ccr)            *
+*       denor  denormalized    zero                        *
+*       exphi  exp too large   largest ffp value same sign *
+*                              ("v" set in ccr)            *
+*       explo  exp too small   zero                        *
+*                                                          *
+*   times (assuming in-line code):                         *
+*           value zero      78 cycles                      *
+*           value not zero  72 cycles                      *
+*                                                          *
+************************************************************
+ 
+vbit     equ       $02       condition code register "v" bit mask
+ 
+ffpfieee equ       *
+ 
+         swap.w    d7        swap word halves
+         ror.l     #7,d7     exponent to low byte
+         move.l    #-128,d5  load $80 mask in work register
+         eor.b     d5,d7     convert from excess 127 to two's-complement
+         add.b     d7,d7     from 8 to 7 bit exponent
+         bvs.s     ffpovf    branch will not fit
+         add.b     #2<<1+1,d7 adjust excess 127 to 64 and set mantissa high bit
+         bvs.s     exphi     branch exponent too large (overflow)
+         eor.b     d5,d7     back to excess 64
+         ror.l     #1,d7     to fast float representation ("v" cleared)
+done2    equ       *
+ 
+         rts                 return to caller
+         page
+* overflow detected - caused by one of the following:
+*        - false overflow due to difference between excess 127 and 64 format
+*        - exponent too high or low to fit in 7 bits (exponent over/underflow)
+*        - an exponent of $ff representing an infinity
+*        - an exponent of $00 representing a zero, nan, or denormalized value
+ffpovf   bcc.s     ffpovlw   branch if overflow (exponent $ff or too large)
+* overflow - check for possible false overflow due to different excess formats
+         cmp.b     #$7c,d7   ? was original argument really in range
+         beq.s     ffpovfls  yes, branch false overflow
+         cmp.b     #$7e,d7   ? was original argument really in range
+         bne.s     ffptovf   no, branch true overflow
+ffpovfls add.b     #$80+2<<1+1,d7  excess 64 adjustment and mantissa high bit
+         ror.l     #1,d7     finalize to fast floating point format
+         tst.b     d7        insure no illegal zero sign+exponent byte
+         bne.s     done2     done if does not set s+exp all zeroes
+         bra.s     explo     treat as underflowed exponent otherwise
+* exponent low - check for zero, denormalized value, or too small an exponent
+ffptovf  and.w     #$feff,d7 clear sign bit out
+         tst.l     d7        ? entire value now zero
+         beq.s     done2     branch if value is zero
+         tst.b     d7        ? denormalized number (significant#0, exp=0)
+         beq.s     denor     branch if denormalized
+ 
+***************
+*****explo - exponent to small for ffp format
+***************
+*  the sign bit will be bit 8.
+explo    move.l    #0,d7     default zero for this case ("v" cleared)
+         bra.s     done2     return to mainline
+ 
+***************
+*****denor - denormalized number
+***************
+denor    move.l    #0,d7     default is to return a zero ("v" cleared)
+         bra.s     done2     return to mainline
+ 
+* exponent high - check for exponent too high, infinity, or nan
+ffpovlw  cmp.b     #$fe,d7   ? was original exponent $ff
+         bne.s     exphi     no, branch exponent too large
+         lsr.l     #8,d7     shift out exponent
+         lsr.l     #1,d7     shift out sign
+         bne.s     nan       branch not-a-number
+ 
+***************
+*****inf - infinity
+***************
+*  the carry and x bit represent the sign
+inf      move.l    #-1,d7    setup maximum ffp value
+         roxr.b    #1,d7     shift in sign
+         or.b      #vbit,ccr show overflow occured [clh] was sr
+         bra.s     done2     return with maximum same sign to mainline
+ 
+***************
+*****exphi - exponent to large for ffp format
+***************
+*  the sign bit will be bit 8.
+exphi    lsl.w     #8,d7     set x bit to sign
+         move.l    #-1,d7    setup maximum number
+         roxr.b    #1,d7     shift in sign
+         or.b      #vbit,ccr show overflow ocurred [vlh] was sr
+         bra.s     done2     return maximum same sign to mainline
+ 
+***************
+*****nan - not-a-number
+***************
+* bits 0 thru 22 contain the nan data field
+nan      move.l    #0,d7     default to a zero ("v" bit cleared)
+         bra.s     done2     return to mainline
+ 
+         end
+
+ared)
+         bra.s     done2     return to mainline
+ 
+         end
+
+ared)
+         bra.s     done2     return to mainline
+ 
+         end
+
+ared)
+         bra.s     done2     return to mainline

CPM OPERATING SYSTEMS/CPM 68K/1.2 SOURCE/8/FFPSIN.S

@@ -0,0 +1,296 @@
+         ttl       ffp sine cosine tangent (ffpsin/ffpcos/ffptan/ffpsincs)
+***************************************
+* (c) copyright 1981 by motorola inc. *
+***************************************
+ 
+*************************************************
+*        ffpsin ffpcos ffptan ffpsincs          *
+*     fast floating point sine/cosine/tangent   *
+*                                               *
+*  input:   d7 - input argument (radian)        *
+*                                               *
+*  output:  d7 - function result                *
+*           (ffpsincs also returns d6)          *
+*                                               *
+*     all other registers totally transparent   *
+*                                               *
+*  code size: 334 bytes   stack work: 38 bytes  *
+*                                               *
+*  condition codes:                             *
+*        z - set if result in d7 is zero        *
+*        n - set if result in d7 is negative    *
+*        c - undefined                          *
+*        v - set if result is meaningless       *
+*            (input magnitude too large)        *
+*        x - undefined                          *
+*                                               *
+*  functions:                                   *
+*             ffpsin   -  sine result           *
+*             ffpcos   -  cosine result         *
+*             ffptan   -  tangent result        *
+*             ffpsincs -  both sine and cosine  *
+*                         d6 - sin, d7 - cosine *
+*                                               *
+*  notes:                                       *
+*    1) input values are in radians.            *
+*    2) function ffpsincs returns both sine     *
+*       and cosine twice as fast as calculating *
+*       the two functions independently for     *
+*       the same value.  this is handy for      *
+*       graphics processing.                    *
+*    2) input arguments larger than two pi      *
+*       suffer reduced precision.  the larger   *
+*       the argument, the smaller the precision.*
+*       excessively large arguments which have  *
+*       less than 5 bits of precision are       *
+*       returned unchanged with the "v" bit set.*
+*    3) for tangent angles of infinite value    *
+*       the largest possible positive number    *
+*       is returned ($ffffff7f). this still     *
+*       gives results well within single        *
+*       precision calculation.                  *
+*    4) spot checks show errors bounded by      *
+*       4 x 10**-7 but for arguments close to   *
+*       pi/2 intervals where 10**-5 is seen.    *
+*                                               *
+*  time: (8mhz no wait states and argument      *
+*         assumed within +-pi)                  *
+*                                               *
+*           ffpsin       413 microseconds       *
+*           ffpcos       409 microseconds       *
+*           ffptan       501 microseconds       *
+*           ffpsincs     420 microseconds       *
+*************************************************
+         page
+ffpsin   idnt  1,2 ffp sine cosine tangent
+ 
+         opt       pcs
+ 
+         section   9
+ 
+         xdef      ffpsin,ffpcos,ffptan,ffpsincs entry points
+ 
+         xref      ffptheta                    inverse tangent table
+ 
+         xref      ffpmul2,ffpdiv,ffpsub    multiply, divide and subtract
+         xref      ffptnorm          transcendental normalize routine
+         xref      ffpcpyrt            copyright stub
+ 
+pi       equ       $c90fdb42          floating constant pi
+fixedpi  equ       $c90fdaa2          pi skeleton to 32 bits precision
+inv2pi   equ       $a2f9833e          inverse of two-pi
+kinv     equ       $9b74ee40          floating k inverse
+nkfact   equ       $ec916240          negative k inverse
+ 
+********************************************
+* entry for returning both sine and cosine *
+********************************************
+ffpsincs move.w    #-2,-(sp)           flag both sine and cosine wanted
+         bra.s     fpscom              enter common code
+ 
+**********************
+* tangent entry point*
+**********************
+ffptan   move.w    #-1,-(sp)           flag tangent with minus value
+         bra.s     fpschl              check very small values
+ 
+**************************
+* cosine only entry point*
+**************************
+ffpcos   move.w    #1,-(sp)            flag cosine with positive value
+         bra.s     fpscom              enter common code
+ 
+* negative sine/tangent small value check
+fpschm   cmp.b     #$80+$40-8,d7       ? less or same as -2**-9
+         bhi.s     fpscom              continue if not too small
+* return argument
+fpsrti   add.l     #2,sp               rid internal parameter
+         tst.b     d7                  set condition codes
+         rts                           return to caller
+ 
+************************
+* sine only entry point*
+************************
+ffpsin   clr.w     -(sp)               flag sine with zero
+* sine and tangent values < 2**-9 return identities
+fpschl   tst.b     d7                  test sign
+         bmi.s     fpschm              branch minus
+         cmp.b     #$40-8,d7           ? less or same than 2**-9
+         bls.s     fpsrti              return identity
+ 
+* save registers and insure input within + or - pi range
+fpscom   movem.l   d1-d6/a0,-(sp)      save all work registers
+         move.l    d7,d2               copy input over
+         add.b     d7,d7               rid sign bit
+         cmp.b     #(64+5)<<1,d7       ? abs(arg) < 2**6 (32)
+         bls.s     fpsnlr              branch yes, not too large
+* argument is too large to subtract to within range
+         cmp.b     #(64+20)<<1,d7      ? test excessive size (>2**20)
+         bls.s     fpsgpr              no, go ahead and use
+* error - argument so large result has no precision
+*        or.b      #$02,ccr            force v bit on
+         dc.l      $003c0002           *****assembler error*****
+         movem.l   (sp)+,d1-d6/a0      restore registers
+         add.l     #2,sp               clean internal argument off stack
+         rts                           return to caller
+ 
+* we must find mod(arg,twopi) since argument is too large for subtractions
+fpsgpr   move.l    #inv2pi,d6          load up 2*pi inverse constant
+         move.l    d2,d7               copy over input argument
+         jsr       ffpmul2             divide by 2pi (via multiply inverse)
+* convert quotient to float integer
+         move.b    d7,d5               copy exponent over
+         and.b     #$7f,d5             rid sign from exponent
+         sub.b     #64+24,d5           find fractional precision
+         neg.b     d5                  make positive
+         move.l    #-1,d4              setup mask of all ones
+         clr.b     d4                  start zeroes at low byte
+         lsl.l     d5,d4               shift zeroes into fractional part
+         or.b      #$ff,d4             do not remove sign and exponent
+         and.l     d4,d7               strip fractional bits entirely
+         move.l    #pi+1,d6            load up 2*pi constant
+         jsr       ffpmul2             multiply back out
+         move.l    d7,d6               setup to subtract multiple of twopi
+         move.l    d2,d7               move argument in
+         jsr       ffpsub              find remainder of twopi divide
+         move.l    d7,d2               use it as new input argument
+ 
+* convert argument to binary(31,26) precision for reduction within +-pi
+fpsnlr   move.l    #$0c90fdaa,d4      fixedpi>>4 load pi
+         move.l    d2,d7               copy float argument
+         clr.b     d7                  clear sign and exponent
+         tst.b     d2                  test sign
+         bmi.s     fpsnmi              branch negative
+         sub.b     #64+6,d2            obtain shift value
+         neg.b     d2                  for 5 bit non-fraction bits
+         cmp.b     #31,d2              ? very small number
+         bls.s     fpssh1              no, go ahead and shift
+         move.l    #0,d7               force to zero
+fpssh1   lsr.l     d2,d7               convert to fixed point
+* force to +pi or below
+fpspck   cmp.l     d4,d7               ? greater than pi
+         ble.s     fpsckm              branch not
+         sub.l     d4,d7               subtract
+         sub.l     d4,d7               .  twopi
+         bra.s     fpspck              and check again
+ 
+fpsnmi   sub.b     #$80+64+6,d2        rid sign and get shift value
+         neg.b     d2                  for 5 non-fractional bits
+         cmp.b     #31,d2              ? very small number
+         bls.s     fpssh2              no, go ahead and shift
+         move.l    #0,d7               force to zero
+fpssh2   lsr.l     d2,d7               convert to fixed point
+         neg.l     d7                  make negative
+         neg.l     d4                  make -pi
+* force to -pi or above
+fpsnck   cmp.l     d4,d7               ? less than -pi
+         bge.s     fpsckm              branch not
+         sub.l     d4,d7               add
+         sub.l     d4,d7               .  twopi
+         bra.s     fpsnck              and check again
+ 
+*****************************************
+* cordic calculation registers:         *
+* d1 - loop count   a0 - table pointer  *
+* d2 - shift count                      *
+* d3 - x'   d5 - x                      *
+* d4 - y'   d6 - y                      *
+* d7 - test argument                    *
+*****************************************
+ 
+* input within range, now start cordic setup
+fpsckm   move.l    #0,d5               x=0
+         move.l    #nkfact,d6          y=negative inverse k factor seed
+         move.l    #$3243f6a8,d4       fixedpi>>2, setup fixed pi/2 constant
+         asl.l     #3,d7               now to binary(31,29) precision
+         bmi.s     fpsap2              branch if minus to add pi/2
+         neg.l     d6                  y=positive inverse k factor seed
+         neg.l     d4                  subtract pi/2 for positive argument
+fpsap2   add.l     d4,d7               add constant
+         lea       ffptheta,a0         load arctangent table
+         move.l    #23,d1              loop 24 times
+         move.l    #-1,d2              prime shift counter
+* cordic loop
+fsinlp   add.w     #1,d2               increment shift count
+         move.l    d5,d3               copy x
+         move.l    d6,d4               copy y
+         asr.l     d2,d3               shift for x'
+         asr.l     d2,d4               shift for y'
+         tst.l     d7                  test arg value
+         bmi.s     fsbmi               branch minus test
+         sub.l     d4,d5               x=x-y'
+         add.l     d3,d6               y=y+x'
+         sub.l     (a0)+,d7            arg=arg-table(n)
+         dbra      d1,fsinlp           loop until done
+         bra.s     fscom               enter common code
+fsbmi    add.l     d4,d5               x=x+y'
+         sub.l     d3,d6               y=y-x'
+         add.l     (a0)+,d7            arg=arg+table(n)
+         dbra      d1,fsinlp           loop until done
+ 
+* now split up tangent and ffpsincs from sine and cosine
+fscom    move.w    7*4(sp),d1          reload internal parameter
+         bpl.s     fssincos            branch for sine or cosine
+ 
+         add.b     #1,d1               see if was -1 for tangent
+         bne.s     fsdual              no, must be both sin and cosine
+* tangent finish
+         bsr.s     fsfloat             float y (sin)
+         move.l    d6,d7               setup for divide into
+         move.l    d5,d6               prepare x
+         bsr.s     fsfloat             float x (cos)
+         beq.s     fstinf              branch infinite result
+         jsr       ffpdiv              tangent = sin/cos
+fsinfrt  movem.l   (sp)+,d1-d6/a0      restore registers
+         add.l     #2,sp               delete internal parameter
+         rts                           return to caller
+* tangent is infinite. return maximum positive number.
+fstinf   move.l    #$ffffff7f,d7       largest ffp number
+         bra.s     fsinfrt             and clean up
+ 
+* sine and cosine
+fssincos beq.s     fssine              branch if sine
+         move.l    d5,d6               use x for cosine
+fssine   bsr.s     fsfloat             convert to float
+         move.l    d6,d7               return result
+         tst.b     d7                  and condition code test
+         movem.l   (sp)+,d1-d6/a0      restore registers
+         add.l     #2,sp               delete internal parameter
+         rts                           return to caller
+ 
+* both sine and cosine
+fsdual   move.l    d5,-(sp)            save cosine derivitive
+         bsr.s     fsfloat             convert sine derivitive to float
+         move.l    d6,6*4(sp)          place sine into saved d6
+         move.l    (sp)+,d6            restore cosine derivitive
+         bra.s     fssine              and continue restoring sine on the sly
+ 
+* fsfloat - float internal precision but truncate to zero if < 2**-21
+fsfloat  move.l    d6,d4               copy internal precision value
+         bmi.s     fsfneg              branch negative
+         cmp.l     #$000000ff,d6       ? test magnitude
+         bhi       dobranch                     ffptnorm normalize if not too small
+fsfzro   move.l    #0,d6               return a zero
+         rts                           return to caller
+fsfneg   asr.l     #8,d4               see if all ones bits 8-31
+         add.l     #1,d4               ? goes to zero
+         bne       dobranch                     ffptnorm normalize if not too small
+         bra.s     fsfzro              return zero
+dobranch:
+                jmp                     ffptnorm                        for loader problem
+ 
+ 
+         end
+
+   for loader problem
+ 
+ 
+         end
+
+   for loader problem
+ 
+ 
+         end
+
+   for loader problem
+ 

CPM OPERATING SYSTEMS/CPM 68K/1.2 SOURCE/8/FPFTOL.S

@@ -0,0 +1,62 @@
+* 
+*	Floating Point Float to Long Routine :
+*		Front End to IEEE Floating Point Package.
+*
+*		long
+*		fpftol(fparg)
+*		double fparg;
+*
+*	Condition Codes : V bit signifies Overflow
+*
+*	Return : Fixed Point representation of Floating Point Number
+*
+.globl fpftol
+.globl _fpftol
+.globl ieffpi
+.text
+fpftol:
+_fpftol:
+~~fpftol:
+link	r14,#-4
+movem.l	d7,-(sp)
+move.l	8(r14),r7
+jsr		ieffpi
+move.l	r7,r0
+movem.l	(sp)+,d7
+unlk	r14
+rts
+tol:
+~~fpftol:
+link	r14,#-4
+movem.l	d7,-(sp)
+move.l	8(r4),r7
+jsr		ieffpi
+move.l	r7,r0
+movem.l	(sp)+,d7
+unlk	r14
+rts
+tol:
+~~fpftol:
+link	r14,#-4
+movem.l	d7,-(sp)
+move.l	8(r4),r7
+jsr		ieffpi
+move.l	r7,r0
+movem.l	(sp)+,d7
+unlk	r14
+rts
+tol:
+~~fpftol:
+link	r14,#-4
+movem.l	d7,-(sp)
+move.l	8(r4),r7
+jsr		ieffpi
+move.l	r7,r0
+movem.l	(sp)+,d7
+unlk	r14
+rts
+tol:
+~~fpftol:
+link	r14,#-4
+movem.l	d7,-(sp)
+move.l	8(r

CPM OPERATING SYSTEMS/CPM 68K/1.2 SOURCE/8/FPLTOF.S

@@ -0,0 +1,63 @@
+* 
+*	Floating Point Long to Float Routine :
+*		Front End to IEEE Floating Point Package.
+*
+*		double
+*		fpltof(larg)
+*		long larg;
+*
+*	Return : Floating Point representation of Long Fixed point integer
+*
+.globl fpltof
+.globl _fpltof
+.globl iefifp
+.text
+fpltof:
+_fpltof:
+~~fpltof:
+link	r14,#-4
+movem.l	d7,-(sp)
+move.l	8(r14),r7
+jsr		iefifp
+move.l	r7,r0
+movem.l	(sp)+,d7
+unlk	r14
+rts
+tof:
+~~fpltof:
+link	r14,#-4
+movem.l	d7,-(sp)
+move.l	8(r14),r7
+jsr		iefifp
+move.l	r7,r0
+movem.l	(s)+,d7
+unlk	r14
+rts
+tof:
+~~fpltof:
+link	r14,#-4
+movem.l	d7,-(sp)
+move.l	8(r14),r7
+jsr		iefifp
+move.l	r7,r0
+movem.l	(s)+,d7
+unlk	r14
+rts
+tof:
+~~fpltof:
+link	r14,#-4
+movem.l	d7,-(sp)
+move.l	8(r14),r7
+jsr		iefifp
+move.l	r7,r0
+movem.l	(s)+,d7
+unlk	r14
+rts
+tof:
+~~fpltof:
+link	r14,#-4
+movem.l	d7,-(sp)
+move.l	8(r14),r7
+jsr		iefifp
+move.l	r7,r0
+movem.l	(s

CPM OPERATING SYSTEMS/CPM 68K/1.2 SOURCE/8/IEFBACK.S

@@ -0,0 +1,199 @@
+         ttl       ieee format equivalent back-end routines (iefback)
+iefback  idnt   1,1  ieee format equivalent back-end routines
+******************************************
+*  (c)  copyright 1981 by motorola inc.  *
+******************************************
+ 
+         section   9
+ 
+****************************************************************
+*              iefrtnan (internal routine)                     *
+*  ieee format equivalent fast floating point return nan       *
+*                                                              *
+*  input: sp -> +0  original callers d3-d7 registers           *
+*              +20  original callers return address            *
+*                                                              *
+*  output: d7 - a newly created nan (not-a-number)             *
+*          ccr - the "v" bit is forced on                      *
+*                                                              *
+*          and direct return to the original caller            *
+*                                                              *
+*  purpose:  called whenever the result of an operation        *
+*          is illegal or undefined and a nan result must       *
+*          be generated as the final result.                   *
+*                                                              *
+*   the ieee format defined nan is determined by an exponent   *
+*   of all one's and a non-zero significand.  the sign bit     *
+*   is a don't care.  the ieee standard leaves up to each      *
+*   implementation what is placed in the significand.  here    *
+*   we will generate the low order 23 bits of the original     *
+*   caller's return address.  however, this may not be         *
+*   sufficient - if all 23 bits happen to be zero or the       *
+*   address is larger than 23 bits this would lead to an       *
+*   incorrect result.  therfore, if this happens only the low  *
+*   order significand bit is set on with the rest zeroes.      *
+*   this represents an odd address (illegal with current m68000*
+*   instruction alignment restrictions) and any interested     *
+*   party can tell if such a substitution has taken place.     *
+*   also, if this was illegally assumed to be an address and   *
+*   used, an address exception trap would ensue thus not       *
+*   allowing its use as a valid address.                       *
+*                                                              *
+****************************************************************
+ 
+signmsk  equ       $80000000 ieee format sign isolation mask
+expmsk   equ       $7f800000 ieee format exponent mask
+vbit     equ       $0002     condition code "v" bit mask
+zbit     equ       $0004     condition code "z" bit mask
+ 
+         xdef      iefrtnan  return nan result routine
+ 
+iefrtnan movem.l   (sp)+,d3-d7         restore callers registers
+         move.l    (sp),d7             load up return address
+         and.l     #signmsk+expmsk,d7  verify not larger than 23 bits
+         bne.s     iefnone             it is, cannot use it - return a one
+         move.l    (sp),d7             load up return address
+         and.l     #$007fffff,d7       isolate address bits required
+         bne.s     iefnzro             branch if not zero
+iefnone  move.l    #1,d7               set only low bit on
+iefnzro  or.l      #expmsk,d7          force exponent all ones
+         or.b      #vbit,ccr           return with "v" bit set [vlh]
+         rts                           return to original caller
+         page
+**********************************************************
+*           ieftieee (internal subroutine)               *
+*  ieee format compatible convert ffp to ieee format     *
+*                                                        *
+*  input: d7 - result of fast floating point operation   *
+*         ccr - set for above result                     *
+*         sp -> +0  original callers saved d3-d7         *
+*              +20  original callers return address      *
+*                                                        *
+*  output: d7 - ieee format equivalent of the result     *
+*                                                        *
+*  condition code:                                       *
+*                                                        *
+*              n - set if the result is negative         *
+*              z - set if the result is zero             *
+*              v - cleared (not nan)                     *
+*              c - cleared                               *
+*              x - undefined                             *
+*                                                        *
+*    all fast floating point numbers have an exact       *
+*    ieee format representation.  since the fast         *
+*    floating point routines always set the "v" bit      *
+*    for overflows and returns the proper sign, we       *
+*    can easily change the result to an ieee infinity    *
+*    and unflag the "v" bit.                             *
+*                                                        *
+**********************************************************
+ 
+         xdef      ieftieee  return ieee result to original caller
+ 
+ieftieee bvs.s     iefvset   branch if overflow ffp result
+         add.l     d7,d7     delete mantissa high bit
+         beq.s     ieftrtn   branch zero as finished
+         eor.b     #$80,d7   to twos complement exponent
+         asr.b     #1,d7     form 8-bit exponent
+         sub.b     #$82,d7   adjust 64 to 127 and excessize
+         swap.w    d7        swap for high byte placement
+         rol.l     #7,d7     set sign+exp in high byte
+ieftrtn  tst.l     d7        test "z" and "n", clear "v" and "c" in ccr
+         movem.l   (sp)+,d3-d6 restore d3 thru d6 callers registers
+         add.l     #4,sp     skip original d7
+         rts                 return to original caller with result
+ 
+* overflow - set to proper ieee format infinity
+iefvset  add.b     d7,d7     save sign bit in "x"
+         move.l    #expmsk<<1,d7 set exponent of ones shifted left
+         roxr.l    #1,d7     insert proper sign
+         jmp       ieftrtn   and return to original caller
+         page
+*******************************************************************
+*  general purpose return routines                                *
+*                                                                 *
+*  the following routines return a specific final result          *
+*  to the original caller with the proper condition codes         *
+*  set as follows:                                                *
+*                                                                 *
+*              n - the result is negative                         *
+*              z - the result is a zero                           *
+*              v - cleared (not a nan)                            *
+*              c - undefined                                      *
+*              x - undefined                                      *
+*                                                                 *
+*  the routines are as follows:                                   *
+*                                                                 *
+*   iefrtd7  - return the current contents of d7                  *
+*   iefrtod7 - return the original contents of d7                 *
+*   iefrtsz  - return a signed zero (sign is bit 31 of d7)        *
+*   iefrtie  - return infinity with sign exclusive or of          *
+*              original argument signs                            *
+*   iefrtsze - return signed zero with sign exclusiv or           *
+*              of original argument signs                         *
+*                                                                 *
+*******************************************************************
+ 
+         xdef      iefrtd7,iefrtsz,iefrtod7,iefrtie,iefrtsze
+ 
+**********************
+* return original d7 *
+* (cant be neg zero) *
+**********************
+iefrtod7 move.l    16(sp),d7  load original d7 into d7
+ 
+*********************
+* return current d7 *
+* (cant be neg zero)*
+*********************
+iefrtd7  movem.l   (sp)+,d3-d6         load all but d7 registers back up
+         add.l     #4,sp     skip original d7 on stack
+         add.l     d7,d7     check for signed zero
+         beq.s     iefwasz   branch if was a zero
+         roxr.l    #1,d7     value back into position set ccr ("v" clear)
+         rts                 return to caller with ccr and result
+ 
+**************************************
+* return signed zero with sign being *
+* eor of the original operands       *
+**************************************
+iefrtsze movem.l   12(sp),d6-d7 load original arguments
+         eor.l     d6,d7     produce proper sign
+ 
+**********************
+* return signed zero *
+* d7 bit31 has sign  *
+**********************
+iefrtsz  movem.l   (sp)+,d3-d6 load all but d7 back up
+         add.l     #4,sp     skip original d7 on stack
+         add.l     d7,d7     set sign bit into carry
+         move.l    #0,d7     zero d7
+iefwasz  roxr.l    #1,d7     set sign bit back in ("v" cleared)
+         or.b      #zbit,ccr  force zero bit on in ccr [vlh]
+         rts
+ 
+*********************************
+* return infinity with eor sign *
+* of original arguments         *
+*********************************
+iefrtie  movem.l   (sp)+,d3-d7 restore original arguments
+         eor.l     d6,d7   produce proper sign
+         add.l     d7,d7     shift sign out
+         move.l    #expmsk<<1,d7 setup infinity (exponent all ones)
+         roxr.l    #1,d7     set sign back in ("v" cleared)
+         rts                 return with result and ccr set
+ 
+         end
+
+   set sign back in ("v" cleared)
+         rts                 return with result and ccr set
+ 
+         end
+
+   set sign back in ("v" cleared)
+         rts                 return with result and ccr set
+ 
+         end
+
+   set sign back in ("v" cleared)
+         rts                 return with result and ccr set

CPM OPERATING SYSTEMS/CPM 68K/1.2 SOURCE/8/IEFCMP.S

@@ -0,0 +1,191 @@
+       ttl     ieee format equivalent compare and test (iefcmp/ieftst)
+***************************************
+* (c) copyright 1981 by motorola inc. *
+***************************************
+ 
+*************************************************************
+*                     iefcmp                                *
+*  fast floating point ieee format equivalent compare       *
+*                                                           *
+*          (result is test of destination - source)         *
+*                                                           *
+*  input:  d6 - ieee format number (source)                 *
+*          d7 - ieee format number (destination)            *
+*                                                           *
+*  output: the condition code register is set to directly   *
+*           reflect the following results of the test:      *
+*                                                           *
+*                  eq         equal                         *
+*                  ne         not equal                     *
+*                  gt         greater than                  *
+*                  ge         greater than or equal         *
+*                  lt         less than                     *
+*                  le         less than or equal            *
+*                  cc         ordered                       *
+*                  cs         unordered                     *
+*                                                           *
+*      condition codes:                                     *
+*              n - set for proper arithmetic tests          *
+*              z - set if result is zero                    *
+*              v - set for proper arithmetic tests          *
+*              c - set if result is unordered               *
+*                  (not-a-number operand)                   *
+*              x - undefined                                *
+*                                                           *
+*               all registers transparent                   *
+*                                                           *
+*            maximum stack usage:    32 bytes               *
+*                                                           *
+*  notes:                                                   *
+*    1) the unordered condition results whenever any        *
+*       argument is a nan (not-a-number).  the carry bit    *
+*       will be returned on if this occurs.  this is        *
+*       different from most of the other mc68344 ieee format*
+*       equivalent operations in that they return the "v"   *
+*       bit set which is handy for use of the "trapv"       *
+*       instruction.  however, "v" must be used here for the*
+*       signed arithmetic comparisons.                      *
+*    2) iefcmp recognizes and properly handles all single-  *
+*       precision ieee format values and data types.        *
+*    3) infinities are handled in affine mode (plus and     *
+*       minus infinities are allowed and operate with non-  *
+*       infinities).                                        *
+*                                                           *
+*************************************************************
+         page
+ 
+iefcmp idnt    1,1  ieee format equivalent compare/test
+ 
+         opt       pcs
+ 
+         xref      iefdop  double argument conversion routine
+       xref    ffpcpyrt        copyright notice
+ 
+         section  9
+         xdef      iefcmp    ieee format compare
+ 
+ccrcbit  equ       $01       condition code register "c" bit mask
+ 
+***********************
+* compare entry point *
+***********************
+iefcmp   move.l    d7,-(sp)  save callers original d7
+         jsr       iefcall   call internal routine (nans will return here)
+* if control returns here it will be from iefdopt detecting a nan
+         move.l    (sp)+,d7  restore original d7 in case arg1 nan and not arg2
+         or        #ccrcbit,ccr set c-bit for unordered nan encntrd [vlh]
+         rts                    return to caller with "c" set
+ 
+* internal subroutine.  split nan's away via call to iefdop.  iefdop will
+* directly return to the code above if it detects either operand to be a nan.
+iefcall  jsr       iefdop    decode both operands
+         bra.s     iefnrm    +0 normalized return (or zero or denormalized)
+         bra.s     iefinf2   +2 arg2 infnity return
+         bra.s     iefinf1   +4 arg1 infnity return
+*                                       +6 both infinity return
+ 
+* both values are infinity.  we can substitute +1 and -1 values for plus and
+* minus infinity respectively, and continue with a straight arithmetic compare.
+         move.l    #30,d5    setup shift count for sign propagation
+         asr.l     d5,d7     change to plus or minus one
+         asr.l     d5,d6     change to plus or minus one
+         jmp       iefdocmp  now finish with standard arithmetic compare
+ 
+* arg2 is infinity and not arg1 - substitute $80000000 (lowest binary value)
+* for negative infinity to force proper compare
+iefinf2  tst.l     d7        ? was this minus infinity
+         bpl.s     iefinf2p  branch if ok to compare
+         lsl.l     #8,d7     change to smallest negative number for compare
+iefinf2p jsr       ieffix1   reload and fix arg1 negative zeroes
+         jmp       iefdocmp  now finish with compare
+ 
+* arg1 is infinity and not arg2 - substitude $80000000 (lowest binary value)
+* for negative infinity to force proper compare
+iefinf1  tst.l     d6        ? was this minus infinity
+         bpl.s     iefdarg2  branch if not, ok to use
+         lsl.l     #8,d6     set to smallest negative value
+         jmp       iefdarg2  reload and fix arg2 negative zeroes
+ 
+* all normalized, denormalized, or zeroes return here.
+* except for minus zeroes, a simple arithmetic compare can be
+* done directly on the original ieee arguments.  minus zeroes are
+* changed to true arithmetic zeroes.
+iefnrm   jsr       ieffix1   load and fix negative zeroes for first argument
+iefdarg2 move.l    16(sp),d7 reload arg2
+         add.l     d7,d7     test for plus or minus zero
+         beq.s     iefdocmp  br zero, use true zero for compare
+         move.l    16(sp),d7 reload and use original value
+iefdocmp cmp.l     d6,d7     perform the compare (destination minus source)
+         and       #$7f-ccrcbit,ccr force c-bit off for ordered cmpr [vlh]
+         movem.l   (sp)+,d3-d7 restore callers original registers
+         add.l     #8,sp     skip over internal return address and saved d7
+         rts                 return with arithmetic compare condition code
+ 
+* load and fix argument 1 for negative zeroes
+ieffix1  move.l    12+4(sp),d6 reload it back
+         add.l     d6,d6     check for plus or minus zero
+         beq.s     ieffixr   return if zero to use true zero
+         move.l    12+4(sp),d6 reload and use original value
+ieffixr  rts                 return to caller
+         page
+*************************************************************
+*                     ieftst                                *
+*  fast floating point ieee format equivalent test          *
+*                                                           *
+*          (result is test of destination minus zero)       *
+*                                                           *
+*  input:  d7 - ieee format number (destination)            *
+*                                                           *
+*  output: the condition code register is set to directly   *
+*           reflect the following results of the test:      *
+*                                                           *
+*                  eq         equal zero                    *
+*                  ne         not equal zero                *
+*                  pl         positive value                *
+*                  mi         negative value                *
+*                  vc         not a nan (not-a-number)      *
+*                  vs         nan (not-a-number)            *
+*                                                           *
+*      condition codes:                                     *
+*              n - set if negative                          *
+*              z - set if zero                              *
+*              v - set if nan (not-a-number)                *
+*              c - undefined                                *
+*              x - undefined                                *
+*                                                           *
+*               all registers transparent                   *
+*                                                           *
+*            total stack usage:    24 bytes                 *
+*                                                           *
+*  notes:                                                   *
+*    1) iefcmp recognizes and properly handles all single-  *
+*       precision ieee format values and data types.        *
+*                                                           *
+*************************************************************
+         page
+ 
+         xref      iefsop  single argument conversion routine
+         xref      iefrtod7 return original d7 to caller as result
+ 
+         xdef      ieftst    ieee format test
+ 
+********************
+* test entry point *
+********************
+ieftst   jsr       iefsop    separate out nans back to caller
+         nop                 +0 normalized zero or denormalized
+*                                       +2 argument was infinity
+ 
+* merely return with d7 as the result. ccr will be set properly
+         jmp       iefrtod7   return old original d7
+ 
+         end
+
+properly
+         jmp       iefrtod7   return old original d7
+ 
+         end
+
+properly
+         jmp       iefrtod7   return old original d7
+ 

CPM OPERATING SYSTEMS/CPM 68K/1.2 SOURCE/8/IEFFPI.S

@@ -0,0 +1,93 @@
+        ttl       ieee format equivalent float to integer (ieffpi)
+**************************************
+* (c) copyright 1981 by motorla inc. *
+**************************************
+ 
+***********************************************************
+*    ieffpi - ieee format equivalent float to integer     *
+*                                                         *
+*      input:  d7 = ieee format number                    *
+*      output: d7 = fixed point longword integer          *
+*                            (2's complement)             *
+*                                                         *
+*  condition codes:                                       *
+*             n - set if result is negative               *
+*             z - set if result is zero                   *
+*             v - set if result overflowed integer        *
+*                 representation or input was a nan       *
+*                 (not-a-number)                          *
+*             c - undefined                               *
+*             x - undefined                               *
+*                                                         *
+*     registers are transparent over this routine         *
+*                                                         *
+*              stack used:    54 bytes                    *
+*                                                         *
+*  the range provided with 2's complement longword binary *
+*  is:   -2,147,483,649 < value < +2,147,483,648          *
+*                                                         *
+*  notes:                                                 *
+*   1) since ieee single precision format holds 24 bits   *
+*      of precision which is less than the 31 bits of     *
+*      longword binary integer arithmetic, results of     *
+*      over 24 bit integer magnitude will be imprecise    *
+*      and have low-end zeroes.                           *
+*   2) if the input argument is too large to be contained *
+*      in the longword fixed point binary format, the     *
+*      largest possible magnitude value is returned with  *
+*      the "v" bit set in the condition code register.    *
+*   3) if a nan (not-a-number) is the input argument,     *
+*      it will be returned as is with the "v" bit set.    *
+*   4) since the "v" bit is set for two possible          *
+*      conditions (overflow or nan) they can be separated *
+*      by testing the significand (bits 0 thru 22).  if   *
+*      these bits are all ones, then the value probably   *
+*      was an overflow.  any other pattern indicates the  *
+*      input argument was nan.                            *
+*                                                         *
+***********************************************************
+         page
+         xdef      ieffpi    entry point
+ 
+        xref      ffpfpi    fast floating point float to integer
+        xref      ffpfieee  ffp conversion of ieee to ffp format
+        xref      iefsop    ieee single operand convert internal routine
+        xref      ffpcpyrt  copyright notice
+ 
+ieffpi  idnt      1,1  ieee format equivalent float to integer
+ 
+        section    9
+ 
+*************************
+* ieee float to integer *
+*************************
+ieffpi   bsr       iefsop    convert to fast floating point or reject nan
+         bra.s     iefnrm    +0 normalized value, denormalized value or zero
+*                                       +2 argument infinity
+ 
+* infinity - convert to ffp format's largest magnitude
+         bsr       ffpfieee  ffp's conversion will force to highest possible
+ 
+* normalized value, denormalized or zero
+iefnrm   bsr       ffpfpi    convert from fast floating point to integer
+         movem.l   (sp)+,d3-d6 reload callers registers
+         add.l     #4,sp     skip original argument
+         rts                 return to caller with integer in d7 and ccr set
+ 
+         end
+,sp     skip original argument
+         rts                 return to caller with integer in d7 and ccr set
+ 
+        end
+,sp     skip original argument
+         rts                 return to caller with integer in d7 and ccr set
+ 
+        end
+,sp     skip original argument
+         rts                 return to caller with integer in d7 and ccr set
+ 
+        end
+,sp     skip original argument
+         rts                 return to caller with integer in d7 and ccr set
+ 
+    

CPM OPERATING SYSTEMS/CPM 68K/1.2 SOURCE/8/IEFFRONT.S

@@ -0,0 +1,296 @@
+         ttl       ieee format front-end routines (ieffront)
+ieffront idnt   1,1  ieee format equivalent front-end routines
+******************************************
+*  (c)  copyright 1981 by motorola inc.  *
+******************************************
+ 
+*******************************************************
+*               idfsop (internal subroutine)          *
+*     ieee format equivalent process single operand   *
+*                                                     *
+*  input:   d7 - ieee format number argument2         *
+*           sp -> +0 return address to caller         *
+*                 +4 original caller's return address *
+*                                                     *
+*  output:  d6 converted to fast floating point       *
+*           format with user's original registers     *
+*           d3-d7 stacked or a direct return bypassing*
+*           the first-line routine if either          *
+*           parameter was a nan                       *
+*                                                     *
+*                                                     *
+*     return is via vectored branch with offset added *
+*     to the address on the stack.  this allows easy  *
+*     type descrimination by the caller for selected  *
+*     data types:                                     *
+*                                                     *
+*   return  +0   if the argument is normalized        *
+*                (including zero and denormalized)    *
+*           +2   if argument is an infinity           *
+*                                                     *
+*   the stack appears:  s+0  original d3-d7 upon entry*
+*                       s+20 original caller's return *
+*                                                     *
+*  condition codes:                                   *
+*                                                     *
+*       (only if bypassed return done)                *
+*                                                     *
+*            n - undefined                            *
+*            z - cleared                              *
+*            v - set (result is a nan)                *
+*            c - undefined                            *
+*            x - undefined                            *
+*                                                     *
+*       (only if return to immediate caller)          *
+*                                                     *
+*            n - set if value is negative             *
+*            z - set if value is a zero               *
+*            v - undeinfed                            *
+*            c - undefined                            *
+*            x - undefined                            *
+*                                                     *
+*  this routine is a front end for the ieee format    *
+*  capatible routines (ief routines).  it may         *
+*  bypass the caller to directly return to the user   *
+*  code if the argument is a nan (not-a-number)       *
+*  since the result must be a nan (the same).         *
+*  the call to this routine must be the               *
+*  first instruction of the level-1 ief routine,      *
+*  since it may return directly to the original       *
+*  caller.  also registers must be unaltered before   *
+*  the call.                                          *
+*                                                     *
+*  logic:  the following decision tree shows the      *
+*          processing for this routine and what       *
+*          values are returned for the argument       *
+*                                                     *
+*   if arg is nan then                                *
+*         set the "v" bit in the ccr and bypass the   *
+*         caller returning with arg (d7) unchanged    *
+*                                                     *
+*   if arg is an infinity then adjust return address  *
+*         and return with ccr set for plus or minus   *
+*         at offset +2                                *
+*                                                     *
+*   if arg is denormalized then set it to zero        *
+*        else it is normalized - convert to ffp format*
+*                                                     *
+*   return to caller at +0 offset                     *
+*                                                     *
+*  notes:                                             *
+*  1) during the conversion of normalized ieee format *
+*     numbers to ffp format, the exponent may be too  *
+*     large for ffp magnitudes.  when this is true    *
+*     then the value is converted to an infinity with *
+*     the proper sign.  if the exponent is too small  *
+*     than a zero is returned.  see the mc68344 user's*
+*     guide for complete details of the range handling*
+*     of the fast floating point format conversion.   *
+*  2) all zeroes are treated as positive values.      *
+*  3) denormalized values are treated as zeroes.      *
+*                                                     *
+*******************************************************
+ 
+         section   9
+ 
+         xdef      iefsop    single operand convert
+ 
+expmsk   equ       $7f800000 ieee format exponent mask
+vbit     equ       $0002     condition code "v" bit mask
+cbit     equ       $0001     condition code "c" bit mask
+ 
+* call internal subroutine to parse argument (d7)
+iefsop   lea       -16(sp),sp adjust stack for new return address position
+         move.l    16(sp),-(sp) move return address to new location
+         movem.l   d3-d7,4(sp) save original caller's registers
+         bsr.s     iefprse   convert argument two
+         bcc.s     iefargs   branch not infinity
+         move.w    sr,d5    save ccr [vlh] was sr
+         add.l     #2,(sp)   adjust return address
+         move.w    d5,ccr    restore ccr
+iefargs  rts                 return to caller at proper offset
+         page
+*******************************************************
+*               idfdop (internal subroutine)          *
+*     ieee format equivalent process double operand   *
+*                                                     *
+*  input:   d6 - ieee format number argument1         *
+*           d7 - ieee format number argument2         *
+*           sp -> +0 return address to caller         *
+*                 +4 original caller's return address *
+*                                                     *
+*  output:  d6/d7 converted to fast floating point    *
+*           format with user's original registers     *
+*           d3-d7 stacked or a direct return bypassing*
+*           the first-line routine if either          *
+*           parameter was a nan                       *
+*                                                     *
+*                                                     *
+*     return is via vectored branch with offset added *
+*     to the address on the stack.  this allows easy  *
+*     type descrimination by the caller for selected  *
+*     data types:                                     *
+*                                                     *
+*   return  +0   if both arguments normalized         *
+*                (including zero and denormalized)    *
+*           +2   if arg2 is an infinity               *
+*           +4   if arg1 is an infinity               *
+*           +6   if both arguments are infinities     *
+*                                                     *
+*   the stack appears:  s+0  original d3-d7 upon entry*
+*                       s+20 original caller's return *
+*                                                     *
+*  condition codes:                                   *
+*                                                     *
+*      (only if bypassed return done)                 *
+*                                                     *
+*            n - undefined                            *
+*            z - cleared                              *
+*            v - set (result is a nan)                *
+*            c - undefined                            *
+*            x - undefined                            *
+*                                                     *
+*      (only if return directly to immediate caller)  *
+*                                                     *
+*            n - set if arg1 is negative              *
+*            z - set if arg1 is zero                  *
+*            v - undefined                            *
+*            c - set if arg1 is an infinity           *
+*            x - undefined                            *
+*                                                     *
+*  this routine is a front end for the ieee format    *
+*  capatible routines (ief routines).  it may         *
+*  bypass the caller to directly return to the user   *
+*  code if an argument is a nan (not-a-number)        *
+*  since the result must be a nan.  it must be the    *
+*  first instruction of the level-1 ief routine,      *
+*  since it may return directly to the original       *
+*  caller.  also registers must be unaltered before   *
+*  the call.                                          *
+*                                                     *
+*  logic:  the following decision tree shows the      *
+*          processing for this routine and what       *
+*          values are returned for arg1 and arg2      *
+*                                                     *
+*   if arg2 is nan then                               *
+*         set the "v" bit in the ccr and bypass the   *
+*         caller returning with arg2 (d7) unchanged   *
+*                                                     *
+*   if arg1 is nan then                               *
+*         set the "v" bit in the ccr and bypass the   *
+*         caller returning with arg1 copied to arg2   *
+*                                                     *
+*   if arg2 is an infinity then adjust return address *
+*                                                     *
+*   if arg1 is an infinity then adjust return address *
+*                                                     *
+*   if arg2 is denormalized then set it to zero       *
+*        else it is normalized - convert to ffp format*
+*                                                     *
+*   if arg1 is denormalized then set it to zero       *
+*        else it is normalized - convert to ffp format*
+*                                                     *
+*   return to caller at proper offset                 *
+*                                                     *
+*  notes:                                             *
+*  1) during the conversion of normalized ieee format *
+*     numbers to ffp format, the exponent may be too  *
+*     large for ffp magnitudes.  when this is true    *
+*     then the value is converted to an infinity with *
+*     the proper sign.  if the exponent is too small  *
+*     than a zero is returned.  see the mc68344 user's*
+*     guide for complete details of the range         *
+*     treatment by the fast floating point conversion.*
+*  2) all zeroes are treated as positive values.      *
+*  3) denormalized values are treated as zeroes.      *
+*                                                     *
+*******************************************************
+ 
+         section   9
+ 
+         xdef      iefdop    dual operand convert
+ 
+* call internal subroutine to parse argument 2 (d7)
+iefdop   lea       -16(sp),sp reset stack for register storage
+         move.l    16(sp),-(sp) move return address to new bottom of stack
+         movem.l   d3-d7,4(sp) save original registers above return address
+         bsr.s     iefprse   convert argument two
+         bcc.s     iefarg2   branch not infinity
+         add.l     #2,(sp)   adjust return address
+iefarg2  exg.l     d6,d7     swap arguments to convert arg1 (nan returns arg1)
+         bsr.s     iefprse   convert second argument
+         bcc.s     iefnoti   branch not infinity
+         move.w    sr,d5    save ccr [vlh] was sr
+         add.l     #4,(sp)   adjust return address
+         move.w    d5,ccr    restore ccr
+iefnoti  exg.l     d6,d7     swap arguments back into place
+         rts                 return to caller
+         page
+*
+* internal convert subroutine
+*   convert the argument in d7 to fast floating point format and return
+*   ccr set for test against sign and zero
+*
+* output:
+*         if nan - direct return bypassing caller with nan in d7 and "v" set
+*           else return with converted value and "c" bit if is an infnity
+*
+iefprse  move.l    d7,d5     save original argument
+         swap.w    d7        swap word halves
+         ror.l     #7,d7     exponent to low byte
+         eor.b     #$80,d7     convert from excess 127 to two's-complement
+         add.b     d7,d7     from 8 to 7 bit exponent
+         bvs.s     iefovf    branch will not fit
+         add.b     #2<<1+1,d7 adjust excess 127 to 64 and set mantissa high bit
+         bvs.s     iefexh    branch exponent too large (overflow)
+         eor.b     #$80,d7     back to excess 64
+         ror.l     #1,d7     to fast float representation
+         tst.b     d7        clear carry
+         rts                 return to caller
+ 
+* overflow detected - caused by one of the following:
+*        - false exponent overflow due to difference in excess notations
+*        - exponent too high or low to fit in 7 bits (exponent over/underflow)
+*        - an exponent of $ff representing an infinity
+*        - an exponent of $00 representing a zero, nan, or denormalized value
+iefovf   bcc.s     iefovlw   branch if overflow (exponent $ff or too large)
+* check for false overflow
+         cmp.b     #$7c,d7   ? will corrected value be ok
+         beq.s     ieffov    yes, branch if false overflow
+         cmp.b     #$7e,d7   ? will corrected value be in range
+         bne.s     iefnotf   no, branch not false overflow
+ieffov   add.b     #$80+2<<1+1,d7 back to excess 64 and set mantissa high bit
+         ror.l     #1,d7     to fast floating point representation
+         tst.b     d7        insure not illegal zero sign+exponent byte
+         bne.s     iefcrt    no, is ok so return "c" cleared
+* exponent low - is zero, denormalized value, or too small an exponent
+iefnotf  move.l    #0,d7     return zero for all of these cases ("c" cleared)
+iefcrt   rts                 return to caller
+ 
+* exponent high - check for exponent too high, infinity, or nan
+iefovlw  cmp.b     #$fe,d7   ? was original exponent $ff
+         bne.s     iefexh    no, branch exponent too large
+         lsr.l     #8,d7     shift out exponent
+         lsr.l     #1,d7     shift sign out into "x" bit
+         beq.s     iefexhi   branch if true infinity
+ 
+* arg2 is a nan - bypass caller and return as the result with "v" bit set
+         move.l    d5,d7     return original argument
+         add.l     #8,sp     skip internal and caller return addresses
+         movem.l   (sp)+,d3-d6 return registers intact
+         add.l     #4,sp     skip original d7
+         or.b      #vbit,ccr set v bit on [vlh]
+         rts                 return to original caller
+ 
+* arg2 is infinity or exponent too large so force to infinity (sign is bit 8)
+iefexh   lsl.w     #8,d7     set "x" ccr bit same as sign
+iefexhi  move.l    #expmsk<<1,d7 set exponent all ones for infinity and over 1
+         roxr.l    #1,d7     shift sign and and finished result
+         or.b      #cbit,ccr set "c" bit on for infinity notice [vlh]
+         rts                 return to conversion routine
+ 
+         end
+
+d
+
+d

CPM OPERATING SYSTEMS/CPM 68K/1.2 SOURCE/8/IEFIFP.S

@@ -0,0 +1,60 @@
+      ttl     ieee format equivalent integer to float (iefifp)
+************************************
+* (c) copyright 1981 motorla inc.  *
+************************************
+ 
+***********************************************************
+*    iefifp - ieee format equivalent integer to float     *
+*                                                         *
+*      input: d7 = fixed point integer (2's complement)   *
+*      output: d7 = ieee format floating point equivalent *
+*                                                         *
+*      condition codes:                                   *
+*                n - set if result is negative            *
+*                z - set if result is zero                *
+*                v - cleared (not a nan)                  *
+*                c - undefined                            *
+*                x - undefined                            *
+*                                                         *
+*            registers are transparent                    *
+*                                                         *
+*          maximum stack used:    28 bytes                *
+*                                                         *
+*  notes:                                                 *
+*   1) since a longword binary value contains 31 bits of  *
+*      precision which is more than the effective 24 bits *
+*      available with the ieee single-precision format,   *
+*      integers of greater than 24 bit magnitude will be  *
+*      rounded and imprecise.                             *
+*                                                         *
+***********************************************************
+         page
+      xdef    iefifp      external name
+ 
+         xref      ffpifp   fast floating point integer convert
+         xref      ieftieee convert ffp to ieee and return
+         xref      ffpcpyrt copyright notice
+ 
+iefifp idnt    1,1  ieee format equivalent integer to float
+ 
+         section  9
+ 
+iefifp   movem.l   d3-d7,-(sp) save work registers
+         bsr       ffpifp    convert to fast floating point format
+         bra       ieftieee  to ieee format, test, and return
+ 
+         end
+pifp    convert to fast floating point format
+         bra       ieftieee  o ieee format, test, and return
+ 
+         end
+pifp    convert to fast floating point format
+         bra       ieftieee  o ieee format, test, and return
+ 
+         end
+pifp    convert to fast floating point format
+         bra       ieftieee  o ieee format, test, and return
+ 
+         end
+pifp    convert to fast floating point format
+         bra       ieftieee  

CPM OPERATING SYSTEMS/CPM 68K/1.2 SOURCE/8/XDOPRTFP.C

@@ -0,0 +1,59 @@
+/****************************************************************************/
+/*									    */
+/*			X d o p r t f p   R o u t i n e			    */
+/*			-------------------------------			    */
+/*									    */
+/*	This file contains subroutines called from "_doprt()" which are	    */
+/*	specific to floating point.  The purpose of having a separate file  */
+/*	is so that these routines may be declared global in a special 	    */
+/*	version of "s.o", to allow running without the floating point 	    */
+/*	library routines.						    */
+/*									    */
+/*	Entry Points:							    */
+/*									    */
+/*		petoa(^float, ^buff, prec);				    */
+/*		pftoa(^float, ^buff, prec);				    */
+/*									    */
+/*	^float	is a pointer to the floating number to convert		    */
+/*	^buff	is a pointer to the buffer				    */
+/*	prec	is the precision specifier				    */
+/*									    */
+/****************************************************************************/
+#include <portab.h>			/*				    */
+BYTE	*ftoa();			/* Converts float to ascii "F" fmt  */
+BYTE	*etoa();			/* Converts float to ascii "E" fmt  */
+					/************************************/
+BYTE	*pftoa(addr,buf,prec)		/* Print "F" format		    */
+FLOAT	*addr;				/* -> Number to convert		    */
+BYTE	*buf;				/* -> Output buffer		    */
+WORD	prec;				/* Fraction precision specifier	    */
+{					/************************************/
+	FLOAT	fp;			/* Float temp			    */
+					/************************************/
+	prec = (prec < 0) ? 6 : prec;	/* If < 0, make it 6		    */
+	fp = *addr;			/* Load float number		    */
+	return(ftoa(fp,buf,prec));	/* Do conversion		    */
+}					/************************************/
+					/*				    */
+BYTE	*petoa(addr,buf,prec)		/* Print "E" format		    */
+FLOAT	*addr;				/* -> Number to convert		    */
+BYTE	*buf;				/* -> Output buffer		    */
+WORD	prec;				/* Fraction precision specifier	    */
+{					/************************************/
+	FLOAT	fp;			/* Floating temp		    */
+	prec = (prec < 0) ? 6 : prec;	/* If < 0, make it 6		    */
+	fp = *addr;			/* Load temp			    */
+	return(etoa(fp,buf,prec));	/* Do conversion		    */
+}					/************************************/
+;			/* Load temp			    */
+	return(etoa(fp,buf,prec));	/* Do conversion		    */
+}					/***********************************/
+;			/* Load temp			    */
+	return(etoa(fp,buf,prec));	/* Do conversion		    */
+}					/***********************************/
+;			/* Load temp			    */
+	return(etoa(fp,buf,prec));	/* Do conversion		    */
+}					/***********************************/
+;			/* Load temp			    */
+	return(etoa(fp,buf,prec));	/* Do conversion		    */
+}					/***