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Digital Research
This commit is contained in:
Sepp J Morris
2020-11-06 18:50:37 +01:00
parent 621ed8ccaf
commit 31738079c4
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1075
CPM OPERATING SYSTEMS/CPM 8000 (CPM8K)/P-CP M-Z8K SOURCES/ddt/dbg.c Normal file
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114
CPM OPERATING SYSTEMS/CPM 8000 (CPM8K)/P-CP M-Z8K SOURCES/ddt/dbgsys.z8k Normal file
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;
; Z8000 CPM kernal to DDT debugger interface
;
;
; Oct. 20, 1982 Thorn Smith
;
;
; ***** PROPRIETARY ******
;
; This document is the property of Zilog corporation,
; and is protected from unauthorized duplication under
; applicable federal, state, and civil copyright laws.
; No part of this document may be reproduced, stored,
; or transmitted, in any form or by any means, such as
; electronic, mechanical, photocopying, recording, or
; otherwise, without the prior written permission of
; Zilog, inc. 1315 Dell Avenue, Campbell, Ca. 95008
; tel: (408) 370-8000 twx: 910-338-7621
;
; Copyright 1982 Zilog Corporation, all rights reserved.
;
; date listed: ______ ____/____/____ ____:____ ____
;
; project name: #916ss - Zilog cross software development
;
; program name: Breakpoint to debugger interface.
;
; programmer: Thorn Smith x 8317
;
; environment: Zilog S8000 1 v1.7
;
; language: Zilog PLZ-ASM, Zeus C
;
; approvals-mgr: ________________________________________, Zilog
;
; approvals-q.a: ________________________________________, Zilog
;
; approvals-d.v: ________________________________________, Zilog
;
SUPV .equ 62 ; supervisor state BDOS call
MEM_SC .equ 1 ; memory call
BDOS_SC .equ 2 ; system call number 2
.global _frame
.global _dbg
.global _getsp
.global _bkptrap
; *************************************************
; * *
; * S T A R T O F C O D E *
; * *
; *************************************************
__text .sect
;
;******** get the sp (rr14)
;
_getsp:
ldl rr6,rr14
ret
;
;******** unimplemented instruction trap interface to debugger
;
; upon entry, rr14 points to a frame structure as follows:
; trap return address, r0-r15, 0x7f00, FCW, pcseg, pcoff
;
_bkptrap:
ldl rr8,rr14 ; rr8= frame pointer
inc r9,#4 ; bump the long return address to this rtn
ldctl r0,FCW
and r0,#03FFFh ; unset nonseg and system mode
or r0,#01800h ; enable vi, nvi
ldctl FCW,r0 ; BOOM! NOW IN NORMAL NONSEG MODE W/NORMAL SP !
; rr6= source (adjusted stack)
ldl rr6,#_frame ; rr4= dest. temporary address in this segment
ld r5,#0 ; 0= caller data space
ldl rr2,#0 ;
sc #MEM_SC ; map adr, rr6= physical address
ldl rr2,#040 ; rr2= length
ldl rr4,rr6 ; rr4= dest= physical address of #_frame
ldl rr6,rr8 ; rr6= source= frame on stack
pushl @r15,rr4 ; preserve physical address of #_frame
sc #MEM_SC ; copy memory
push @r15,#_frame ; state
call _dbg ; call the debugger with the frame as an arg.
inc r15,#2 ;
popl rr6,@r15 ; rr6= source= physical address of #_frame
ldl rr4,rr8 ; rr4= dest= top of stack on frame
ldl rr2,#040 ; rr2= length
sc #MEM_SC ; copy memory
ld r5,#SUPV ; SUPV= request to switch to system mode.
sc #BDOS_SC ; BOOM! NOW IN SYSTEM SEG MODE W/SYSTEM SP !
ret ; presumably, this does the xfer.
; *************************************************
; * *
; * S T A R T O F R A M *
; * *
; *************************************************

207
CPM OPERATING SYSTEMS/CPM 8000 (CPM8K)/P-CP M-Z8K SOURCES/ddt/env.c Normal file
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#include "env.h"
#include "u.h"
int memode;
int mfile; /* memory file */
BYTE memory[MEMSIZE];
struct symbol regtbl[] ={
0, 0, "?",
RINT, 0x00, "r0",
RINT, 0x02, "r1",
RINT, 0x04, "r2",
RINT, 0x06, "r3",
RINT, 0x08, "r4",
RINT, 0x0A, "r5",
RINT, 0x0C, "r6",
RINT+RCR, 0x0E, "r7",
RINT, 0x10, "r8",
RINT, 0x12, "r9",
RINT, 0x14, "ra",
RINT, 0x16, "rb",
RINT, 0x18, "rc",
RINT, 0x1A, "rd",
RINT, 0x1C, "re",
RINT+RCR, 0x1E, "rf",
RCHR, 0x00, "rh0", RCHR, 0x01, "rl0",
RCHR, 0x02, "rh1", RCHR, 0x03, "rl1",
RCHR, 0x04, "rh2", RCHR, 0x05, "rl2",
RCHR, 0x06, "rh3", RCHR, 0x07, "rl3",
RCHR, 0x08, "rh4", RCHR, 0x09, "rl4",
RCHR, 0x0a, "rh5", RCHR, 0x0b, "rl5",
RCHR, 0x0c, "rh6", RCHR, 0x0d, "rl6",
RCHR, 0x0e, "rh7", RCHR, 0x0f, "rl7",
RCHR, 0x10, "rh8", RCHR, 0x11, "rl8",
RCHR, 0x12, "rh9", RCHR, 0x13, "rl9",
RCHR, 0x14, "rha", RCHR, 0x15, "rla",
RCHR, 0x16, "rhb", RCHR, 0x17, "rlb",
RCHR, 0x18, "rhc", RCHR, 0x19, "rlc",
RCHR, 0x1a, "rhd", RCHR, 0x1b, "rld",
RCHR, 0x1c, "rhe", RCHR, 0x1d, "rle",
RCHR, 0x1e, "rhf", RCHR, 0x1f, "rlf",
RINT, 0x20, "id",
RINT, 0x22, "$$",
#ifdef Z8001
RINT, 0x24, "pcs",
RINT, 0x26, "pc",
#else
RINT, 0x24, "pc",
#endif
0, 0, "",
};
/*
******** the FCW bits
*/
struct bitable pflags[] ={
'f', 0x8000,
'x', 0x4000,
'e', 0x2000,
'v', 0x1000,
'n', 0x0800,
'a', 0x0400,
'9', 0x0200,
'8', 0x0100,
'c', 0x0080,
'z', 0x0040,
's', 0x0020,
'p', 0x0010,
'd', 0x0008,
'h', 0x0004,
'1', 0x0002,
'0', 0x0001,
'\0', 0x0000,
};
/*
**
** *************************************************
** * *
** * S U B R O U T I N E S F O R Z 8 K *
** * *
** *************************************************
**
*/
/*
******** initializer
*/
dbginit (state)
union pstate *state;
{
return;
}
/*
******** Single stepper
*/
sstep (state)
union pstate *state;
{
int diopn;
diopn= deasm((POINTER)state->lregs.pc,oline);
printf ("%s\n",oline);
state->lregs.pc += getnext(diopn);
return(diopn);
}
/*
******** breakpoint routines
*/
tstrap (addr)
POINTER addr;
{
if (ldint(addr) == BKPT) return (1);
return (0);
}
setrap (addr,bkpt)
POINTER addr;
WORD bkpt;
{
WORD oldop;
oldop= ldint(addr);
stint (addr,bkpt);
return (oldop & 0xFFFF);
}
/*
******** Memory access routines
*/
WORD ldint (addr)
POINTER addr;
{
return (((ldchr(addr) << 8) & 0xFF00) | (ldchr(addr+1) & 0xFF));
}
stint (addr,data)
POINTER addr;
WORD data;
{
stchr (addr,(data >> 8) & 0xFF);
stchr (addr+1,data & 0xFF);
}
BYTE ldstemp; /* load & store temporary varible */
#ifdef CPM
BYTE ldchr (addr)
POINTER addr;
{
mem_cpy (addr,map_adr((LONG)&ldstemp & 0xFFFFL,0),1L);
return (ldstemp & 0xFF);
}
stchr (addr,data)
POINTER addr;
BYTE data;
{
ldstemp= data;
mem_cpy (map_adr((LONG)&ldstemp & 0xFFFFL,0),addr,1L);
}
#else
BYTE ldchr (addr)
POINTER addr;
{
return (*(BYTE *)addr);
}
stchr (addr,data)
POINTER addr;
BYTE data;
{
*(BYTE *)addr= data;
}
#endif
/*
******** IO access routines
*/
pichr (addr)
POINTER addr;
{
return (*(BYTE *)addr);
}
pochr (addr,data)
POINTER addr;
int data;
{
*(BYTE *)addr= data;
}

142
CPM OPERATING SYSTEMS/CPM 8000 (CPM8K)/P-CP M-Z8K SOURCES/ddt/env.h Normal file
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/*
******** Environmental varibles for z8000dm
*/
#define Z8001 1
#ifdef CPM
#include "portab.h"
#include "cpm.h"
#include "stdio.h"
#include "bdos.h"
#define NREGIONS 2 /* number of regions in the MRT */
#define BGETMRT 18 /* SC to get MRT */
#define PGLOAD 59 /* BDOS call to load program */
#define SECLEN 128 /* size of a sector */
struct b_page
{
XADDR ltpa; /* Low TPA address */
XADDR htpa; /* High TPA address */
XADDR lcode; /* Start address of code seg*/
long codelen; /* Code segment length */
XADDR ldata; /* Start address of data seg*/
long datalen; /* Data segment length */
XADDR lbss; /* Start address of bss seg */
long bsslen; /* Bss segment length */
long freelen; /* Free segment length */
char resvd1[20]; /* Reserved area */
struct fcbtab fcb2; /* Second basepage FCB */
struct fcbtab fcb1; /* First basepage FCB */
char buff[128]; /* Default DMA buffer, */
/* command line tail */
};
struct lpb {
XADDR fcbaddr; /* Address of fcb of opened file */
XADDR pgldaddr; /* Low address of prog load area */
XADDR pgtop; /* High address of prog load area, +1 */
XADDR bpaddr; /* Address of basepage; return value */
XADDR stackptr; /* Stack ptr of user; return value */
short lcflags; /* Loader control flags; return value */
} LPB;
struct m_rt { /* The Memory Region Table */
int entries;
struct {
XADDR m_low;
XADDR m_len;
} m_reg[NREGIONS];
};
struct ustack { /* User's initial stack (nonsegmented) */
short two; /* "Return address" (actually a call to */
/* BDOS warm boot in runtime startup) */
short bpgaddr; /* Input parameter: pointer to basepage */
};
extern long map_adr();
#else
#define BYTE char
#define WORD short
#define LONG long
#endif
#define POINTER long
#define OPCODE short
#define BKPT 0x7F00
#define COLS 256
#define SWIDTH 64
/* swap macros */
#define MSWP(a) (a)
#define PSWP(a) (a)
/* globals from env.c */
#define MEMSIZE 0x100
extern BYTE memory[];
extern BYTE ldchr();
extern WORD ldint();
extern int memode;
/* globals from dbg.c */
extern int tractr;
extern POINTER temppc;
/*
******** Z8000 Processor state frame
*/
union pstate {
struct {
WORD r0; /* 00 */
WORD r1; /* 02 */
WORD r2; /* 04 */
WORD r3; /* 06 */
WORD r4; /* 08 */
WORD r5; /* 0a */
WORD r6; /* 0c */
WORD r7; /* 0e */
WORD r8; /* 10 */
WORD r9; /* 12 */
WORD ra; /* 14 */
WORD rb; /* 16 */
WORD rc; /* 18 */
WORD rd; /* 1a */
WORD re; /* 1c */
WORD rf; /* 1e */
WORD id; /* 20 */
WORD fcw; /* 22 */
#ifdef Z8001
WORD pcs; /* 24 */
#endif
WORD pc; /* 24-26 */
} lregs;
struct {
BYTE rh0; BYTE rl0;
BYTE rh1; BYTE rl1;
BYTE rh2; BYTE rl2;
BYTE rh3; BYTE rl3;
BYTE rh4; BYTE rl4;
BYTE rh5; BYTE rl5;
BYTE rh6; BYTE rl6;
BYTE rh7; BYTE rl7;
BYTE rh8; BYTE rl8;
BYTE rh9; BYTE rl9;
BYTE rha; BYTE rla;
BYTE rhb; BYTE rlb;
BYTE rhc; BYTE rlc;
BYTE rhd; BYTE rld;
BYTE rhe; BYTE rle;
BYTE rhf; BYTE rlf;
BYTE id1; BYTE id2;
BYTE f; BYTE f1;
} sregs;
};

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CPM OPERATING SYSTEMS/CPM 8000 (CPM8K)/P-CP M-Z8K SOURCES/ddt/mad.c Normal file
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CPM OPERATING SYSTEMS/CPM 8000 (CPM8K)/P-CP M-Z8K SOURCES/ddt/mad.h Normal file
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/*
******** Z800 opcode table (from z800.c)
*/
#define OFFSET 0x000F
/* standard data types */
#define B1 0x0100 /* bit */
#define B2 0x0200 /* nib */
#define B3 0x0300 /* oct */
#define B4 0x0400 /* nibble */
#define B5 0x0500 /* 5-bit (used for bitL) */
#define X1 0x1100 /* byte */
#define X2 0x1200 /* word */
#define X3 0x1300 /* triple-byte? */
#define X4 0x1400 /* long */
#define X5 0x1500 /* quad */
#define X6 0x1600 /* float */
#define X7 0x1700 /* double */
#define AA 0x2100 /* address */
#define AL 0x2200 /* long address */
#define RB 0x3100 /* byte register */
#define RR 0x3200 /* register */
#define RL 0x3300 /* long register */
#define RQ 0x3400 /* quad register */
#define II 0x4100 /* indirect register either long or short, but not 0 */
#define I0 0x4200 /* indirect register either long or short, incl 0 */
#define IR 0x4300 /* indirect register, but not r0 */
#define IS 0x4400 /* indirect register including r0 */
#define IL 0x4500 /* indirect long register, but not rr0 */
#define L0 0x4600 /* indirect long register including rr0 */
#define PP 0x4800 /* parenthesized register, either long or short, not 0*/
#define PR 0x4900 /* parenthesized register, but not (R0) */
#define P0 0x4A00 /* parenthesized register, but not rr0 */
#define PL 0x4B00 /* parenthesized long register */
#define BB 0x4C00 /* base register (an RR or RL but not R0 or RR0) */
#define BR 0x4D00 /* base register (an RR but not RR), not R0 */
#define BL 0x4E00 /* long base register (an RL but not RR), not RR0 */
#define CC 0x5100 /* condition code */
#define CF 0x5200 /* conditional flag for comflg,resflg,setflg */
#define D1 0x6100 /* 7-bit displacement (for djnz,dbjnz) */
#define D2 0x6200 /* 8-bit displacement (for jr) */
#define D3 0x6300 /* 12-bit displacement (for calr) */
#define D4 0x6400 /* 16-bit displacement (for ld BA) */
#define D5 0x6500 /* 16-bit displacement (for ldr) */
#define SR 0x7100 /* special (control) register */
#define UR 0x7200 /* user special (control) register */
#define VI 0x7400 /* interrupts (vi,nvi) */
#define NI 0x7500 /* interrupts (vi,nvi) */
#define BN 0x7600 /* 1,2 bit field for rl,rlc,rr,rrc */
#define ID 0x7700 /* increment and decrement fields (to be bumped) */
#define P1 0x7800 /* +b field for sla,sll */
#define P2 0x7900 /* +b field for slab,sllb */
#define P3 0x7A00 /* +b field for slal,slll */
#define N1 0x7B00 /* -b field for sra,srl */
#define N2 0x7C00 /* -b field for srab,srlb */
#define N3 0x7D00 /* -b field for sral,srll */
#define SL 0x7E00 /* long special (control) register */
/* bizarre data types */
#define XRST 0x8100
#define XBOF 0x8200
#define XBWD 0x8300
/* register data types */
#define RNS1 0x8400 /* normal single reg(b, c, d, e, h, l, m ) */
#define RNS2 0x8500 /* normal single reg(b, c, d, e, h, l, m ) */
#define XPSR 0x8600 /* prime single reg(b',c',d',e',h',l',m') */
#define XIXY 0x8700 /* XY single reg(ixh, ixl, iyh, iyl) */
#define XISR 0x8800 /* indexed single reg(@(c)) */
#define XNDR 0x8900 /* normal double reg(bc, de, hl, pc, sp) */
#define XPDR 0x8a00 /* prime double reg(bc',de',hl') */
#define XIDR 0x8b00 /* indexed double reg(@(bc,de,hl,sp,ix,iy)) */
#define XIRR 0x8c00 /* indexed registr reg(@(hl+ix,hl+iy,ix+iy))*/
#define XIII 0x8d00 /* i register */
#define XRRR 0x8e00 /* r register */
#define XTXR 0x8f00 /* TX register */
#define DREG 0xA000
#define PSRG 0xA100
#define PDRG 0xA200
#define XOPC 0xA300
#define EM 0xB000
#define BP 0xB100
#define BS 0xB200
struct op {
BYTE opc;
BYTE opb[4];
WORD opa[4];
};
extern struct op ops[];
/*
******** reserved symbol table (from z800.c)
*/
extern char *opcodes[];
extern struct symbol oprands[];
/*
** struct rsym {
** int ltype;
** int lvalu;
** char *label;
** };
**
** extern struct rsym oprands[];
*/
/*
******** globals for assembler / disassembler
**
** int types[MAXARGS] - array for all of the fields
** int fields[MAXARGS] - pointers to start of fields in formatted str2.
** long values[MAXARGS] - array of numeric decode
**
*/
/* maxargs (including comment field) */
#define MAXA 4
#define MAXB 4
#define MAXF 10
extern int args,opcode;
extern int types[];
extern long values[];
extern char *fields[];
extern char tline[];
extern int opsa,opsb;
extern int ttype,fldtype,bitoff,offset,bitnum;
extern int ivalue;
extern long tvalue;
extern int z12,segmode;
extern POINTER slide; /* relative pc offset for assembler */

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This directory contains the source and object files for the Z8000 debugger,
ddt, for CP/M.

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#define SYMLEN 10
#define LASTSYM -1
#define MDASIZE long
#define RQUAD 0x80
#define RLONG 0x40
#define RINT 0x20
#define RCHR 0x10
#define RCR 0x08
#define CODE 1
#define DATA 0
#define CHR(bits8) (bits8 & 0xFF)
#define SHT(bitsf) (bitsf & 0xFFFF)
/*
******** IO
*/
char fgetc(), *gets(), *fgets();
/*
******** symbol stuff
*/
#define SYMDEF 0x80
#define SYMUDEF 0x40
struct symbol {
int utype;
MDASIZE uvalue;
char uname[SYMLEN+1];
};
extern struct symbol regtbl[];
extern struct symbol symtbl[];
/*
******** bit tables
*/
struct bitable {
char bitlabel;
WORD bitmask;
};
extern struct bitable pflags[];
/*
******** debugger flags
*/
#define TTRACE 0x0001
#define XTRACE 0x0002
#define INDBG 0x0010
#define LSTEP 0x0020
#define TEMPPC 0x0040
#define MUFOM 0x0100
/*
******** misc
*/
extern BYTE tbyte;
extern WORD tword;
extern LONG tlong;
extern POINTER tptr;
extern int error,errctr;
extern int infixflg;
extern char *errors[];
extern char *iscan,*oscan,*tscan;
extern char ichksum,ochksum;
extern char iline[COLS],oline[COLS]; /* the IO buffers */
extern WORD bswap();
extern MDASIZE infix(),infixer(),numin(),fltin(),adrin(),hexin(),getsym();
extern char symbuf[SYMLEN+1];
extern char aflag,bflag,cflag,dflag,eflag,hflag,iflag,jflag,kflag;
extern char lflag,mflag,nflag,oflag,pflag,qflag,rflag,sflag,tflag;
extern char uflag,vflag,wflag,xflag,yflag,zflag;

812
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/*
**
**
**
**
**
**
**
**
**
**
**
**
**
**
**
**
**
**
**
*/
#include "env.h"
#include "u.h"
#include "mad.h"
struct op ops[] ={
0002, 0x00,0x00,0x00,0x00, X2+00, 0, 0, 0, /* 0 .word #00123 */
0222, 0xb5,0x00,0x00,0x00, RR+14,RR+10, 0, 0, /* 1 adc r3,r2 */
0222, 0xb4,0x00,0x00,0x00, RB+14,RB+10, 0, 0, /* 2 adcb rh3,rh2 */
0222, 0x81,0x00,0x00,0x00, RR+14,RR+10, 0, 0, /* 3 add r3,r2 */
0022, 0x01,0x00,0x00,0x00, RR+14,II+10, 0, 0, /* 3 add r3,@r2 */
0024, 0x01,0x00,0x00,0x00, RR+14,X2+20, 0, 0, /* 3 add r3,#04567 */
0024, 0x41,0x00,0x00,0x00, RR+14,AA+20,PR+10, 0, /* 3 add r3,4567(r2) */
0024, 0x41,0x00,0x00,0x00, RR+14,AA+20, 0, 0, /* 3 add r3,4567 */
0222, 0x80,0x00,0x00,0x00, RB+14,RB+10, 0, 0, /* 4 addb rh3,rh2 */
0022, 0x00,0x00,0x00,0x00, RB+14,II+10, 0, 0, /* 4 addb rh3,@r2 */
0024, 0x00,0x00,0x00,0x00, RB+14,X1+20, 0, 0, /* 4 addb rh3,#045 */
0024, 0x40,0x00,0x00,0x00, RB+14,AA+20,PR+10, 0, /* 4 addb rh3,4567(r2) */
0024, 0x40,0x00,0x00,0x00, RB+14,AA+20, 0, 0, /* 4 addb rh3,4567 */
0222, 0x96,0x00,0x00,0x00, RL+14,RL+10, 0, 0, /* 5 addl rr2,rr2 */
0022, 0x16,0x00,0x00,0x00, RL+14,II+10, 0, 0, /* 5 addl rr2,@r2 */
0026, 0x16,0x00,0x00,0x00, RL+14,X4+20, 0, 0, /* 5 addl rr2, #0022b */
0024, 0x56,0x00,0x00,0x00, RL+14,AA+20,PR+10, 0, /* 5 addl rr2,4567(r2) */
0024, 0x56,0x00,0x00,0x00, RL+14,AA+20, 0, 0, /* 5 addl rr2,4567 */
0222, 0x87,0x00,0x00,0x00, RR+14,RR+10, 0, 0, /* 6 and r3,r2 */
0022, 0x07,0x00,0x00,0x00, RR+14,II+10, 0, 0, /* 6 and r3,@r2 */
0024, 0x07,0x00,0x00,0x00, RR+14,X2+20, 0, 0, /* 6 and r3,#04567 */
0024, 0x47,0x00,0x00,0x00, RR+14,AA+20,PR+10, 0, /* 6 and r3,4567(r2) */
0024, 0x47,0x00,0x00,0x00, RR+14,AA+20, 0, 0, /* 6 and r3,4567 */
0222, 0x86,0x00,0x00,0x00, RB+14,RB+10, 0, 0, /* 7 andb rh3,rh2 */
0022, 0x06,0x00,0x00,0x00, RB+14,II+10, 0, 0, /* 7 andb rh3,@r2 */
0024, 0x06,0x00,0x00,0x00, RB+14,X1+20, 0, 0, /* 7 andb rh3,#045 */
0024, 0x46,0x00,0x00,0x00, RB+14,AA+20,PR+10, 0, /* 7 andb rh3,4567(r2) */
0024, 0x46,0x00,0x00,0x00, RB+14,AA+20, 0, 0, /* 7 andb rh3,4567 */
0222, 0xa7,0x00,0x00,0x00, RR+10,B4+14, 0, 0, /* 8 bit r2,#3 */
0022, 0x27,0x00,0x00,0x00, II+10,B4+14, 0, 0, /* 8 bit @r2,#3 */
0044, 0x27,0x00,0x00,0x00, RR+24,RR+14, 0, 0, /* 8 bit r5,r3 */
0024, 0x67,0x00,0x00,0x00, AA+20,PR+10,B4+14, 0, /* 8 bit 4567(r2),#3 */
0024, 0x67,0x00,0x00,0x00, AA+20,B4+14, 0, 0, /* 8 bit 4567,#3 */
0222, 0xa6,0x00,0x00,0x00, RB+10,B4+14, 0, 0, /* 9 bitb rh2,#3 */
0022, 0x26,0x00,0x00,0x00, II+10,B4+14, 0, 0, /* 9 bitb @r2,#3 */
0044, 0x26,0x00,0x00,0x00, RB+24,RR+14, 0, 0, /* 9 bitb rh5,r3 */
0024, 0x66,0x00,0x00,0x00, AA+20,PR+10,B4+14, 0, /* 9 bitb 4567(r2),#3 */
0024, 0x66,0x00,0x00,0x00, AA+20,B4+14, 0, 0, /* 9 bitb 4567,#3 */
0222, 0x1f,0x00,0x00,0x00, II+10, 0, 0, 0, /* 10 call @r2 */
0024, 0x5f,0x00,0x00,0x00, AA+20,PR+10, 0, 0, /* 10 call 4567(r2) */
0024, 0x5f,0x00,0x00,0x00, AA+20, 0, 0, 0, /* 10 call 4567 */
0222, 0xd0,0x00,0x00,0x00, D3+04, 0, 0, 0, /* 11 calr 0a0c */
0222, 0x8d,0x08,0x00,0x00, RR+10, 0, 0, 0, /* 12 clr r2 */
0022, 0x0d,0x08,0x00,0x00, II+10, 0, 0, 0, /* 12 clr @r2 */
0024, 0x4d,0x08,0x00,0x00, AA+20,PR+10, 0, 0, /* 12 clr 4567(r2) */
0024, 0x4d,0x08,0x00,0x00, AA+20, 0, 0, 0, /* 12 clr 4567 */
0222, 0x8c,0x08,0x00,0x00, RB+10, 0, 0, 0, /* 13 clrb rh2 */
0022, 0x0c,0x08,0x00,0x00, II+10, 0, 0, 0, /* 13 clrb @r2 */
0024, 0x4c,0x08,0x00,0x00, AA+20,PR+10, 0, 0, /* 13 clrb 4567(r2) */
0024, 0x4c,0x08,0x00,0x00, AA+20, 0, 0, 0, /* 13 clrb 4567 */
0222, 0x8d,0x00,0x00,0x00, RR+10, 0, 0, 0, /* 14 com r2 */
0022, 0x0d,0x00,0x00,0x00, II+10, 0, 0, 0, /* 14 com @r2 */
0024, 0x4d,0x00,0x00,0x00, AA+20,PR+10, 0, 0, /* 14 com 4567(r2) */
0024, 0x4d,0x00,0x00,0x00, AA+20, 0, 0, 0, /* 14 com 4567 */
0222, 0x8c,0x00,0x00,0x00, RB+10, 0, 0, 0, /* 15 comb rh2 */
0022, 0x0c,0x00,0x00,0x00, II+10, 0, 0, 0, /* 15 comb @r2 */
0024, 0x4c,0x00,0x00,0x00, AA+20,PR+10, 0, 0, /* 15 comb 4567(r2) */
0024, 0x4c,0x00,0x00,0x00, AA+20, 0, 0, 0, /* 15 comb 4567 */
0222, 0x8d,0x05,0x00,0x00, CF+10,CF+10,CF+10,CF+10, /* 16 comflg le */
0222, 0x8b,0x00,0x00,0x00, RR+14,RR+10, 0, 0, /* 17 cp r3,r2 */
0022, 0x0b,0x00,0x00,0x00, RR+14,II+10, 0, 0, /* 17 cp r3,@r2 */
0024, 0x0b,0x00,0x00,0x00, RR+14,X2+20, 0, 0, /* 17 cp r3,#04567 */
0024, 0x4b,0x00,0x00,0x00, RR+14,AA+20,PR+10, 0, /* 17 cp r3,4567(r2) */
0024, 0x4b,0x00,0x00,0x00, RR+14,AA+20, 0, 0, /* 17 cp r3,4567 */
0024, 0x0d,0x01,0x00,0x00, IR+10,X2+20, 0, 0, /* 17 cp @r2,#04567 */
0026, 0x4d,0x01,0x00,0x00, AA+20,PR+10,X2+40, 0, /* 17 cp 4567(r2),#089ab */
0026, 0x4d,0x01,0x00,0x00, AA+20,X2+40, 0, 0, /* 17 cp 4567,#089ab */
0222, 0x8a,0x00,0x00,0x00, RB+14,RB+10, 0, 0, /* 18 cpb rh3,rh2 */
0022, 0x0a,0x00,0x00,0x00, RB+14,II+10, 0, 0, /* 18 cpb rh3,@r2 */
0024, 0x0a,0x00,0x00,0x00, RB+14,X1+20, 0, 0, /* 18 cpb rh3,#045 */
0024, 0x4a,0x00,0x00,0x00, RB+14,AA+20,PR+10, 0, /* 18 cpb rh3,4567(r2) */
0024, 0x4a,0x00,0x00,0x00, RB+14,AA+20, 0, 0, /* 18 cpb rh3,4567 */
0024, 0x0c,0x01,0x00,0x00, IR+10,X1+20, 0, 0, /* 18 cpb @r2,#045 */
0026, 0x4c,0x01,0x00,0x00, AA+20,PR+10,X1+40, 0, /* 18 cpb 4567(r2),#089 */
0026, 0x4c,0x01,0x00,0x00, AA+20,X2+40, 0, 0, /* 18 cpb 4567,#089ab */
0222, 0x90,0x00,0x00,0x00, RL+14,RL+10, 0, 0, /* 19 cpl rr2,rr2 */
0022, 0x10,0x00,0x00,0x00, RL+14,II+10, 0, 0, /* 19 cpl rr2,@r2 */
0026, 0x10,0x00,0x00,0x00, RL+14,X4+20, 0, 0, /* 19 cpl rr2, #0022b */
0024, 0x50,0x00,0x00,0x00, RL+14,AA+20,PR+10, 0, /* 19 cpl rr2,4567(r2) */
0024, 0x50,0x00,0x00,0x00, RL+14,AA+20, 0, 0, /* 19 cpl rr2,4567 */
0244, 0xbb,0x08,0x00,0x00, RR+30,II+10,RR+24,CC+34, /* 20 cpd r6,@r2,r5,cy */
0244, 0xba,0x08,0x00,0x00, RB+30,II+10,RR+24,CC+34, /* 21 cpdb r6,@r2,r5,cy */
0244, 0xbb,0x0c,0x00,0x00, RR+30,II+10,RR+24,CC+34, /* 22 cpdr r6,@r2,r5,cy */
0244, 0xba,0x0c,0x00,0x00, RB+30,II+10,RR+24,CC+34, /* 23 cpdrb r6,@r2,r5,cy */
0244, 0xbb,0x00,0x00,0x00, RR+30,II+10,RR+24,CC+34, /* 24 cpi r6,@r2,r5,cy */
0244, 0xba,0x00,0x00,0x00, RB+30,II+10,RR+24,CC+34, /* 25 cpib r6,@r2,r5,cy */
0244, 0xbb,0x04,0x00,0x00, RR+30,II+10,RR+24,CC+34, /* 26 cpir r6,@r2,r5,cy */
0244, 0xba,0x04,0x00,0x00, RB+30,II+10,RR+24,CC+34, /* 27 cpirb r6,@r2,r5,cy */
0244, 0xbb,0x0a,0x00,0x00, II+30,II+10,RR+24,CC+34, /* 28 cpsd @r6,@r2,r5,cy */
0244, 0xba,0x0a,0x00,0x00, II+30,II+10,RR+24,CC+34, /* 29 cpsdb @r6,@r2,r5,cy */
0244, 0xbb,0x0e,0x00,0x00, II+30,II+10,RR+24,CC+34, /* 30 cpsdr @r6,@r2,r5,cy */
0244, 0xba,0x0e,0x00,0x00, II+30,II+10,RR+24,CC+34, /* 31 cpsdrb @r6,@r2,r5,cy */
0244, 0xbb,0x02,0x00,0x00, II+30,II+10,RR+24,CC+34, /* 32 cpsi @r6,@r2,r5,cy */
0244, 0xba,0x02,0x00,0x00, II+30,II+10,RR+24,CC+34, /* 33 cpsib @r6,@r2,r5,cy */
0244, 0xbb,0x06,0x00,0x00, II+30,II+10,RR+24,CC+34, /* 34 cpsir @r6,@r2,r5,cy */
0244, 0xba,0x06,0x00,0x00, II+30,II+10,RR+24,CC+34, /* 35 cpsirb @r6,@r2,r5,cy */
0222, 0xb0,0x00,0x00,0x00, RB+10, 0, 0, 0, /* 36 dab rh2 */
0222, 0xab,0x00,0x00,0x00, RR+10,ID+14, 0, 0, /* 37 dec r2,#4 */
0022, 0x2b,0x00,0x00,0x00, II+10,ID+14, 0, 0, /* 37 dec @r2,#4 */
0024, 0x6b,0x00,0x00,0x00, AA+20,PR+10,ID+14, 0, /* 37 dec 4567(r2),#4 */
0024, 0x6b,0x00,0x00,0x00, AA+20,ID+14, 0, 0, /* 37 dec 4567,#4 */
0222, 0xaa,0x00,0x00,0x00, RB+10,ID+14, 0, 0, /* 38 decb rh2,#4 */
0022, 0x2a,0x00,0x00,0x00, II+10,ID+14, 0, 0, /* 38 decb @r2,#4 */
0024, 0x6a,0x00,0x00,0x00, AA+20,PR+10,ID+14, 0, /* 38 decb 4567(r2),#4 */
0024, 0x6a,0x00,0x00,0x00, AA+20,ID+14, 0, 0, /* 38 decb 4567,#4 */
0222, 0x7c,0x00,0x00,0x00, VI+16,VI+17, 0, 0, /* 39 di vi,nvi, */
0222, 0x9b,0x00,0x00,0x00, RL+14,RR+10, 0, 0, /* 40 div rr4,r2 */
0022, 0x1b,0x00,0x00,0x00, RL+14,II+10, 0, 0, /* 40 div rr4,@r2 */
0024, 0x1b,0x00,0x00,0x00, RL+14,X2+20, 0, 0, /* 40 div rr4,#4 */
0024, 0x5b,0x00,0x00,0x00, RL+14,AA+20,PR+10, 0, /* 40 div rr4,4567(r2) */
0024, 0x5b,0x00,0x00,0x00, RL+14,AA+20, 0, 0, /* 40 div rr4,4567 */
0222, 0x9a,0x00,0x00,0x00, RQ+14,RL+10, 0, 0, /* 41 divl rq4,rr2 */
0022, 0x1a,0x00,0x00,0x00, RQ+14,II+10, 0, 0, /* 41 divl rq4,@r2 */
0026, 0x1a,0x00,0x00,0x00, RQ+14,X4+20, 0, 0, /* 41 divl rq4,#4 */
0024, 0x5a,0x00,0x00,0x00, RQ+14,AA+20,PR+10, 0, /* 41 divl rq4,4567(r2) */
0024, 0x5a,0x00,0x00,0x00, RQ+14,AA+20, 0, 0, /* 41 divl rq4,4567 */
0222, 0xf0,0x80,0x00,0x00, RR+04,D1+11, 0, 0, /* 42 djnz r1,2c0c */
0222, 0xf0,0x00,0x00,0x00, RB+04,D1+11, 0, 0, /* 43 dbjnz rh1,2c0c */
0222, 0x7c,0x04,0x00,0x00, VI+16,VI+17, 0, 0, /* 44 ei vi,nvi, */
0222, 0xad,0x00,0x00,0x00, RR+14,RR+10, 0, 0, /* 45 ex r3,r2 */
0022, 0x2d,0x00,0x00,0x00, RR+14,II+10, 0, 0, /* 45 ex r3,@r2 */
0024, 0x6d,0x00,0x00,0x00, RR+14,AA+20,PR+10, 0, /* 45 ex r3,4567(r2) */
0024, 0x6d,0x00,0x00,0x00, RR+14,AA+20, 0, 0, /* 45 ex r3,4567 */
0222, 0xac,0x00,0x00,0x00, RB+14,RB+10, 0, 0, /* 46 exb rh3,rh2 */
0022, 0x2c,0x00,0x00,0x00, RB+14,II+10, 0, 0, /* 46 exb rh3,@r2 */
0024, 0x6c,0x00,0x00,0x00, RB+14,AA+20,PR+10, 0, /* 46 exb rh3,4567(r2) */
0024, 0x6c,0x00,0x00,0x00, RB+14,AA+20, 0, 0, /* 46 exb rh3,4567 */
0222, 0xb1,0x0a,0x00,0x00, RL+10, 0, 0, 0, /* 47 exts rr2 */
0222, 0xb1,0x00,0x00,0x00, RR+10, 0, 0, 0, /* 48 extsb r2 */
0222, 0xb1,0x07,0x00,0x00, RQ+10, 0, 0, 0, /* 49 extsl rq0 */
0222, 0x7a,0x00,0x00,0x00, 0, 0, 0, 0, /* 50 halt */
0222, 0x3d,0x00,0x00,0x00, RR+14,IR+10, 0, 0, /* 51 in r3,@r2 */
0024, 0x3b,0x04,0x00,0x00, RR+10,D4+20, 0, 0, /* 51 in r2(#4567) */
0222, 0x3c,0x00,0x00,0x00, RB+14,IR+10, 0, 0, /* 52 inb rh3,@r2 */
0024, 0x3a,0x04,0x00,0x00, RB+10,D4+20, 0, 0, /* 52 inb rh2(#4567) */
0222, 0xa9,0x00,0x00,0x00, RR+10,ID+14, 0, 0, /* 53 inc r2,#4 */
0022, 0x29,0x00,0x00,0x00, II+10,ID+14, 0, 0, /* 53 inc @r2,#4 */
0024, 0x69,0x00,0x00,0x00, AA+20,PR+10,ID+14, 0, /* 53 inc 4567(r2),#4 */
0024, 0x69,0x00,0x00,0x00, AA+20,ID+14, 0, 0, /* 53 inc 4567,#4 */
0222, 0xa8,0x00,0x00,0x00, RB+10,ID+14, 0, 0, /* 54 incb rh2,#4 */
0022, 0x28,0x00,0x00,0x00, II+10,ID+14, 0, 0, /* 54 incb @r2,#4 */
0024, 0x68,0x00,0x00,0x00, AA+20,PR+10,ID+14, 0, /* 54 incb 4567(r2),#4 */
0024, 0x68,0x00,0x00,0x00, AA+20,ID+14, 0, 0, /* 54 incb 4567,#4 */
0244, 0x3b,0x08,0x00,0x08, II+30,IR+10,RR+24, 0, /* 55 ind @r6,@r2,r5 */
0244, 0x3a,0x08,0x00,0x08, II+30,IR+10,RR+24, 0, /* 56 indb @r6,@r2,r5 */
0244, 0x3b,0x08,0x00,0x00, II+30,IR+10,RR+24, 0, /* 57 indr @r6,@r2,r5 */
0244, 0x3a,0x08,0x00,0x00, II+30,IR+10,RR+24, 0, /* 58 indrb @r6,@r2,r5 */
0244, 0x3b,0x00,0x00,0x08, II+30,IR+10,RR+24, 0, /* 59 ini @r6,@r2,r5 */
0244, 0x3a,0x00,0x00,0x08, II+30,IR+10,RR+24, 0, /* 60 inib @r6,@r2,r5 */
0244, 0x3b,0x00,0x00,0x00, II+30,IR+10,RR+24, 0, /* 61 inir @r6,@r2,r5 */
0244, 0x3a,0x00,0x00,0x00, II+30,IR+10,RR+24, 0, /* 62 inirb @r6,@r2,r5 */
0222, 0x7b,0x00,0x00,0x00, 0, 0, 0, 0, /* 63 iret */
0222, 0x1e,0x08,0x00,0x00, II+10, 0, 0, 0, /* 64 jp @r2 */
0024, 0x5e,0x08,0x00,0x00, AA+20,PR+10, 0, 0, /* 64 jp 4567(r2) */
0024, 0x5e,0x08,0x00,0x00, AA+20, 0, 0, 0, /* 64 jp 4567 */
0022, 0x1e,0x00,0x00,0x00, CC+14,II+10, 0, 0, /* 64 jp ule,@r2 */
0024, 0x5e,0x00,0x00,0x00, CC+14,AA+20,PR+10, 0, /* 64 jp ule,4567(r2) */
0024, 0x5e,0x00,0x00,0x00, CC+14,AA+20, 0, 0, /* 64 jp ule,4567 */
0222, 0xe8,0x00,0x00,0x00, D2+10, 0, 0, 0, /* 65 jr 2c98 */
0022, 0xe0,0x00,0x00,0x00, CC+04,D2+10, 0, 0, /* 65 jr lt,2c98 */
0222, 0xa1,0x00,0x00,0x00, RR+14,RR+10, 0, 0, /* 66 ld r3,r2 */
0022, 0x21,0x00,0x00,0x00, RR+14,II+10, 0, 0, /* 66 ld r3,@r2 */
0024, 0x21,0x00,0x00,0x00, RR+14,X2+20, 0, 0, /* 66 ld r3,#04567 */
0024, 0x61,0x00,0x00,0x00, RR+14,AA+20,PR+10, 0, /* 66 ld r3,4567(r2) */
0024, 0x61,0x00,0x00,0x00, RR+14,AA+20, 0, 0, /* 66 ld r3,4567 */
0024, 0x31,0x00,0x00,0x00, RR+14,BB+10,D4+20, 0, /* 66 ld r3,r2(#4567) */
0044, 0x71,0x00,0x00,0x00, RR+14,BB+10,PR+24, 0, /* 66 ld r3,r2(r5) */
0022, 0x2f,0x00,0x00,0x00, II+10,RR+14, 0, 0, /* 66 ld @r2,r3 */
0024, 0x6f,0x00,0x00,0x00, AA+20,PR+10,RR+14, 0, /* 66 ld 4567(r2),r3 */
0024, 0x6f,0x00,0x00,0x00, AA+20,RR+14, 0, 0, /* 66 ld 4567,r3 */
0024, 0x33,0x00,0x00,0x00, BB+10,D4+20,RR+14, 0, /* 66 ld r2(#4567),r3 */
0044, 0x73,0x00,0x00,0x00, BB+10,PR+24,RR+14, 0, /* 66 ld r2(r5),r3 */
0026, 0x0d,0x05,0x00,0x00, II+10,X2+20, 0, 0, /* 66 ld @r2,#04567 */
0026, 0x4d,0x05,0x00,0x00, AA+20,PR+10,X2+40, 0, /* 66 ld 4567(r2),#089ab */
0026, 0x4d,0x05,0x00,0x00, AA+20,X2+40, 0, 0, /* 66 ld 4567,#089ab */
0222, 0xa0,0x00,0x00,0x00, RB+14,RB+10, 0, 0, /* 67 ldb rh3,rh2 */
0022, 0x20,0x00,0x00,0x00, RB+14,II+10, 0, 0, /* 67 ldb rh3,@r2 */
0024, 0x20,0x00,0x00,0x00, RB+14,X1+20, 0, 0, /* 67 ldb rh3,#045 */
0024, 0x60,0x00,0x00,0x00, RB+14,AA+20,PR+10, 0, /* 67 ldb rh3,4567(r2) */
0024, 0x60,0x00,0x00,0x00, RB+14,AA+20, 0, 0, /* 67 ldb rh3,4567 */
0024, 0x30,0x00,0x00,0x00, RB+14,BB+10,D4+20, 0, /* 67 ldb rh3,r2(#4567) */
0044, 0x70,0x00,0x00,0x00, RB+14,BB+10,PR+24, 0, /* 67 ldb rh3,r2(r5) */
0022, 0x2e,0x00,0x00,0x00, II+10,RB+14, 0, 0, /* 67 ldb @r2,rh3 */
0024, 0x6e,0x00,0x00,0x00, AA+20,PR+10,RB+14, 0, /* 67 ldb 4567(r2),rh3 */
0024, 0x6e,0x00,0x00,0x00, AA+20,RB+14, 0, 0, /* 67 ldb 4567,rh3 */
0024, 0x32,0x00,0x00,0x00, BB+10,D4+20,RB+14, 0, /* 67 ldb r2(#4567),rh3 */
0044, 0x72,0x00,0x00,0x00, BB+10,PR+24,RB+14, 0, /* 67 ldb r2(r5),rh3 */
0022, 0xc0,0x00,0x00,0x00, RB+04,B4+10,B4+14, 0, /* 67 ldb rh1,#2,#3 */
0026, 0x0c,0x05,0x00,0x00, II+10,X1+20, 0, 0, /* 67 ldb @r2,#045 */
0026, 0x4c,0x05,0x00,0x00, AA+20,PR+10,X1+40, 0, /* 67 ldb 4567(r2),#089 */
0026, 0x4c,0x05,0x00,0x00, AA+20,X1+40, 0, 0, /* 67 ldb 4567,#089 */
0222, 0x94,0x00,0x00,0x00, RL+14,RL+10, 0, 0, /* 68 ldl rr2,rr2 */
0022, 0x14,0x00,0x00,0x00, RL+14,II+10, 0, 0, /* 68 ldl rr2,@r2 */
0026, 0x14,0x00,0x00,0x00, RL+14,X4+20, 0, 0, /* 68 ldl rr2, #0022b */
0024, 0x54,0x00,0x00,0x00, RL+14,AA+20,PR+10, 0, /* 68 ldl rr2,4567(r2) */
0024, 0x54,0x00,0x00,0x00, RL+14,AA+20, 0, 0, /* 68 ldl rr2,4567 */
0024, 0x35,0x00,0x00,0x00, RL+14,BB+10,D4+20, 0, /* 68 ldl rr2,r2(#4567) */
0044, 0x75,0x00,0x00,0x00, RL+14,BB+10,PR+24, 0, /* 68 ldl rr2,r2(r5) */
0022, 0x1d,0x00,0x00,0x00, II+10,RL+14, 0, 0, /* 68 ldl @r2,rr2 */
0024, 0x5d,0x00,0x00,0x00, AA+20,PR+10,RL+14, 0, /* 68 ldl 4567(r2),rr2 */
0024, 0x5d,0x00,0x00,0x00, AA+20,RL+14, 0, 0, /* 68 ldl 4567,rr2 */
0024, 0x37,0x00,0x00,0x00, BB+10,D4+20,RL+14, 0, /* 68 ldl r2(#4567),rr2 */
0044, 0x77,0x00,0x00,0x00, BB+10,PR+24,RL+14, 0, /* 68 ldl r2(r5),rr2 */
0224, 0x76,0x00,0x00,0x00, RR+14,AA+20, 0, 0, /* 69 lda r3,4567 */
0024, 0x76,0x00,0x00,0x00, RR+14,AA+20,PR+10, 0, /* 69 lda r3,4567(r2) */
0024, 0x34,0x00,0x00,0x00, RR+14,BB+10,D4+20, 0, /* 69 lda r3,r2(#4567) */
0044, 0x74,0x00,0x00,0x00, RR+14,BB+10,PR+24, 0, /* 69 lda r3,r2(r5) */
0224, 0x34,0x00,0x00,0x00, RR+14,D4+20, 0, 0, /* 70 ldar r3(#4567) */
0222, 0x7d,0x08,0x00,0x00, SR+14,RR+10, 0, 0, /* 71 ldctl refresh,r2 */
0022, 0x7d,0x00,0x00,0x00, RR+10,SR+14, 0, 0, /* 71 ldctl r2,refresh */
0222, 0x8c,0x09,0x00,0x00, UR+14,RB+10, 0, 0, /* 72 ldctlb flags,rh2 */
0022, 0x8c,0x01,0x00,0x00, RB+10,UR+14, 0, 0, /* 72 ldctlb rh2,flags */
0244, 0xbb,0x09,0x00,0x08, II+30,II+10,RR+24, 0, /* 73 ldd @r6,@r2,r5 */
0244, 0xba,0x09,0x00,0x08, II+30,II+10,RR+24, 0, /* 74 lddb @r6,@r2,r5 */
0244, 0xbb,0x09,0x00,0x00, II+30,II+10,RR+24, 0, /* 75 lddr @r6,@r2,r5 */
0244, 0xba,0x09,0x00,0x00, II+30,II+10,RR+24, 0, /* 76 lddrb @r6,@r2,r5 */
0244, 0xbb,0x01,0x00,0x08, II+30,II+10,RR+24, 0, /* 77 ldi @r6,@r2,r5 */
0244, 0xba,0x01,0x00,0x08, II+30,II+10,RR+24, 0, /* 78 ldib @r6,@r2,r5 */
0244, 0xbb,0x01,0x00,0x00, II+30,II+10,RR+24, 0, /* 79 ldir @r6,@r2,r5 */
0244, 0xba,0x01,0x00,0x00, II+30,II+10,RR+24, 0, /* 80 ldirb @r6,@r2,r5 */
0222, 0xbd,0x00,0x00,0x00, RR+10,B4+14, 0, 0, /* 81 ldk r2,#3 */
0224, 0x1c,0x01,0x00,0x00, RR+24,II+10,ID+34, 0, /* 82 ldm r5,@r2,#2 */
0026, 0x5c,0x01,0x00,0x00, RR+24,AA+40,PR+10,ID+34, /* 82 ldm r5,4567(r2),#2 */
0026, 0x5c,0x01,0x00,0x00, RR+24,AA+40,ID+34, 0, /* 82 ldm r5,4567, #0022b */
0024, 0x1c,0x09,0x00,0x00, II+10,RR+24,ID+34, 0, /* 82 ldm @r2,r5,#2 */
0026, 0x5c,0x09,0x00,0x00, AA+40,PR+10,RR+24,ID+34, /* 82 ldm 4567(r2),r5,#2 */
0026, 0x5c,0x09,0x00,0x00, AA+40,RR+24,ID+34, 0, /* 82 ldm 4567,r5,#2 */
0222, 0x39,0x00,0x00,0x00, II+10, 0, 0, 0, /* 83 ldps @r2 */
0024, 0x79,0x00,0x00,0x00, AA+20,PR+10, 0, 0, /* 83 ldps 4567(r2) */
0024, 0x79,0x00,0x00,0x00, AA+20, 0, 0, 0, /* 83 ldps 4567 */
0224, 0x31,0x00,0x00,0x00, RR+14,D4+20, 0, 0, /* 84 ldr r3(#4567) */
0024, 0x33,0x00,0x00,0x00, D4+20,RR+14, 0, 0, /* 84 ldr (#4567),r3 */
0224, 0x30,0x00,0x00,0x00, RR+14,D4+20, 0, 0, /* 85 ldrb r3(#4567) */
0024, 0x32,0x00,0x00,0x00, D4+20,RR+14, 0, 0, /* 85 ldrb (#4567),r3 */
0224, 0x35,0x00,0x00,0x00, RR+14,D4+20, 0, 0, /* 86 ldrl r3(#4567) */
0024, 0x37,0x00,0x00,0x00, D4+20,RR+14, 0, 0, /* 86 ldrl (#4567),r3 */
0222, 0x7b,0x0a,0x00,0x00, 0, 0, 0, 0, /* 87 mbit */
0222, 0x7b,0x0d,0x00,0x00, RR+10, 0, 0, 0, /* 88 mreq r2 */
0222, 0x7b,0x09,0x00,0x00, 0, 0, 0, 0, /* 89 mres */
0222, 0x7b,0x08,0x00,0x00, 0, 0, 0, 0, /* 90 mset */
0222, 0x99,0x00,0x00,0x00, RL+14,RR+10, 0, 0, /* 91 mult rr4,r2 */
0022, 0x19,0x00,0x00,0x00, RL+14,II+10, 0, 0, /* 91 mult rr4,@r2 */
0024, 0x19,0x00,0x00,0x00, RL+14,X2+20, 0, 0, /* 91 mult rr4,#4 */
0024, 0x59,0x00,0x00,0x00, RL+14,AA+20,PR+10, 0, /* 91 mult rr4,4567(r2) */
0024, 0x59,0x00,0x00,0x00, RL+14,AA+20, 0, 0, /* 91 mult rr4,4567 */
0222, 0x98,0x00,0x00,0x00, RQ+14,RL+10, 0, 0, /* 92 multl rq4,rr2 */
0022, 0x18,0x00,0x00,0x00, RQ+14,II+10, 0, 0, /* 92 multl rq4,@r2 */
0026, 0x18,0x00,0x00,0x00, RQ+14,X4+20, 0, 0, /* 92 multl rq4,#4 */
0024, 0x58,0x00,0x00,0x00, RQ+14,AA+20,PR+10, 0, /* 92 multl rq4,4567(r2) */
0024, 0x58,0x00,0x00,0x00, RQ+14,AA+20, 0, 0, /* 92 multl rq4,4567 */
0222, 0x8d,0x02,0x00,0x00, RR+10, 0, 0, 0, /* 93 neg r2 */
0022, 0x0d,0x02,0x00,0x00, II+10, 0, 0, 0, /* 93 neg @r2 */
0024, 0x4d,0x02,0x00,0x00, AA+20,PR+10, 0, 0, /* 93 neg 4567(r2) */
0024, 0x4d,0x02,0x00,0x00, AA+20, 0, 0, 0, /* 93 neg 4567 */
0222, 0x8c,0x02,0x00,0x00, RB+10, 0, 0, 0, /* 94 negb rh2 */
0022, 0x0c,0x02,0x00,0x00, II+10, 0, 0, 0, /* 94 negb @r2 */
0024, 0x4c,0x02,0x00,0x00, AA+20,PR+10, 0, 0, /* 94 negb 4567(r2) */
0024, 0x4c,0x02,0x00,0x00, AA+20, 0, 0, 0, /* 94 negb 4567 */
0222, 0x8d,0x07,0x00,0x00, 0, 0, 0, 0, /* 95 nop */
0222, 0x85,0x00,0x00,0x00, RR+14,RR+10, 0, 0, /* 96 or r3,r2 */
0022, 0x05,0x00,0x00,0x00, RR+14,II+10, 0, 0, /* 96 or r3,@r2 */
0024, 0x05,0x00,0x00,0x00, RR+14,X2+20, 0, 0, /* 96 or r3,#04567 */
0024, 0x45,0x00,0x00,0x00, RR+14,AA+20,PR+10, 0, /* 96 or r3,4567(r2) */
0024, 0x45,0x00,0x00,0x00, RR+14,AA+20, 0, 0, /* 96 or r3,4567 */
0222, 0x84,0x00,0x00,0x00, RB+14,RB+10, 0, 0, /* 97 orb rh3,rh2 */
0022, 0x04,0x00,0x00,0x00, RB+14,II+10, 0, 0, /* 97 orb rh3,@r2 */
0024, 0x04,0x00,0x00,0x00, RB+14,X1+20, 0, 0, /* 97 orb rh3,#045 */
0024, 0x44,0x00,0x00,0x00, RB+14,AA+20,PR+10, 0, /* 97 orb rh3,4567(r2) */
0024, 0x44,0x00,0x00,0x00, RB+14,AA+20, 0, 0, /* 97 orb rh3,4567 */
0244, 0x3b,0x0a,0x00,0x00, IR+30,II+10,RR+24, 0, /* 98 otdr @r6,@r2,r5 */
0244, 0x3a,0x0a,0x00,0x00, IR+30,II+10,RR+24, 0, /* 99 otdrb @r6,@r2,r5 */
0244, 0x3b,0x02,0x00,0x00, IR+30,II+10,RR+24, 0, /*100 otir @r6,@r2,r5 */
0244, 0x3a,0x02,0x00,0x00, IR+30,II+10,RR+24, 0, /*101 otirb @r6,@r2,r5 */
0222, 0x3f,0x00,0x00,0x00, II+10,RR+14, 0, 0, /*102 out @r2,r3 */
0024, 0x3b,0x06,0x00,0x00, D4+20,RR+10, 0, 0, /*102 out (#4567),r2 */
0222, 0x3e,0x00,0x00,0x00, II+10,RB+14, 0, 0, /*103 outb @r2,rh3 */
0024, 0x3a,0x06,0x00,0x00, D4+20,RB+10, 0, 0, /*103 outb (#4567),rh2 */
0244, 0x3b,0x0a,0x00,0x08, IR+30,II+10,RR+24, 0, /*104 outd @r6,@r2,r5 */
0244, 0x3a,0x0a,0x00,0x08, IR+30,II+10,RR+24, 0, /*105 outdb @r6,@r2,r5 */
0244, 0x3b,0x02,0x00,0x08, IR+30,II+10,RR+24, 0, /*106 outi @r6,@r2,r5 */
0244, 0x3a,0x02,0x00,0x08, IR+30,II+10,RR+24, 0, /*107 outib @r6,@r2,r5 */
0222, 0x97,0x00,0x00,0x00, RR+14,II+10, 0, 0, /*108 pop r3,@r2 */
0022, 0x17,0x00,0x00,0x00, II+14,II+10, 0, 0, /*108 pop @r3,@r2 */
0024, 0x57,0x00,0x00,0x00, AA+20,PR+14,II+10, 0, /*108 pop 4567(r3),@r2 */
0024, 0x57,0x00,0x00,0x00, AA+20,II+10, 0, 0, /*108 pop 4567,@r2 */
0222, 0x95,0x00,0x00,0x00, RL+14,II+10, 0, 0, /*109 popl rr2,@r2 */
0022, 0x15,0x00,0x00,0x00, II+14,II+10, 0, 0, /*109 popl @r3,@r2 */
0024, 0x55,0x00,0x00,0x00, AA+20,PR+14,II+10, 0, /*109 popl 4567(r3),@r2 */
0024, 0x55,0x00,0x00,0x00, AA+20,II+10, 0, 0, /*109 popl 4567,@r2 */
0222, 0x93,0x00,0x00,0x00, II+10,RR+14, 0, 0, /*110 push @r2,r3 */
0022, 0x13,0x00,0x00,0x00, II+10,II+14, 0, 0, /*110 push @r2,@r3 */
0024, 0x53,0x00,0x00,0x00, II+10,AA+20,PR+14, 0, /*110 push @r2,4567(r3) */
0024, 0x53,0x00,0x00,0x00, II+10,AA+20, 0, 0, /*110 push @r2,4567 */
0024, 0x0d,0x09,0x00,0x00, II+10,X2+20, 0, 0, /*111 push @r2,#04567 */
0222, 0x91,0x00,0x00,0x00, II+10,RL+14, 0, 0, /*111 pushl @r2,rr2 */
0022, 0x11,0x00,0x00,0x00, II+10,II+14, 0, 0, /*111 pushl @r2,@r3 */
0024, 0x51,0x00,0x00,0x00, II+10,AA+20,PR+14, 0, /*111 pushl @r2,4567(r3) */
0024, 0x51,0x00,0x00,0x00, II+10,AA+20, 0, 0, /*111 pushl @r2,4567 */
0222, 0xa3,0x00,0x00,0x00, RR+10,B4+14, 0, 0, /*112 res r2,#3 */
0022, 0x23,0x00,0x00,0x00, II+10,B4+14, 0, 0, /*112 res @r2,#3 */
0044, 0x23,0x00,0x00,0x00, RR+24,RR+14, 0, 0, /*112 res r5,r3 */
0024, 0x63,0x00,0x00,0x00, AA+20,PR+10,B4+14, 0, /*112 res 4567(r2),#3 */
0024, 0x63,0x00,0x00,0x00, AA+20,B4+14, 0, 0, /*112 res 4567,#3 */
0222, 0xa2,0x00,0x00,0x00, RB+10,B4+14, 0, 0, /*113 resb rh2,#3 */
0022, 0x22,0x00,0x00,0x00, II+10,B4+14, 0, 0, /*113 resb @r2,#3 */
0044, 0x22,0x00,0x00,0x00, RB+24,RR+14, 0, 0, /*113 resb rh5,r3 */
0024, 0x62,0x00,0x00,0x00, AA+20,PR+10,B4+14, 0, /*113 resb 4567(r2),#3 */
0024, 0x62,0x00,0x00,0x00, AA+20,B4+14, 0, 0, /*113 resb 4567,#3 */
0222, 0x8d,0x03,0x00,0x00, CF+10,CF+10,CF+10,CF+10, /*114 resflg le */
0222, 0x9e,0x08,0x00,0x00, 0, 0, 0, 0, /*115 ret */
0022, 0x9e,0x00,0x00,0x00, CC+14, 0, 0, 0, /*115 ret ule */
0222, 0xb3,0x00,0x00,0x00, RR+10,BN+16, 0, 0, /*116 rl r2,#9 */
0222, 0xb2,0x00,0x00,0x00, RB+10,BN+16, 0, 0, /*117 rlb rh2,#9 */
0222, 0xb3,0x08,0x00,0x00, RR+10,BN+16, 0, 0, /*118 rlc r2,#9 */
0222, 0xb2,0x08,0x00,0x00, RB+10,BN+16, 0, 0, /*119 rlcb rh2,#9 */
0222, 0xbe,0x00,0x00,0x00, RB+14,RB+10, 0, 0, /*120 rldb rh3,rh2 */
0222, 0xb3,0x04,0x00,0x00, RR+10,BN+16, 0, 0, /*121 rr r2,#9 */
0222, 0xb2,0x04,0x00,0x00, RB+10,BN+16, 0, 0, /*122 rrb rh2,#9 */
0222, 0xb3,0x0c,0x00,0x00, RR+10,BN+16, 0, 0, /*123 rrc r2,#9 */
0222, 0xb2,0x0c,0x00,0x00, RB+10,BN+16, 0, 0, /*124 rrcb rh2,#9 */
0222, 0xbc,0x00,0x00,0x00, RB+14,RB+10, 0, 0, /*125 rrdb rh3,rh2 */
0222, 0xb7,0x00,0x00,0x00, RR+14,RR+10, 0, 0, /*126 sbc r3,r2 */
0222, 0xb6,0x00,0x00,0x00, RB+14,RB+10, 0, 0, /*127 sbcb rh3,rh2 */
0222, 0x7f,0x00,0x00,0x00, X1+10, 0, 0, 0, /*128 sc #023 */
0244, 0xb3,0x0b,0x00,0x00, RR+10,RR+24, 0, 0, /*129 sda r2,r5 */
0244, 0xb2,0x0b,0x00,0x00, RB+10,RR+24, 0, 0, /*130 sdab rh2,r5 */
0244, 0xb3,0x0f,0x00,0x00, RL+10,RR+24, 0, 0, /*131 sdal rr2,r5 */
0244, 0xb3,0x03,0x00,0x00, RR+10,RR+24, 0, 0, /*132 sdl r2,r5 */
0244, 0xb2,0x03,0x00,0x00, RB+10,RR+24, 0, 0, /*133 sdlb rh2,r5 */
0244, 0xb3,0x07,0x00,0x00, RL+10,RR+24, 0, 0, /*134 sdll rr2,r5 */
0222, 0xa5,0x00,0x00,0x00, RR+10,B4+14, 0, 0, /*135 set r2,#3 */
0022, 0x25,0x00,0x00,0x00, II+10,B4+14, 0, 0, /*135 set @r2,#3 */
0044, 0x25,0x00,0x00,0x00, RR+24,RR+14, 0, 0, /*135 set r5,r3 */
0024, 0x65,0x00,0x00,0x00, AA+20,PR+10,B4+14, 0, /*135 set 4567(r2),#3 */
0024, 0x65,0x00,0x00,0x00, AA+20,B4+14, 0, 0, /*135 set 4567,#3 */
0222, 0xa4,0x00,0x00,0x00, RB+10,B4+14, 0, 0, /*136 setb rh2,#3 */
0022, 0x24,0x00,0x00,0x00, II+10,B4+14, 0, 0, /*136 setb @r2,#3 */
0044, 0x24,0x00,0x00,0x00, RB+24,RR+14, 0, 0, /*136 setb rh5,r3 */
0024, 0x64,0x00,0x00,0x00, AA+20,PR+10,B4+14, 0, /*136 setb 4567(r2),#3 */
0024, 0x64,0x00,0x00,0x00, AA+20,B4+14, 0, 0, /*136 setb 4567,#3 */
0222, 0x8d,0x01,0x00,0x00, CF+10,CF+10,CF+10,CF+10, /*137 setflg le */
0224, 0x3b,0x05,0x00,0x00, RR+10,D4+20, 0, 0, /*138 sin r2(#4567) */
0224, 0x3a,0x05,0x00,0x00, RB+10,D4+20, 0, 0, /*139 sinb rh2(#4567) */
0244, 0x3b,0x09,0x00,0x08, II+30,II+10,RR+24, 0, /*140 sind @r6,@r2,r5 */
0244, 0x3a,0x09,0x00,0x08, II+30,II+10,RR+24, 0, /*141 sindb @r6,@r2,r5 */
0244, 0x3b,0x09,0x00,0x00, II+30,II+10,RR+24, 0, /*142 sindr @r6,@r2,r5 */
0244, 0x3a,0x09,0x00,0x00, II+30,II+10,RR+24, 0, /*143 sindrb @r6,@r2,r5 */
0244, 0x3b,0x01,0x00,0x08, II+30,II+10,RR+24, 0, /*144 sini @r6,@r2,r5 */
0244, 0x3a,0x01,0x00,0x08, II+30,II+10,RR+24, 0, /*145 sinib @r6,@r2,r5 */
0244, 0x3b,0x01,0x00,0x00, II+30,II+10,RR+24, 0, /*146 sinir @r6,@r2,r5 */
0244, 0x3a,0x01,0x00,0x00, II+30,II+10,RR+24, 0, /*147 sinirb @r6,@r2,r5 */
0244, 0xb3,0x09,0x00,0x00, RR+10,P1+20, 0, 0, /*148 sla r2,#7 */
0244, 0xb2,0x09,0x00,0x00, RB+10,P2+30, 0, 0, /*149 slab rh2,#7 */
0244, 0xb3,0x0d,0x00,0x00, RL+10,P3+20, 0, 0, /*150 slal rr2,#7 */
0244, 0xb3,0x01,0x00,0x00, RR+10,P1+20, 0, 0, /*151 sll r2,#7 */
0244, 0xb2,0x01,0x00,0x00, RB+10,P2+30, 0, 0, /*152 sllb rh2,#7 */
0244, 0xb3,0x05,0x00,0x00, RL+10,P3+20, 0, 0, /*153 slll rr2,#7 */
0244, 0x3b,0x0b,0x00,0x00, II+30,II+10,RR+24, 0, /*154 sotdr @r6,@r2,r5 */
0244, 0x3a,0x0b,0x00,0x00, II+30,II+10,RR+24, 0, /*155 sotdrb @r6,@r2,r5 */
0244, 0x3b,0x03,0x00,0x00, II+30,II+10,RR+24, 0, /*156 sotir @r6,@r2,r5 */
0244, 0x3a,0x03,0x00,0x00, II+30,II+10,RR+24, 0, /*157 sotirb @r6,@r2,r5 */
0224, 0x3b,0x07,0x00,0x00, D4+20,RR+10, 0, 0, /*158 sout (#4567),r2 */
0224, 0x3a,0x07,0x00,0x00, D4+20,RB+10, 0, 0, /*159 soutb (#4567),rh2 */
0244, 0x3b,0x0b,0x00,0x08, II+30,II+10,RR+24, 0, /*160 soutd @r6,@r2,r5 */
0244, 0x3a,0x0b,0x00,0x08, II+30,II+10,RR+24, 0, /*161 soutdb @r6,@r2,r5 */
0244, 0x3b,0x03,0x00,0x08, II+30,II+10,RR+24, 0, /*162 souti @r6,@r2,r5 */
0244, 0x3a,0x03,0x00,0x08, II+30,II+10,RR+24, 0, /*163 soutib @r6,@r2,r5 */
0244, 0xb3,0x09,0x00,0x00, RR+10,N1+20, 0, 0, /*164 sra r2,#25 */
0244, 0xb2,0x09,0x00,0x00, RB+10,N2+30, 0, 0, /*165 srab rh2,#25 */
0244, 0xb3,0x0d,0x00,0x00, RL+10,N3+20, 0, 0, /*166 sral rr2,#25 */
0244, 0xb3,0x01,0x00,0x00, RR+10,N1+20, 0, 0, /*167 srl r2,#25 */
0244, 0xb2,0x01,0x00,0x00, RB+10,N2+30, 0, 0, /*168 srlb rh2,#25 */
0244, 0xb3,0x05,0x00,0x00, RL+10,N3+20, 0, 0, /*169 srll rr2,#25 */
0222, 0x83,0x00,0x00,0x00, RR+14,RR+10, 0, 0, /*170 sub r3,r2 */
0022, 0x03,0x00,0x00,0x00, RR+14,II+10, 0, 0, /*170 sub r3,@r2 */
0024, 0x03,0x00,0x00,0x00, RR+14,X2+20, 0, 0, /*170 sub r3,#04567 */
0024, 0x43,0x00,0x00,0x00, RR+14,AA+20,PR+10, 0, /*170 sub r3,4567(r2) */
0024, 0x43,0x00,0x00,0x00, RR+14,AA+20, 0, 0, /*170 sub r3,4567 */
0222, 0x82,0x00,0x00,0x00, RB+14,RB+10, 0, 0, /*171 subb rh3,rh2 */
0022, 0x02,0x00,0x00,0x00, RB+14,II+10, 0, 0, /*171 subb rh3,@r2 */
0024, 0x02,0x00,0x00,0x00, RB+14,X1+20, 0, 0, /*171 subb rh3,#045 */
0024, 0x42,0x00,0x00,0x00, RB+14,AA+20,PR+10, 0, /*171 subb rh3,4567(r2) */
0024, 0x42,0x00,0x00,0x00, RB+14,AA+20, 0, 0, /*171 subb rh3,4567 */
0222, 0x92,0x00,0x00,0x00, RL+14,RL+10, 0, 0, /*172 subl rr2,rr2 */
0022, 0x12,0x00,0x00,0x00, RL+14,II+10, 0, 0, /*172 subl rr2,@r2 */
0026, 0x12,0x00,0x00,0x00, RL+14,X4+20, 0, 0, /*172 subl rr2, #0022b */
0024, 0x52,0x00,0x00,0x00, RL+14,AA+20,PR+10, 0, /*172 subl rr2,4567(r2) */
0024, 0x52,0x00,0x00,0x00, RL+14,AA+20, 0, 0, /*172 subl rr2,4567 */
0222, 0xaf,0x00,0x00,0x00, CC+14,RR+10, 0, 0, /*173 tcc ule,r2 */
0222, 0xae,0x00,0x00,0x00, CC+14,RB+10, 0, 0, /*174 tccb ule,rh2 */
0222, 0x8d,0x04,0x00,0x00, RR+10, 0, 0, 0, /*175 test r2 */
0022, 0x0d,0x04,0x00,0x00, II+10, 0, 0, 0, /*175 test @r2 */
0024, 0x4d,0x04,0x00,0x00, AA+20,PR+10, 0, 0, /*175 test 4567(r2) */
0024, 0x4d,0x04,0x00,0x00, AA+20, 0, 0, 0, /*175 test 4567 */
0222, 0x8c,0x04,0x00,0x00, RB+10, 0, 0, 0, /*176 testb rh2 */
0022, 0x0c,0x04,0x00,0x00, II+10, 0, 0, 0, /*176 testb @r2 */
0024, 0x4c,0x04,0x00,0x00, AA+20,PR+10, 0, 0, /*176 testb 4567(r2) */
0024, 0x4c,0x04,0x00,0x00, AA+20, 0, 0, 0, /*176 testb 4567 */
0222, 0x9c,0x08,0x00,0x00, RL+10, 0, 0, 0, /*177 testl rr2 */
0022, 0x1c,0x08,0x00,0x00, II+10, 0, 0, 0, /*177 testl @r2 */
0024, 0x5c,0x08,0x00,0x00, AA+20,PR+10, 0, 0, /*177 testl 4567(r2) */
0024, 0x5c,0x08,0x00,0x00, AA+20, 0, 0, 0, /*177 testl 4567 */
0244, 0xb8,0x08,0x00,0x00, II+10,II+30,RR+24, 0, /*178 trdb @r2,@r6,r5 */
0244, 0xb8,0x0c,0x00,0x00, II+10,II+30,RR+24, 0, /*179 trdrb @r2,@r6,r5 */
0244, 0xb8,0x00,0x00,0x00, II+10,II+30,RR+24, 0, /*180 trib @r2,@r6,r5 */
0244, 0xb8,0x04,0x00,0x00, II+10,II+30,RR+24, 0, /*181 trirb @r2,@r6,r5 */
0244, 0xb8,0x0a,0x00,0x00, II+10,II+30,RR+24, 0, /*182 trtdb @r2,@r6,r5 */
0244, 0xb8,0x0e,0x00,0x0e, II+10,II+30,RR+24, 0, /*183 trtdrb @r2,@r6,r5 */
0244, 0xb8,0x02,0x00,0x00, II+10,II+30,RR+24, 0, /*184 trtib @r2,@r6,r5 */
0244, 0xb8,0x06,0x00,0x0e, II+10,II+30,RR+24, 0, /*185 trtirb @r2,@r6,r5 */
0222, 0x8d,0x06,0x00,0x00, RR+10, 0, 0, 0, /*186 tset r2 */
0022, 0x0d,0x06,0x00,0x00, II+10, 0, 0, 0, /*186 tset @r2 */
0024, 0x4d,0x06,0x00,0x00, AA+20,PR+10, 0, 0, /*186 tset 4567(r2) */
0024, 0x4d,0x06,0x00,0x00, AA+20, 0, 0, 0, /*186 tset 4567 */
0222, 0x8c,0x06,0x00,0x00, RB+10, 0, 0, 0, /*187 tsetb rh2 */
0022, 0x0c,0x06,0x00,0x00, II+10, 0, 0, 0, /*187 tsetb @r2 */
0024, 0x4c,0x06,0x00,0x00, AA+20,PR+10, 0, 0, /*187 tsetb 4567(r2) */
0024, 0x4c,0x06,0x00,0x00, AA+20, 0, 0, 0, /*187 tsetb 4567 */
0222, 0x89,0x00,0x00,0x00, RR+14,RR+10, 0, 0, /*188 xor r3,r2 */
0022, 0x09,0x00,0x00,0x00, RR+14,II+10, 0, 0, /*188 xor r3,@r2 */
0024, 0x09,0x00,0x00,0x00, RR+14,X2+20, 0, 0, /*188 xor r3,#04567 */
0024, 0x49,0x00,0x00,0x00, RR+14,AA+20,PR+10, 0, /*188 xor r3,4567(r2) */
0024, 0x49,0x00,0x00,0x00, RR+14,AA+20, 0, 0, /*188 xor r3,4567 */
0222, 0x88,0x00,0x00,0x00, RB+14,RB+10, 0, 0, /*189 xorb rh3,rh2 */
0022, 0x08,0x00,0x00,0x00, RB+14,II+10, 0, 0, /*189 xorb rh3,@r2 */
0024, 0x08,0x00,0x00,0x00, RB+14,X1+20, 0, 0, /*189 xorb rh3,#045 */
0024, 0x48,0x00,0x00,0x00, RB+14,AA+20,PR+10, 0, /*189 xorb rh3,4567(r2) */
0024, 0x48,0x00,0x00,0x00, RB+14,AA+20, 0, 0, /*189 xorb rh3,4567 */
0000, 0x00,0x00,0x00,0x00, 0, 0, 0, 0, /* PHEW! */
};
/*
******** The reserved opcodes table
*/
char *opcodes[] ={
".word", /* 01: 1, 0, 0 */
"adc", /* 02: */
"adcb", /* 03: 32, 0, 0 */
"add", /* 04: 12, 0, 0 */
"addb", /* 05: 17, 0, 0 */
"addl", /* 06: 3, 0, 0 */
"and", /* 07: 20, 0, 0 */
"andb", /* 08: 9, 0, 0 */
"bit", /* 09: 1, 0, 0 */
"bitb", /* 0a: 29, 0, 0 */
"call", /* 0b: 1, 0, 0 */
"calr", /* 0c: 1, 0, 0 */
"clr", /* 0d: 1, 0, 0 */
"clrb", /* 0e: 1, 0, 0 */
"com", /* 0f: 1, 0, 0 */
"comb", /* 10: 1, 0, 0 */
"comflg", /* 11: 1, 0, 0 */
"cp", /* 12: 29, 0, 0 */
"cpb", /* 13: 3, 0, 0 */
"cpl", /* 14: 2, 0, 0 */
"cpd", /* 15: 28, 0, 0 */
"cpdb", /* 16: 28, 0, 0 */
"cpdr", /* 17: 6, 0, 0 */
"cpdrb", /* 18: 6, 0, 0 */
"cpi", /* 19: 1, 0, 0 */
"cpib", /* 1a: 2, 0, 0 */
"cpir", /* 1b: 1, 0, 0 */
"cpirb", /* 1c: 1, 0, 0 */
"cpsd", /* 1d: 10, 0, 0 */
"cpsdb", /* 1e: 7, 0, 0 */
"cpsdr", /* 1f: 2, 0, 0 */
"cpsdrb", /* 20: 1, 0, 0 */
"cpsi", /* 21: 1, 0, 0 */
"cpsib", /* 22: 1, 0, 0 */
"cpsir", /* 23: 1, 0, 0 */
"cpsirb", /* 24: 1, 0, 0 */
"dab", /* 25: 1, 0, 0 */
"dec", /* 26: 22, 0, 0 */
"decb", /* 27: 29, 0, 0 */
"di", /* 28: 3, 0, 0 */
"div", /* 29: 1, 0, 0 */
"divl", /* 2a: 1, 0, 0 */
"djnz", /* 2b: 1, 0, 0 */
"dbjnz", /* 2c: 1, 0, 0 */
"ei", /* 2d: 1, 0, 0 */
"ex", /* 2e: 1, 0, 0 */
"exb", /* 2f: 1, 0, 0 */
"exts", /* 30: 1, 0, 0 */
"extsb", /* 31: 1, 0, 0 */
"extsl", /* 32: 1, 0, 0 */
"halt", /* 33: 20, 0, 0 */
"in", /* 34: 14, 0, 0 */
"inb", /* 35: 311, 0, 0 */
"inc", /* 36: 24, 0, 0 */
"incb", /* 37: 6, 0, 0 */
"ind", /* 38: 1, 0, 0 */
"indb", /* 39: 1, 0, 0 */
"indr", /* 3a: 1, 0, 0 */
"indrb", /* 3b: 1, 0, 0 */
"ini", /* 3c: 6, 0, 0 */
"inib", /* 3d: 6, 0, 0 */
"inir", /* 3e: 6, 0, 0 */
"inirb", /* 3f: 10, 0, 0 */
"iret", /* 40: 28, 0, 0 */
"jp", /* 41: 28, 0, 0 */
"jr", /* 42: 6, 0, 0 */
"ld", /* 43: 6, 0, 0 */
"ldb", /* 44: 2, 0, 0 */
"ldl", /* 45: 1, 0, 0 */
"lda", /* 46: 17, 0, 0 */
"ldar", /* ?? */
"ldctl", /* 47: 22, 0, 0 */
"ldctlb", /* 48: 1, 0, 0 */
"ldd", /* 49: 1, 0, 0 */
"lddb", /* 4a: 1, 0, 0 */
"lddr", /* 4b: 1, 0, 0 */
"lddrb", /* 4c: 1, 0, 0 */
"ldi", /* 4d: 1, 0, 0 */
"ldib", /* 4e: 1, 0, 0 */
"ldir", /* 4f: 1, 0, 0 */
"ldirb", /* 50: 1, 0, 0 */
"ldk", /* 51: 8, 0, 0 */
"ldm", /* 52: 1, 0, 0 */
"ldps", /* 53: 9, 0, 0 */
"ldr", /* 54: 1, 0, 0 */
"ldrb", /* 55: 3, 0, 0 */
"ldrl", /* 56: 9, 0, 0 */
"mbit", /* 57: 1, 0, 0 */
"mreq", /* 58: 1, 0, 0 */
"mres", /* 59: 1, 0, 0 */
"mset", /* 5a: 1, 0, 0 */
"mult", /* 5b: 3, 0, 0 */
"multl", /* 5c: 1, 0, 0 */
"neg", /* 5d: 3, 0, 0 */
"negb", /* 5e: 1, 0, 0 */
"nop", /* 5f: 1, 0, 0 */
"or", /* 60: 3, 0, 0 */
"orb", /* 61: 1, 0, 0 */
"otdr", /* 62: 3, 0, 0 */
"otdrb", /* 63: 1, 0, 0 */
"otir", /* 64: 1, 0, 0 */
"otirb", /* 65: 1, 0, 0 */
"out", /* 66: 29, 0, 0 */
"outb", /* 67: 1, 0, 0 */
"outd", /* 68: 1, 0, 0 */
"outdb", /* 69: 3, 0, 0 */
"outi", /* 6a: 3, 0, 0 */
"outib", /* 6b: 3, 0, 0 */
"pop", /* 6c: 3, 0, 0 */
"popl", /* 6d: 17, 0, 0 */
"push", /* 6e: 12, 0, 0 */
"pushl", /* 6f: 3, 0, 0 */
"res", /* 70: 1, 0, 0 */
"resb", /* 71: 17, 0, 0 */
"resflg", /* 72: 0, 0, 0 */
"ret", /* 73: 0, 0, 0 */
"rl", /* 74: 0, 0, 0 */
"rlb", /* 75: 0, 0, 0 */
"rlc", /* 76: 0, 0, 0 */
"rlcb", /* 77: 0, 0, 0 */
"rldb", /* 78: 0, 0, 0 */
"rr", /* 79: 0, 0, 0 */
"rrb", /* 7a: 0, 0, 0 */
"rrc", /* 7b: 0, 0, 0 */
"rrcb", /* 7c: 0, 0, 0 */
"rrdb", /* 7d: 0, 0, 0 */
"sbc", /* 7e: 0, 0, 0 */
"sbcb", /* 7f: 0, 0, 0 */
"sc", /* 80: 0, 0, 0 */
"sda", /* 81: 0, 0, 0 */
"sdab", /* 82: 0, 0, 0 */
"sdal", /* 83: 0, 0, 0 */
"sdl", /* 84: 0, 0, 0 */
"sdlb", /* 85: 0, 0, 0 */
"sdll", /* 86: 0, 0, 0 */
"set", /* 87: 0, 0, 0 */
"setb", /* 88: 0, 0, 0 */
"setflg", /* 89: 0, 0, 0 */
"sin", /* 8a: 0, 0, 0 */
"sinb", /* 8b: 0, 0, 0 */
"sind", /* 8c: 0, 0, 0 */
"sindb", /* 8d: 0, 0, 0 */
"sindr", /* 8e: 0, 0, 0 */
"sindrb", /* 8f: 0, 0, 0 */
"sini", /* 90: 0, 0, 0 */
"sinib", /* 91: 0, 0, 0 */
"sinir", /* 92: 0, 0, 0 */
"sinirb", /* 93: 0, 0, 0 */
"sla", /* 94: 0, 0, 0 */
"slab", /* 95: 0, 0, 0 */
"slal", /* 96: 0, 0, 0 */
"sll", /* 97: 0, 0, 0 */
"sllb", /* 98: 0, 0, 0 */
"slll", /* 99: 0, 0, 0 */
"sotdr", /* 9a: 0, 0, 0 */
"sotdrb", /* 9b: 0, 0, 0 */
"sotir", /* 9c: 0, 0, 0 */
"sotirb", /* 9d: 0, 0, 0 */
"sout", /* 9e: 0, 0, 0 */
"soutb", /* 9f: 0, 0, 0 */
"soutd", /* a0: 0, 0, 0 */
"soutdb", /* a1: 0, 0, 0 */
"souti", /* a2: 0, 0, 0 */
"soutib", /* a3: 0, 0, 0 */
"sra", /* a4: 0, 0, 0 */
"srab", /* a5: 0, 0, 0 */
"sral", /* a6: 0, 0, 0 */
"srl", /* a7: 0, 0, 0 */
"srlb", /* a8: 0, 0, 0 */
"srll", /* a9: 0, 0, 0 */
"sub", /* aa: 0, 0, 0 */
"subb", /* ab: 0, 0, 0 */
"subl", /* ac: 0, 0, 0 */
"tcc", /* ad: 0, 0, 0 */
"tccb", /* ae: 0, 0, 0 */
"test", /* af: 0, 0, 0 */
"testb", /* b0: 0, 0, 0 */
"testl", /* b1: 0, 0, 0 */
"trdb", /* b2: 0, 0, 0 */
"trdrb", /* b3: 0, 0, 0 */
"trib", /* b4: 0, 0, 0 */
"trirb", /* b5: 0, 0, 0 */
"trtdb", /* b6: 0, 0, 0 */
"trtdrb", /* b7: 0, 0, 0 */
"trtib", /* b8: 0, 0, 0 */
"trtirb", /* b9: 0, 0, 0 */
"tset", /* ba: 0, 0, 0 */
"tsetb", /* bb: 0, 0, 0 */
"xor", /* bc: 0, 0, 0 */
"xorb", /* bd: 0, 0, 0 */
"", /* be: 0, 0, 0 */
};
/*
******** The reserved operands
*/
struct symbol oprands[] ={
0, 0, "", /* 0 */
RR, 0, "r0", /* 1 */
RR, 1, "r1", /* 2 */
RR, 2, "r2", /* 3 */
RR, 3, "r3", /* 4 */
RR, 4, "r4", /* 5 */
RR, 5, "r5", /* 6 */
RR, 6, "r6", /* 7 */
RR, 7, "r7", /* 8 */
RR, 8, "r8", /* 9 */
RR, 9, "r9", /* 10 */
RR, 10, "r10", /* 11 */
RR, 11, "r11", /* 12 */
RR, 12, "r12", /* 13 */
RR, 13, "r13", /* 14 */
RR, 14, "r14", /* 15 */
RR, 15, "r15", /* 16 */
RB, 0, "rh0", /* 17 */
RB, 1, "rh1", /* 18 */
RB, 2, "rh2", /* 19 */
RB, 3, "rh3", /* 20 */
RB, 4, "rh4", /* 21 */
RB, 5, "rh5", /* 22 */
RB, 6, "rh6", /* 23 */
RB, 7, "rh7", /* 24 */
RB, 8, "rl0", /* 25 */
RB, 9, "rl1", /* 26 */
RB, 10, "rl2", /* 27 */
RB, 11, "rl3", /* 28 */
RB, 12, "rl4", /* 29 */
RB, 13, "rl5", /* 30 */
RB, 14, "rl6", /* 31 */
RB, 15, "rl7", /* 32 */
RL, 0, "rr0", /* 33 */
RL, 1, "rr1?", /* 34 */
RL, 2, "rr2", /* 35 */
RL, 3, "rr3?", /* 36 */
RL, 4, "rr4", /* 37 */
RL, 5, "rr5?", /* 38 */
RL, 6, "rr6", /* 39 */
RL, 7, "rr7?", /* 40 */
RL, 8, "rr8", /* 41 */
RL, 9, "rr9?", /* 42 */
RL, 10, "rr10", /* 43 */
RL, 11, "rr11?", /* 44 */
RL, 12, "rr12", /* 45 */
RL, 13, "rr13?", /* 46 */
RL, 14, "rr14", /* 47 */
RL, 15, "rr15?", /* 48 */
RQ, 0, "rq0", /* 49 */
RQ, 4, "rq4", /* 50 */
RQ, 8, "rq8", /* 51 */
RQ, 12, "rq12", /* 52 */
0, 0, "X", /* 53 */
0, 0, "X", /* 54 */
0, 0, "X", /* 55 */
0, 0, "X", /* 56 */
0, 0, "Y", /* 57 */
II, 1, "@r1", /* 58 */
II, 2, "@r2", /* 59 */
II, 3, "@r3", /* 60 */
II, 4, "@r4", /* 61 */
II, 5, "@r5", /* 62 */
II, 6, "@r6", /* 63 */
II, 7, "@r7", /* 64 */
II, 8, "@r8", /* 65 */
II, 9, "@r9", /* 66 */
II, 10, "@r10", /* 67 */
II, 11, "@r11", /* 68 */
II, 12, "@r12", /* 69 */
II, 13, "@r13", /* 70 */
II, 14, "@r14", /* 71 */
II, 15, "@r15", /* 72 */
0, 0, "Y", /* 73 */
IL, 2, "@rr2", /* 74 */
IL, 4, "@rr4", /* 75 */
IL, 6, "@rr6", /* 76 */
IL, 8, "@rr8", /* 77 */
IL, 10, "@rr10", /* 78 */
IL, 12, "@rr12", /* 79 */
IL, 14, "@rr14", /* 80 */
0, 0, "Y", /* 81 */
0, 0, "Y", /* 82 */
0, 0, "Y", /* 83 */
0, 0, "Y", /* 84 */
0, 0, "Y", /* 85 */
0, 0, "Y", /* 86 */
0, 0, "Y", /* 87 */
0, 0, "Y", /* 88 */
0, 0, "Y", /* 89 */
PR, 1, "(r1)", /* 90 */
PR, 2, "(r2)", /* 91 */
PR, 3, "(r3)", /* 92 */
PR, 4, "(r4)", /* 93 */
PR, 5, "(r5)", /* 94 */
PR, 6, "(r6)", /* 95 */
PR, 7, "(r7)", /* 96 */
PR, 8, "(r8)", /* 97 */
PR, 9, "(r9)", /* 98 */
PR, 10, "(r10)", /* 99 */
PR, 11, "(r11)", /* 100 */
PR, 12, "(r12)", /* 101 */
PR, 13, "(r13)", /* 102 */
PR, 14, "(r14)", /* 103 */
PR, 15, "(r15)", /* 104 */
0, 0, "Y", /* 105 */
PL, 2, "(rr2)", /* 106 */
PL, 4, "(rr4)", /* 107 */
PL, 6, "(rr6)", /* 108 */
PL, 8, "(rr8)", /* 109 */
PL, 10, "(rr10)", /* 110 */
PL, 12, "(rr12)", /* 111 */
PL, 14, "(rr14)", /* 112 */
SR, 0, "cr0?", /* 113 */
SR, 1, "cr1?", /* 114 */
SR, 2, "fcw", /* 115 */
SR, 3, "refresh", /* 116 */
SR, 4, "psapseg", /* 117 */
SR, 5, "psapoff", /* 118 */
SR, 6, "nspseg", /* 119 */
SR, 7, "nspoff", /* 120 */
CC, 0, "Y", /* 121 */
CC, 1, "lt", /* 122 */
CC, 2, "le", /* 123 */
CC, 3, "ule", /* 124 */
CC, 4, "ov", /* 125 */
CC, 5, "mi", /* 126 */
CC, 6, "z", /* 127 */
CC, 7, "cy", /* 128 */
CC, 8, " ", /* 129 */
CC, 9, "ge", /* 130 */
CC, 10, "gt", /* 131 */
CC, 11, "ugt", /* 132 */
CC, 12, "nov", /* 133 */
CC, 13, "pl", /* 134 */
CC, 14, "nz", /* 135 */
CC, 15, "nc", /* 136 */
CC, 4, "pe", /* 137 */
CC, 6, "eq", /* 138 */
CC, 7, "ult", /* 139 */
CC, 12, "po", /* 140 */
CC, 14, "ne", /* 141 */
CC, 15, "uge", /* 142 */
0, 0, "NOTHING?", /* 143 */
VI, 1, "nvi", /* 144 */
VI, 2, "vi", /* 145 */
VI, 3, "vi,nvi", /* 146 */
UR, 1, "flags", /* 147 */
0, 0, "" /* 148 */
};