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Digital Research
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title 'I3 interrupt entry'
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;************************************************
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; *
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; INTERFACER 3 BOARD MODULE *
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; Last changed : 2/10/84 *
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; *
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;************************************************
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include i3board.equ
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dseg
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extrn icdesctbl:word
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extrn ocdesctbl:word
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extrn i3_xmit_int_vec:byte
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extrn bit_mask_tbl:byte
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cseg
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public i3r_int
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public i3t_int
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extrn sysdat:word
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extrn reset_i3iint_pic:near
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extrn reset_i3tint_pic:near
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extrn store_char:near
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extrn xmit_on:near
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extrn xmit_off:near
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extrn intco:near
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;;=======
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i3t_int: ; Interfacer 3 transmit interrupt entry
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;;=======
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;;
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;; ENTRY: from the interfacer 3's transmit ready interrupt line.
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;; The interfacer 3's interrupt status register has
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;; a bit set for each USART whose transmit buffer is empty.
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;;
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;; I3_xmit_int_vec contains a bit vector of the USARTS on
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;; Interfacer 3 that we have characters for.
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;;
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;; EXIT: back to the process we interrupted
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;;
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;; NOTE: All the USART's Xmit interrupts are wire ORed together
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;;
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push ds
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mov ds,sysdat
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mov i3_out_int_ss,ss
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mov i3_out_int_sp,sp
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mov ss,sysdat
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mov sp,offset i3_out_int_tos
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push ax
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push bx
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push cx
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push dx
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co_test_lp:
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mov al, 0 ;; We have to select a usart before
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out I3_SELECT_REG, al ;; we can query the board, see page 9
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;; of the interfacer 3 manual
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mov ah, i3_xmit_int_vec ;; bit vector of expected interrupts
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mov bx, offset bit_mask_tbl ;; byte mask for each Xmit interrupt
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mov cx, 8 ;; length of bit mask table
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co_lp:
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test ah, [bx]
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jz co_lp_1
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in al, I3_XMIT_INT_STAT ;; Get the board's interrupt status
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test al, [bx] ;; Is this the interrupt we expect ?
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jnz co_found_it
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co_lp_1:
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inc bx ;; point to the next mask
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loop co_lp ;; check all the USARTS
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jmp co_exit
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co_found_it: ;; cx = the USART number that interrupted us
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mov bx, offset ocdesctbl ;; base of Xmit Q table
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shl cx, 1
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add bx, cx ;; index into the table
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mov bx, [bx] ;; bx -> Xmit Q ctl Structure
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call intco ;; send the character
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jmps co_test_lp ;; In case another interrupt came in
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;; while we were doing this one, check
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;; the interrupt status again.
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co_exit:
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call reset_i3tint_pic
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pop dx ;; restore the environment
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pop cx
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pop bx
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pop ax
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mov ss, i3_out_int_ss ;; restore the stack
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mov sp, i3_out_int_sp
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pop ds ;; restore the data segment
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iret ;; back to the process we interrupted
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;
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;interfacer 3 output interrupt stack area
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rw 32
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i3_out_int_tos:
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rw 0
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i3_out_int_ss rw 1
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i3_out_int_sp rw 1
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;;-----------
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i3r_int: ;; Interfacer 3 receive interrupt entry
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;;---------
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;;
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;; ENTRY: from an interrupt
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push ds ;; establish a local data segment
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mov ds, sysdat
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mov i3r_sss, ss ;; save the stack we came in on
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mov i3r_sps, sp
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mov ss, sysdat ;; and establish our own local stack
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mov sp, offset i3r_tos
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push ax ;; save the reg's we need for
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push bx ;; the interrupt handler
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mov al, 0 ;; We have to select a USART on the
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out I3_SELECT_REG, al ;; interfacer 3 before we can query
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;; the interrupt status register.
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;; see page 9 of the interfacer 3
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;; manual
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in al, I3_RCV_INT_STAT ;; read the interfacer 3's
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;; interrupt status
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call res_usart ;; find which USART interrupted us
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mov bx, ax ;; save the usart's number
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out I3_SELECT_REG, al ;; select the USART
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in al, I3_UART_STATUS ;; get the status
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mov ah, al
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in al, I3_UART_DATA ;; and the data
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push ax ;; store the status and data
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call reset_i3iint_pic
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xor bh, bh ;; clear the high byte of the index
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inc bx ;; usart 0 in table is the SS board
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shl bx, 1 ;; word table
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mov bx, icdesctbl[bx] ;; bx -> USART q
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pop ax ;; retrieve the usart's status and data
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call store_char ;; process the character
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pop bx ;; restore the cpu registers
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pop ax
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cli ;; entering a critical region
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mov ss, i3r_sss ;; restore the stack
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mov sp, i3r_sps
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pop ds ;; restore the data segment
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iret
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res_usart:
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;;---------
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;;
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;; This routine does a binary search for the bit representing the USART
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;; that interrupted us.
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;;
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;; ENTRY: al = the interfacer 3's receive interrupt status byte
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;;
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;; EXIT: al = the number of usart whose bit is set
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;;
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;; NOTE: This routine only uses ax and the flags
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test al, 0FH
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jnz low_nibble
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test al, 30H ;; one of the bits in the upper nibble
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jz u_half
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test al,10H ;; in the lower half of the upper nibble
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jnz u_4
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mov al, 5 ;; USART 5
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jmps ux
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u_4:
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mov al,4 ;; USART 4
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jmps ux
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u_half:
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test al, 40H ;; it's either bit 6 or 7
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jnz u_6
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mov al, 7 ;; USART 7
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jmps ux
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u_6:
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mov al, 6 ;; USART 6
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jmps ux
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low_nibble:
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test al, 03H ;; one of the bits in the lower nibble
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jz u_half1
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test al, 01H ;; in the lower half of the lower nibble
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jnz u_0
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mov al, 1 ;; USART 1
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jmps ux
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u_0:
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mov al,0 ;; USART 0
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jmps ux
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u_half1:
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test al, 04H ;; it's either usart 2 or 3
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jnz u_2
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mov al, 3 ;; USART 3
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jmps ux
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u_2:
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mov al,2 ;; USART 2
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ux:
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ret
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i3r_sss dw 0 ; interfacer 3 receive stack segment save
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i3r_sps dw 0 ; interfacer 3 receive stack offset save
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rw 40
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i3r_tos:
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end
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