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Digital Research
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;*****************************************************
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; *
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; Serial Equates *
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; Last Update: 2/6/84 *
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;*****************************************************
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INMSGS equ 80H ; Input queue buffer size
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UPPER_LIM equ INMSGS - 10
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NULL equ 0
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V_FLAG equ 020H ; Flag bias for GSX
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SWITCH_BIAS equ 028H ; Flag bias for Screen Switch
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P_DELAY equ 141 ; used in Tick
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DELAY_16MS equ 1 ; each system tick is 16 ms
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; used by Send_Xon, Send_Xoff in Serin
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SLAVE_PIC_MASK equ 53H ; slave pic's irq mask port
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CONIN_IRQ equ 40H ; console input irq bit
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; usart's command registers bit equates
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X_CTL equ 01H
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DTR equ 02H
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R_CTL equ 04H
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ERROR_RESET equ 10H
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RTS equ 20H
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;usart's status register bit equates
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TXRDY equ 01H ;Transmit buffer is empty
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RXRDY equ 02H ;Receive buffer has data
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PARITY_ERR equ 08H
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OVERRUN_ERR equ 10H
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FRAME_ERR equ 20H
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DCD equ 40H ;Set = DCD is low
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DSR equ 80H ;Set = DSR is low
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eject
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;**************************************************
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; *
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; INPUT QUEUE CONTROL STRUCTURE *
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; *
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;**************************************************
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SYS_FLAG equ byte ptr 0 ; Q's CCP/M flag number
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Q_STATE equ word ptr (SYS_FLAG +1) ; current state of this Q
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CMD_REG equ byte ptr (Q_STATE + 2) ; usarts command reg image
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UN_PC equ word ptr (CMD_REG +1) ; unprocessed characters
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INT_IN equ word ptr (UN_PC + 2) ; interrupt side index
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PROC_OUT equ word ptr (INT_IN + 2) ; process side index
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U_NUMB equ byte ptr (PROC_OUT + 2) ; usart,s number
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U_PORTC equ byte ptr (U_NUMB + 1) ; usart's command port
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U_PORTS equ byte ptr (U_PORTC + 1) ; usart's status port
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U_PORTD equ byte ptr (U_PORTS + 1) ; usart's data port
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XINT_MASK equ byte ptr (U_PORTD +1) ; xmitters interrupt mask
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IESC_IN equ word ptr (XINT_MASK +1) ; input esc buff index
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OESC_IN equ word ptr (IESC_IN +2) ; output esc buff index
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LAST_CHAR equ byte ptr (OESC_IN +2) ; last char read from Q
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LAST_STAT equ byte ptr (LAST_CHAR +1) ; last status read from Q
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C_STATE equ word ptr (LAST_STAT +1) ; conin current routine/state
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P_CON equ byte ptr (C_STATE +2) ; physical console number
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V_CON equ byte ptr (P_CON +1) ; virtual console number
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ERR_CNT equ byte ptr (V_CON +1) ; Error reset counter
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ESC_BUFF equ byte ptr 32 ; the escape buffer
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D_BUFF equ byte ptr 48 ; the data buffer
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S_BUFF equ byte ptr (D_BUFF + INMSGS) ; the status buffer
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; bit definitions for Q_state
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IPROC_WAITING equ 0001H
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CHAR_AVAIL equ 0002H
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BIT8_MASK equ 0004H
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XX_MODE equ 0010H
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DTR_MODE equ 0020H
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RTS_MODE equ 0040H
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SENDER_STOPPED equ 0080H
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SWITCH_PEND equ 0100H
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eject
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;************************************************
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; *
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; OUTPUT QUEUE CONTROL STRUCTURE *
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; *
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;************************************************
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OFLAGN equ byte ptr 0 ; CCP/M's flag number
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OFLAG equ byte ptr 1 ; I/O system bit flags
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OMSGCNT equ word ptr 2 ; Number of chars in Q
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OMSGOUT equ word ptr 4 ; current output position in Q
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OIOPORT equ byte ptr 6 ; Output data port address
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OSTPORT equ byte ptr 7 ; Output Status port address
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OUSART equ byte ptr 8 ; Output Usart number
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OESC_CNT equ byte ptr 9 ; chars since last escape
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O_BIT_MASK equ byte ptr 10 ; USART's interrupt bit position
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CUR_VCON equ byte ptr 11 ; Current Vcon on this Pcon
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XMIT_MASK equ byte ptr 13 ; bit(s) used as a Xmit ready mask
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DSR_BIT equ byte ptr 14 ; bit used by usart to reflect the
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; status of the USARTs DSR pin.
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OBUFFER equ byte ptr 16 ; the Q starts here
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ONMSGS equ 0080h ; size of the output Q buffer
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OESC_MAX equ 4 ; maximum # char's in esc sequence
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; (for VT-52)
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; Bit definitions for Queue State field
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XON_XOFF_MODE EQU 20H ; If set, the Queue system will respect
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; Xon/Xoff protocol.
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XOFF_PENDING EQU 10H ; If set,the USART we're sending chars
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; to wants us to stop.
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RTS_PROT EQU 80H ; If set, the Queue system will recognize
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; the DSR pin on the USART.
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PROC_WAITING equ 01H ; If set,a process is waiting for
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; room in this Queue.
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NO_SELECT equ 0ffH ; Put into the USART NUMBER field of
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; the Q Control structure (OUSART) when:
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; we do not want a usart select call
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; made before a usart is accessed for
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; command, status, or data.
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; IN_XMT_MASK values for each of the USARTS
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SS_U equ 0FFH ; system support boards USART
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US_0 equ 01H ; Interfacer 3 USART 0
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US_1 equ 02H ; Interfacer 3 USART 1
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US_2 equ 04H ; Interfacer 3 USART 2
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US_3 equ 08H ; Interfacer 3 USART 3
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US_4 equ 10H ; Interfacer 3 USART 4
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US_5 equ 20H ; Interfacer 3 USART 5
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US_6 equ 40H ; Interfacer 3 USART 6
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US_7 equ 80H ; Interfacer 3 USART 7
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