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124 lines
5.8 KiB
ArmAsm
124 lines
5.8 KiB
ArmAsm
ttl ieee format equivalent add/subtract (iefadd/iefsub)
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***************************************
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* (c) copyright 1981 by motorola inc. *
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***************************************
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*************************************************************
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* iefadd/iefsub *
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* fast floating point ieee format equivalent add/subtract *
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* *
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* iefadd - ieee format equivalent floating point addition *
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* *
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* input: d6 - ieee format number addend (source) *
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* d7 - ieee format number adder (destination) *
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* *
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* iefsub - ieee format equivalent floating point subtract *
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* *
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* input: d6 - ieee format number subtrahend (source) *
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* d7 - ieee format number minuend (destination) *
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* *
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* output: d7 - ieee format floating result of register d6 *
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* added or subtracted from register d7 *
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* *
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* condition codes: *
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* n - result is negative *
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* z - result is zero *
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* v - result is nan (not-a-number) *
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* c - undefined *
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* x - undefined *
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* *
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* all registers transparent *
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* *
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* maximum used stack: 28 bytes *
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* *
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* result matrix: arg 2 *
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* others +inf -inf nan *
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* arg 1 **************************************** *
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* others * a * b * c * f * *
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* +infinity * b * b * d * f * *
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* -infinity * c * d * c * f * *
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* nan * e * e * e * f * *
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* **************************************** *
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* a = return addition or subtraction result, *
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* overflowing to infinity, underflowing to zero *
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* b = return plus infinity *
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* c = return minus infinity *
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* d = return newly created nan (not-a-number) *
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* e = return arg1 (nan) unchanged *
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* f = return arg2 (nan) unchanged *
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* *
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* notes: *
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* 1) for subtraction, the sign of the source is *
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* inverted and then the operation is treated as *
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* an addition using the decision matrix above. *
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* 2) see the mc68344 user's guide for a description of *
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* the possible differences between the results *
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* returned here versus those required by the *
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* ieee standard. *
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* *
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*************************************************************
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page
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iefadd idnt 1,1 ieee format equivalent add/subtract
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opt pcs
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xdef iefadd ieee format addition
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xdef iefsub ieee format subtraction
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xref iefdop double argument conversion routine
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xref iefrtnan create and return nan result routine
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xref iefrtd7 return contents of d7 as the result
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xref iefrtsz return signed zero with sign of d7
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xref ieftieee return and convert back to ieee format
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xref ffpadd reference fast floating point add routine
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xref ffpcpyrt copyright notice
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section 9
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************************
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* subtract entry point *
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************************
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iefsub bchg.l #31,d6 invert sign of second argument for subtract
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jsr iefadd and call add routine
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move.w sr,-(sp) save ccr of result on the stack [vlh] was sr
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bchg.l #31,d6 revert sign back to original condition
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rtr return with result and condition codes
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*******************
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* add entry point *
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*******************
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iefadd jsr iefdop decode both operands
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jmp iefnrm +0 branch normalized
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jmp iefinf2 +2 branch arg2 infinity
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jmp iefinf1 +4 branch arg1 infinity
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* test for opposite signs +6 both are infinity
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eor.l d6,d7 exclusive or signs
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* bmi iefrtnan opposite signs - go return a nan
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bmi GOTHERE
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jmp iefinf1
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GOTHERE jmp iefrtnan * loader problem
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* otherwise both same and return same
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* arg1 infinity - return it
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iefinf1 move.l d6,d7 return arg1
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* arg2 infinity - return it (already in d7)
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iefinf2 jmp iefrtd7 return d7 as our result
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* normalized numbers - do the addition
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iefnrm jsr ffpadd do fast floating point add
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* bne ieftieee convert result back to ieee format
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bne DOIT
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jmp NOPE
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DOIT jmp ieftieee
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* the above few lines had to be changed because of the loader problem
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* result is zero - return with proper sign for rn (round-to-nearest)
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NOPE
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movem.l (sp),d3-d7 reload arguments (and rest of registers)
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and.l d6,d7 return minus only if both minus
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jmp iefrtsz return signed zero with sign of d7
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end
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