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199 lines
10 KiB
ArmAsm
199 lines
10 KiB
ArmAsm
ttl ieee format equivalent back-end routines (iefback)
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iefback idnt 1,1 ieee format equivalent back-end routines
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******************************************
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* (c) copyright 1981 by motorola inc. *
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******************************************
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section 9
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****************************************************************
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* iefrtnan (internal routine) *
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* ieee format equivalent fast floating point return nan *
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* *
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* input: sp -> +0 original callers d3-d7 registers *
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* +20 original callers return address *
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* *
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* output: d7 - a newly created nan (not-a-number) *
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* ccr - the "v" bit is forced on *
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* *
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* and direct return to the original caller *
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* *
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* purpose: called whenever the result of an operation *
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* is illegal or undefined and a nan result must *
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* be generated as the final result. *
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* *
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* the ieee format defined nan is determined by an exponent *
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* of all one's and a non-zero significand. the sign bit *
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* is a don't care. the ieee standard leaves up to each *
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* implementation what is placed in the significand. here *
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* we will generate the low order 23 bits of the original *
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* caller's return address. however, this may not be *
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* sufficient - if all 23 bits happen to be zero or the *
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* address is larger than 23 bits this would lead to an *
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* incorrect result. therfore, if this happens only the low *
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* order significand bit is set on with the rest zeroes. *
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* this represents an odd address (illegal with current m68000*
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* instruction alignment restrictions) and any interested *
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* party can tell if such a substitution has taken place. *
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* also, if this was illegally assumed to be an address and *
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* used, an address exception trap would ensue thus not *
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* allowing its use as a valid address. *
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* *
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****************************************************************
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signmsk equ $80000000 ieee format sign isolation mask
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expmsk equ $7f800000 ieee format exponent mask
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vbit equ $0002 condition code "v" bit mask
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zbit equ $0004 condition code "z" bit mask
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xdef iefrtnan return nan result routine
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iefrtnan movem.l (sp)+,d3-d7 restore callers registers
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move.l (sp),d7 load up return address
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and.l #signmsk+expmsk,d7 verify not larger than 23 bits
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bne.s iefnone it is, cannot use it - return a one
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move.l (sp),d7 load up return address
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and.l #$007fffff,d7 isolate address bits required
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bne.s iefnzro branch if not zero
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iefnone move.l #1,d7 set only low bit on
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iefnzro or.l #expmsk,d7 force exponent all ones
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or.b #vbit,ccr return with "v" bit set [vlh]
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rts return to original caller
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page
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**********************************************************
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* ieftieee (internal subroutine) *
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* ieee format compatible convert ffp to ieee format *
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* *
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* input: d7 - result of fast floating point operation *
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* ccr - set for above result *
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* sp -> +0 original callers saved d3-d7 *
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* +20 original callers return address *
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* *
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* output: d7 - ieee format equivalent of the result *
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* *
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* condition code: *
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* *
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* n - set if the result is negative *
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* z - set if the result is zero *
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* v - cleared (not nan) *
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* c - cleared *
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* x - undefined *
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* *
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* all fast floating point numbers have an exact *
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* ieee format representation. since the fast *
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* floating point routines always set the "v" bit *
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* for overflows and returns the proper sign, we *
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* can easily change the result to an ieee infinity *
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* and unflag the "v" bit. *
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* *
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**********************************************************
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xdef ieftieee return ieee result to original caller
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ieftieee bvs.s iefvset branch if overflow ffp result
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add.l d7,d7 delete mantissa high bit
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beq.s ieftrtn branch zero as finished
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eor.b #$80,d7 to twos complement exponent
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asr.b #1,d7 form 8-bit exponent
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sub.b #$82,d7 adjust 64 to 127 and excessize
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swap.w d7 swap for high byte placement
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rol.l #7,d7 set sign+exp in high byte
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ieftrtn tst.l d7 test "z" and "n", clear "v" and "c" in ccr
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movem.l (sp)+,d3-d6 restore d3 thru d6 callers registers
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add.l #4,sp skip original d7
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rts return to original caller with result
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* overflow - set to proper ieee format infinity
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iefvset add.b d7,d7 save sign bit in "x"
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move.l #expmsk<<1,d7 set exponent of ones shifted left
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roxr.l #1,d7 insert proper sign
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jmp ieftrtn and return to original caller
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page
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*******************************************************************
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* general purpose return routines *
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* *
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* the following routines return a specific final result *
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* to the original caller with the proper condition codes *
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* set as follows: *
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* *
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* n - the result is negative *
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* z - the result is a zero *
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* v - cleared (not a nan) *
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* c - undefined *
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* x - undefined *
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* *
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* the routines are as follows: *
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* *
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* iefrtd7 - return the current contents of d7 *
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* iefrtod7 - return the original contents of d7 *
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* iefrtsz - return a signed zero (sign is bit 31 of d7) *
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* iefrtie - return infinity with sign exclusive or of *
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* original argument signs *
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* iefrtsze - return signed zero with sign exclusiv or *
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* of original argument signs *
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* *
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*******************************************************************
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xdef iefrtd7,iefrtsz,iefrtod7,iefrtie,iefrtsze
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**********************
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* return original d7 *
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* (cant be neg zero) *
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**********************
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iefrtod7 move.l 16(sp),d7 load original d7 into d7
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*********************
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* return current d7 *
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* (cant be neg zero)*
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*********************
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iefrtd7 movem.l (sp)+,d3-d6 load all but d7 registers back up
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add.l #4,sp skip original d7 on stack
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add.l d7,d7 check for signed zero
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beq.s iefwasz branch if was a zero
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roxr.l #1,d7 value back into position set ccr ("v" clear)
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rts return to caller with ccr and result
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**************************************
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* return signed zero with sign being *
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* eor of the original operands *
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**************************************
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iefrtsze movem.l 12(sp),d6-d7 load original arguments
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eor.l d6,d7 produce proper sign
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**********************
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* return signed zero *
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* d7 bit31 has sign *
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**********************
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iefrtsz movem.l (sp)+,d3-d6 load all but d7 back up
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add.l #4,sp skip original d7 on stack
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add.l d7,d7 set sign bit into carry
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move.l #0,d7 zero d7
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iefwasz roxr.l #1,d7 set sign bit back in ("v" cleared)
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or.b #zbit,ccr force zero bit on in ccr [vlh]
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rts
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*********************************
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* return infinity with eor sign *
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* of original arguments *
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*********************************
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iefrtie movem.l (sp)+,d3-d7 restore original arguments
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eor.l d6,d7 produce proper sign
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add.l d7,d7 shift sign out
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move.l #expmsk<<1,d7 setup infinity (exponent all ones)
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roxr.l #1,d7 set sign back in ("v" cleared)
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rts return with result and ccr set
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end
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set sign back in ("v" cleared)
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rts return with result and ccr set
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end
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set sign back in ("v" cleared)
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rts return with result and ccr set
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end
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set sign back in ("v" cleared)
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rts return with result and ccr set
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end
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