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https://github.com/SEPPDROID/Digital-Research-Source-Code.git
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379 lines
9.4 KiB
ArmAsm
379 lines
9.4 KiB
ArmAsm
*************************************************
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* *
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* CP/M-68k Basic Disk Operating System *
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* Exception Handling Module *
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* *
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* Version 0.0 -- July 21, 1982 *
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* Version 0.1 -- July 25, 1982 *
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* Version 0.2 -- October 6, 1982 *
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* Version 0.3 -- December 21, 1982 *
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* *
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* Modified 2/15/84 sw for 68010 support *
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* *
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*************************************************
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.globl _initexc
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.globl _tpa_lp
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.globl _tpa_hp
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.globl gouser *sw RTE routine
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bgetseg = 18
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bsetexc = 22
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buserr = 2
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spurious = 24
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trap0 = 32
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trap2 = 34
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trap3 = 35
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endvec = 48
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_initexc:
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* Initialize Exception Vector Handlers
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* It has 1 passed parameter: the address of the exception vector array
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move #bsetexc,d0
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moveq #2,d1
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move.l #exchndl,d2
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init1:
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movem.l d0-d2,-(sp)
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trap #3 * BIOS call to set exception vector
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movem.l (sp)+,d0-d2
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init2: addq #1,d1
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add.l #4,d2
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cmpi #spurious,d1
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bne init3
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move #trap0,d1
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init3: cmpi #trap2,d1
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beq init2 * don't init trap 2 or trap 3
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cmpi #trap3,d1
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beq init2
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cmpi #endvec,d1
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blt init1
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* initialize the exception vector array
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moveq #bgetseg,d0
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trap #3 * get the original TPA limits
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movea.l d0,a0
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tst.w (a0)+
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move.l (a0)+,d1 * d1 = original low TPA limit
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move.l d1,d2
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add.l (a0),d2 * d2 = original high TPA limit
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move.l _tpa_lp,d3 * d3 = new low TPA limit
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move.l _tpa_hp,d4 * d4 = new high TPA limit
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move #17,d0
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movea.l 4(sp),a0
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move.l a0,evec_adr * save exception vector address
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init4:
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cmp.l (a0),d1
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bhi do_init * if old exception outside orig TPA, clear it
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cmp.l (a0),d2
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bls do_init
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* current exception array entry is in original TPA
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cmp.l (a0),d3
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bhi dontinit * if old exception in old TPA but outside new
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cmp.l (a0),d4 * TPA, don't clear it
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bls dontinit
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do_init:
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clr.l (a0)
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dontinit:
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tst.l (a0)+
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dbf d0,init4
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rts
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.page
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exchndl:.equ *
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#ifndef M68010
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bsr.w except * 2 Buserr
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excrtn0:
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bsr.w except * 3 Addressing error
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bsr.w except * 4 Illegal Instruction
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#else
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.globl m68010 * Note case difference!
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m68010: * For build process
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bsr.w berr * 2 Buserr
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excrtn0:
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bsr.w berr * 3 Addressing error
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bsr.w except * 4 Illegal Instruction
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#endif
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bsr.w except * 5
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bsr.w except * 6
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bsr.w except * 7
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#ifndef M68010
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bsr.w except * 8
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#else * Privilege violation
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bsr.w privviol * 8
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#endif
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bsr.w except * 9
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bsr.w except * 10
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bsr.w except * 11
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bsr.w except * 12
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bsr.w except * 13
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bsr.w except * 14
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bsr.w except * 15
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bsr.w except * 16
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bsr.w except * 17
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bsr.w except * 18
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bsr.w except * 19
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bsr.w except * 20
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bsr.w except * 21
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bsr.w except * 22
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bsr.w except * 23
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bsr.w except * 24
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bsr.w except * 25
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bsr.w except * 26
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bsr.w except * 27
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bsr.w except * 28
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bsr.w except * 29
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bsr.w except * 30
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bsr.w except * 31
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bsr.w except * 32
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bsr.w except * 33
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bsr.w except * 34
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bsr.w except * 35
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bsr.w except * 36
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bsr.w except * 37
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bsr.w except * 38
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bsr.w except * 39
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.page
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#ifdef M68010
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*
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* Here if the exception in question was a buserr/addressing error.
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* We reformat the stack to look like a 68000.
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*
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* Entered with a standard 68010 exception stack frame with a return
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* address on top (at 0(sp)).
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*
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berr:
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move.l $0(sp),$2a(sp) * Move return address
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move.w $0c(sp),$2e(sp) * Move Status word
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andi.w #7,$2e(sp) * Clear all but FC0-2
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move.l $0e(sp),$30(sp) * Copy Fault address
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move.w $1c(sp),$34(sp) * Move IR
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move.w $4(sp),$36(sp) * Move SR
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move.l $6(sp),$38(sp) * Move PC
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move.w $0a(sp),$3c(sp) * Move format word
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adda.l #$2a,sp * Make sp -> new frame
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bra except * Merge
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******************************************************************************
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* Here we make up for a faux pas in the C compiler. Change all *
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* move from SR instructions ($40CX) to move from CCR ($42CX). *
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* Precludes executing 68000 programs in ROM on a 68010. *
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* *
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* Relies on the fact that the exception PC (Stack offset 0E below) *
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* points to the instruction on an illegal instruction exception. *
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******************************************************************************
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privviol:
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movem.l d0/a0,-(sp) * Save some regs
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move.l $0e(sp),a0 * A0 -> Instruction
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move.w (a0),d0 * d0 = Instruction
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andi.w #$FFC0,d0 * Mask off <EA> field
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cmpi.w #$40C0,d0 * Move from SR?
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bne notsr * No, handle normally
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ori.w #$0200,(a0) * Change to move from CCR
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movem.l (sp)+,d0/a0 * Restore regs
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tst.l (sp)+ * Pop return address
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rte * Try it again
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notsr: movem.l (sp)+,d0/a0 * Abandon hope, all ye ..
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.page
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#endif
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except:
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clr.w -(sp)
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movem.l a0/d0,-(sp) * 10 (11) words now on stack in following order
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* _______________________________
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* |____________D0.L_______________|
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* |____________A0.L_______________|
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* |____0000______|________________
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* |_______Handler Return__________|
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* If bus error, extra 2 longs are here
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* ______________
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* |__Status Reg__|________________
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* |_____Exception Return__________|
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* |_(format word)|
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move.l 10(sp),d0 * get return address from above array
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sub.l #excrtn0,d0 * d0 now has 4 * (encoded excptn nmbr), where
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* encoded excptn nmbr is in [0..21,22..37]
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* representing [2..23,32..47]
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cmpi #36,d0 * if d0/4 is in [0..9,22..29] then
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ble chkredir * the exception may be redirected
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cmpi #88,d0
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blt dfltexc
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cmpi #116,d0
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bgt dfltexc
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* in range of redirected exceptions
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subi #48,d0 * subtract 4*12 to normalize [0..9,22..29]
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* into [0..9,10..17]
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chkredir:
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movea.l evec_adr,a0
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adda d0,a0 * index into exception vector array
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tst.l (a0) * if 00000000, then not redirected
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bne usrexc
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* not redirected, do default handler
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supexc: * Here for supervisor state
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cmpi #40,d0
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blt dfltexc
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addi #48,d0 * add 4*12 that was sub'd above
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dfltexc:
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adda #14,sp * throw away 7 words that we added to stack
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asr #2,d0 * divide d0 by 4
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* now d0 is in [0..21,22..37]
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* to represent [2..23,32..47]
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cmpi #2,d0 * bus or address error?
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bge nobusexc
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movem.l (sp)+,a0-a1 * if yes, throw away 4 words from stack
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nobusexc:
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tst.w (sp)+ * throw away stacked SR
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addi #2,d0
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cmpi #23,d0 * get back real excptn nmbr in [2..23,32..47]
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ble lowexc
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addi #8,d0
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lowexc: move d0,-(sp) * save excptn nmbr
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lea excmsg1,a0
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bsr print * print default exception message
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move (sp)+,d0
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bsr prtbyte
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lea excmsg2, a0
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bsr print
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move.l (sp)+,d0
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bsr prtlong
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lea excmsg3, a0
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bsr print
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clr.l d0
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trap #2 * warm boot
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rte
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usrexc:
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* Call user exception handler
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* make sure exception information is on his stack
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cmpi #8,d0 * address or bus error?
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blt addrexc * if yes, skip
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btst #13,14(sp) * exception occured in user state?
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bne supexc *sw if no, go to supervisor handler
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move.l (a0),10(sp) * put user handler address on our stack
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move.l usp,a0 * user stack pointer to a0
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move.l 16(sp),-(a0) * put exception return on user stack
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move.w 14(sp),-(a0) * put SR on user stack
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move.l a0,usp * update user stack pointer
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movem.l (sp)+,a0/d0 * restore regs
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move.l 2(sp),8(sp) * move address of user handler to excptn rtn
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#ifdef M68010
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clr.w 12(sp) *sw Clear out the format word
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#endif
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addq #6,sp * clear junk from stack
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andi #$7fff,(sp) * clear trace bit
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rte * go to user handler
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addrexc:
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btst #13,22(sp) * exception occured in user state?
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bne supexc *sw if no, go to supervisor handler
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move.l (a0),10(sp) * put user handler address on our stack
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move.l usp,a0 * user stack pointer to a0
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move.l 24(sp),-(a0) * put exception return on user stack
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move.w 22(sp),-(a0) * put SR on user stack
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move.l 18(sp),-(a0) * put extra 2 longs on user stack
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move.l 14(sp),-(a0)
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move.l a0,usp * update user stack pointer
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movem.l (sp)+,a0/d0 * restore regs
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move.l 2(sp),16(sp) * move address of user handler to excptn rtn
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#ifdef M68010
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clr.w 20(sp) *sw Clear format word
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#endif
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adda #14,sp * clear junk from stack
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andi #$7fff,(sp) * clear trace bit
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rte * go to user handler
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.page
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*******************************************************************************
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*
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* gouser routine. This routine performs an RTE to go to the user program
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* User EPA is passed in A0.L.
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*
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*******************************************************************************
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gouser:
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#ifdef M68010
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clr.w -(sp) * Push format word
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#endif
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move.l a0,-(sp) * Push epa
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clr.w -(sp) * and SR
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rte * Do it. Into user program.
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.page
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*
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* Subroutines
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*
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print:
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clr.l d1
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move.b (a0)+, d1
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beq prtdone
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move #2, d0
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trap #2
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bra print
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prtdone:
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rts
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prtlong:
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* Print d0.l in hex format
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move d0,-(sp)
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swap d0
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bsr prtword
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move (sp)+,d0
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prtword:
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* Print d0.w in hex format
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move d0,-(sp)
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lsr #8,d0
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bsr prtbyte
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move (sp)+,d0
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prtbyte:
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* Print d0.b in hex format
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move d0,-(sp)
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lsr #4,d0
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bsr prtnib
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move (sp)+,d0
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prtnib:
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andi #$f,d0
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cmpi #10,d0
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blt lt10
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addi.b #'A'-'9'-1,d0
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lt10:
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addi.b #'0',d0
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move d0,d1
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move #2,d0
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trap #2
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rts
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.data
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excmsg1:
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.dc.b 13,10,10,'Exception $',0
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excmsg2:
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.dc.b ' at user address $',0
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excmsg3:
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.dc.b '. Aborted.',0
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.bss
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evec_adr:
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.ds.l 1
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.end
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0
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excmsg2:
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.dc.b ' at user address $',0
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excmsg3:
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.dc.b '. Aborted.',0
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.bss
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evec_adr:
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.ds.l 1
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.end
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