mirror of
https://github.com/SEPPDROID/Digital-Research-Source-Code.git
synced 2025-10-23 16:34:07 +00:00
225 lines
5.8 KiB
Plaintext
225 lines
5.8 KiB
Plaintext
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M4_LBL_SEG EQU 0FFFFH
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M4_LBL_OFST EQU 05H
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M4_PROM_VER EQU 03FFFH
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M4_PROM_SEG EQU 0FC00H
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; LSI-M4 & CAL-PC prom calls (relative to M4_PROM_SEG)
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BOOT EQU 03000H
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SIO_IN EQU 03005H
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SIO_OUT EQU 0300AH
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SIO_IN_STAT EQU 0300FH
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SIO_OUT_STAT EQU 03014H
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PRNTR_STAT EQU 03019H
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PRNTR_OUT EQU 0301EH
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FLOP_SET EQU 03023H
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FLOP_ALL EQU 03028H
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FLOP_START EQU 0302DH
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FLOP_CONT EQU 03032H
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FLOP_ABORT EQU 03037H
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HDSK_ALL EQU 0303CH
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HDSK_START EQU 03041H
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HDSK_CONT EQU 03046H
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HDSK_ABORT EQU 0304BH
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HDSK_SIZE EQU 03050H
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GET_SWITCH EQU 03055H
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CPM EQU 0E0H
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CODEMACRO CALL_PROM FUNC_CALL:DW
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DB 09AH
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DW FUNC_CALL
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DW 0FC00H
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ENDM
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; LSI-M4 & CAL-PC I/O port definitions
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; DMA controller (i8237-2) ports
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DMAC_BADD0 EQU 00H ;Channel 0 - base & current address (write)
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DMAC_CADD0 EQU 00H ; " " - current address (read)
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DMAC_BCNT0 EQU 01H ; " " - base & current word count (write)
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DMAC_CCNT0 EQU 01H ; " " - current word count (read)
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DMAC_BADD1 EQU 02H ;Channel 1 - base & current address (write)
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DMAC_CADD1 EQU 02H ; " " - current address (read)
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DMAC_BCNT1 EQU 03H ; " " - base & current word count (write)
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DMAC_CCNT1 EQU 03H ; " " - current word count (read)
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DMAC_BADD2 EQU 04H ;Channel 2 - base & current address (write)
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DMAC_CADD2 EQU 04H ; " " - current address (read)
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DMAC_BCNT2 EQU 05H ; " " - base & current word count (write)
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DMAC_CCNT2 EQU 05H ; " " - current word count (read)
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DMAC_BADD3 EQU 06H ;Channel 3 - base & current address (write)
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DMAC_CADD3 EQU 06H ; " " - current address (read)
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DMAC_BCNT3 EQU 07H ; " " - base & current word count (write)
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DMAC_CCNT3 EQU 07H ; " " - current word count (read)
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DMAC_STAT EQU 08H ;Status register (read)
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DMAC_CMD EQU 08H ;Command register (write)
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DMAC_REQ EQU 09H ;Request register (write)
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DMAC_MASK_SR EQU 0AH ;Single mask register bit (write)
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DMAC_MODE EQU 0BH ;Mode register (write)
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DMAC_FLOP EQU 0CH ;Clear byte pointer flip/flop (write)
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DMAC_TEMP EQU 0DH ;Temporary register (read)
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DMAC_CLR EQU 0DH ;Master clear (write)
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DMAC_MASK EQU 0FH ;All mask register bits (write)
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; programmable interrupt controller (i8259A) ports
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PIC_STAT EQU 010H ;Interrupt request/serviced status
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PIC_ICW EQU 010H ;Initialization control words
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PIC_IMR EQU 011H ;Interrupt level masks
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PIC_OCW EQU 011H ;Operational control words
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; DIP switch and diagnostic LED display
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DIP_SW EQU 020H ;DIP switch
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LED_DSPY EQU 020H ;LED display
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; Bank select registers
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DMAC_BANK EQU 30H ;general - before seperate ones used
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FDC_BANK EQU 31H ;Floppy bank
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REFRESH_BANK EQU 30H ;Refresh bank
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SIO_BANK EQU 32H ;SIO bank - for networking
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WINCH_BANK EQU 33H ;Winchester bank
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Z80_BANK EQU 30H ;Z80 bank
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; CRT controller
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CRT_ADDR EQU 040H ;Address/status register
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CRT_STAT EQU 040H
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CRT_DATA EQU 041H ;Register file
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CRT_CHAR EQU 020H ;Character latch
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; Floppy disk controller ports
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AUC_CMD EQU 050H ;Floppy disk select/handshake
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FDC_CMD EQU 060H ;Command port
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FDC_STAT EQU 060H ;Status register
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FDC_TRK EQU 061H ;Track register
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FDC_SEC EQU 062H ;Sector register
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FDC_DATA EQU 063H ;Data register
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; Keyboard
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KYBD_DATA EQU 051H ;Keyboard data
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KYBD_STAT EQU 052H ;Keyboard status
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KYBD_CNTL EQU 053H ;Mode control 8255
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BUZZER EQU 050H ;Buzzer
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; Hard disk registers
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ADP_STAT EQU 071H
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ADP_CMD EQU 071H
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ADP_DIAG EQU 072H
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ADP_DATA EQU 073H
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; Programmable interval timer (i8253) ports
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PIT0_CT0 EQU 080H ;PIT 0, counter 0
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PIT0_CT1 EQU 081H ; " 0, " 1
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PIT0_CT2 EQU 082H ; " 0, " 2
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PIT0_CTL EQU 083H ; " 0, control
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PIT1_CT0 EQU 090H ; " 1, counter 0
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PIT1_CT1 EQU 091H ; " 1, " 1
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PIT1_CT2 EQU 092H ; " 1, " 2
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PIT1_CTL EQU 093H ; " 1, control
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; Serial input/output (Z80-SIO) ports
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SI00A_DATA EQU 0A0H ;SIO 0, channel A, data
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SI00A_STAT EQU 0A1H ; " 0, " A, status
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SI00A_CNTL EQU 0A1H ; " 0, " A, control
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SI00B_DATA EQU 0A2H ;SIO 0, channel B, data
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SI00B_STAT EQU 0A3H ; " 0, " B, status
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SI00B_CNTL EQU 0A3H ; " 0, " B, control
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SI01A_DATA EQU 0B0H ;SIO 1, channel A, data
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SI01A_STAT EQU 0B1H ; " 1, " A, status
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SI01A_CNTL EQU 0B1H ; " 1, " A, control
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SI01B_DATA EQU 0B2H ;SIO 1, channel B, data
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SI01B_STAT EQU 0B3H ; " 1, " B, status
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SI01B_CNTL EQU 0B3H ; " 1, " B, control
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SIO_INT_VEC EQU 0E0H ;Interrupt vector - SIO or DART
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; Centronics compatible parallel printer ports
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PRT_DATA EQU 0F0H ;Printer data out
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PRT_STAT EQU 0F1H ; " status
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PRT_CNTL EQU 0F2H ; " control
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PRT_MODE EQU 0F3H ; " port mode control
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PRT_FLAG EQU PRT_MODE
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; LED display constants
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led_0 equ 0c0h
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led_1 equ 0f9h
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led_2 equ 0a4h
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led_3 equ 0b0h
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led_4 equ 099h
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led_5 equ 092h
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led_6 equ 082h
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led_7 equ 0f8h
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led_8 equ 080h
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led_9 equ 098h
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led_0p equ 040h
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led_1p equ 079h
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led_2p equ 024h
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led_3p equ 030h
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led_4p equ 019h
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led_5p equ 012h
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led_6p equ 002h
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led_7p equ 078h
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led_8p equ 000h
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led_9p equ 018h
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; Others
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LINE_LENGTH EQU 80 ;Length of CRT character line
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CR EQU 13
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LF EQU 10
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BS EQU 08
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ESC EQU 1BH
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NULL EQU 0
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BELL EQU 7
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TAB EQU 9
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SPACE EQU 20H
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INT3 EQU 0CCH
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CNTL_X EQU 'X'-'A'+1
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CNTL_Q EQU 'Q'-'A'+1
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CNTL_Z EQU 'Z'-'A'+1
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CNTL_S EQU 'S'-'A'+1
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TRUE EQU -1
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FALSE EQU 0
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RD_CMD EQU 20H ;Read command for FLOPALL
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WR_CMD EQU 50H ;Write with verify
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BIT0 EQU 00000001B
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BIT1 EQU 00000010B
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BIT2 EQU 00000100B
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BIT3 EQU 00001000B
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BIT4 EQU 00010000B
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BIT5 EQU 00100000B
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BIT6 EQU 01000000B
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BIT7 EQU 10000000B
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bit8 equ 0100h
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bit9 equ 0200h
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bit10 equ 0400h
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bit11 equ 0800h
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bit12 equ 1000h
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bit13 equ 2000h
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bit14 equ 4000h
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bit15 equ 8000h
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JC EQU JB
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JNC EQU JNB
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JNBE EQU JA
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SBC EQU SBB
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; End of CALIO.EQU
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