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claude/bui
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main
| Author | SHA1 | Date | |
|---|---|---|---|
|
fbfd069cf7 |
@@ -634,13 +634,20 @@ function getVerifyBaselineStep(platform, options) {
|
||||
const emulator = getEmulatorBinary(platform);
|
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const jitStressFlag = hasWebKitChanges(options) ? " --jit-stress" : "";
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||||
|
||||
// Scan bun-profile, not bun. The stripped binary has no .symtab (ELF) and
|
||||
// no companion .pdb (PE) — the static scanner would emit <no-symbol@addr>
|
||||
// for everything and none of the allowlist entries would match. bun-profile
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||||
// has identical .text so violation results are the same, just attributable.
|
||||
const profileDir = `${triplet}-profile`;
|
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const profileExe = os === "windows" ? "bun-profile.exe" : "bun-profile";
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||||
|
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const setupCommands =
|
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os === "windows"
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? [
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`echo Downloading build artifacts...`,
|
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`buildkite-agent artifact download ${triplet}.zip . --step ${targetKey}-build-bun`,
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`echo Extracting ${triplet}.zip...`,
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`tar -xf ${triplet}.zip`,
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`buildkite-agent artifact download ${profileDir}.zip . --step ${targetKey}-build-bun`,
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`echo Extracting ${profileDir}.zip...`,
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`tar -xf ${profileDir}.zip`,
|
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`echo Downloading Intel SDE...`,
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`curl.exe -fsSL -o sde.tar.xz "${SDE_URL}"`,
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`echo Extracting Intel SDE...`,
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@@ -649,9 +656,9 @@ function getVerifyBaselineStep(platform, options) {
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`ren sde-external-${SDE_VERSION}-win sde-external`,
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]
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: [
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`buildkite-agent artifact download '*.zip' . --step ${targetKey}-build-bun`,
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`unzip -o '${triplet}.zip'`,
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`chmod +x ${triplet}/bun`,
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`buildkite-agent artifact download '${profileDir}.zip' . --step ${targetKey}-build-bun`,
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`unzip -o '${profileDir}.zip'`,
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`chmod +x ${profileDir}/${profileExe}`,
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];
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return {
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@@ -664,7 +671,8 @@ function getVerifyBaselineStep(platform, options) {
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timeout_in_minutes: hasWebKitChanges(options) ? 30 : 10,
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command: [
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...setupCommands,
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`bun scripts/verify-baseline.ts --binary ${triplet}/${os === "windows" ? "bun.exe" : "bun"} --emulator ${emulator}${jitStressFlag}`,
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`cargo build --release --manifest-path scripts/verify-baseline-static/Cargo.toml`,
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`bun scripts/verify-baseline.ts --binary ${profileDir}/${profileExe} --emulator ${emulator}${jitStressFlag}`,
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],
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};
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}
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@@ -6,7 +6,7 @@ option(WEBKIT_LOCAL "If a local version of WebKit should be used instead of down
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option(WEBKIT_BUILD_TYPE "The build type for local WebKit (defaults to CMAKE_BUILD_TYPE)")
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if(NOT WEBKIT_VERSION)
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set(WEBKIT_VERSION 4a6a32c32c11ffb9f5a94c310b10f50130bfe6de)
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set(WEBKIT_VERSION 00e825523d549a556d75985f486e4954af6ab8c7)
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endif()
|
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|
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|
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@@ -210,6 +210,14 @@ if(LINUX AND ABI STREQUAL "musl")
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set(WEBKIT_SUFFIX "-musl")
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endif()
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# Baseline WebKit artifacts (-march=nehalem, /arch:SSE2 ICU) exist for
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# Linux amd64 (glibc + musl) and Windows amd64. No baseline variant for
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# arm64 or macOS. Suffix order matches the release asset names:
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# bun-webkit-linux-amd64-musl-baseline-lto.tar.gz
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if(ENABLE_BASELINE AND WEBKIT_ARCH STREQUAL "amd64")
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set(WEBKIT_SUFFIX "${WEBKIT_SUFFIX}-baseline")
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endif()
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|
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if(DEBUG)
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set(WEBKIT_SUFFIX "${WEBKIT_SUFFIX}-debug")
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elseif(ENABLE_LTO)
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|
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2
scripts/verify-baseline-static/.gitignore
vendored
Normal file
2
scripts/verify-baseline-static/.gitignore
vendored
Normal file
@@ -0,0 +1,2 @@
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/target
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/.artifacts
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274
scripts/verify-baseline-static/CLAUDE.md
Normal file
274
scripts/verify-baseline-static/CLAUDE.md
Normal file
@@ -0,0 +1,274 @@
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# verify-baseline-static — triage guide
|
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Static ISA scanner. Disassembles every instruction in `.text` of a baseline
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Bun binary and flags anything the baseline CPU can't decode. Catches `-march`
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leaks at compile time, before they SIGILL on a user's machine.
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|
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This file is for triaging CI failures. For architecture details see
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`README.md` and inline comments in `src/main.rs` / `src/aarch64.rs`.
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## This is a best-effort check, not a proof
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A PASS here does **not** guarantee the binary is baseline-safe, and a FAIL
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does not guarantee a real bug. Treat it as a sensitive smoke detector, not an
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oracle. The emulator phase (`scripts/verify-baseline.ts`) is the complementary
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check — together they catch most things; neither alone is bulletproof.
|
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|
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**Out of scope entirely (tool will never find these):**
|
||||
|
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- **JIT-emitted code.** JSC compiles JS/WASM to machine code at runtime; none
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of it exists in `.text` at scan time. If the JIT backend emits post-
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||||
baseline instructions on a baseline CPU, this tool is blind to it. The
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emulator's `--jit-stress` path covers this.
|
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- **Dynamically loaded code.** N-API addons, FFI callees, dlopen'd shared
|
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libs. Scanner only reads the `bun-profile` binary.
|
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- **Gate correctness.** The tool does not verify that a CPUID gate actually
|
||||
checks the right bits. It trusts the allowlist. Feature ceilings catch the
|
||||
"code grew new features, gate wasn't updated" case, but a gate that was
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||||
wrong from the start (checks AVX, uses AVX2) passes silently if the
|
||||
ceiling says `[AVX, AVX2]`.
|
||||
|
||||
**In scope but may miss:**
|
||||
|
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- x64 linear-sweep may desync on data-in-`.text` and skip real instructions
|
||||
that follow. Variable-length x86 encoding makes perfect code/data
|
||||
separation undecidable (`README.md:53-59`). aarch64 is more reliable
|
||||
(fixed-width words, `$d` mapping symbols mark data), but a missing mapping
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symbol can still hide a hit.
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- Instructions deliberately ignored (TZCNT/XGETBV on x64, hint-space PAC/BTI
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on aarch64) could theoretically be misused; we assume the compiler's idiom
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is the only one.
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**Can report false violations:**
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- Data bytes in `.text` that happen to form a valid post-baseline encoding.
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Rare on ELF (LLVM puts tables in `.rodata`), common on Windows PE (MSVC
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inlines jump tables). See `README.md:61-74`.
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When in doubt, the emulator is ground truth: `qemu -cpu Nehalem` and hit the
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code path. SIGILL = real bug. No SIGILL = either gated or a data-in-text
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false positive.
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|
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## Which builds run this
|
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`.buildkite/ci.mjs:592` — `needsBaselineVerification()`:
|
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| Target | Allowlist file |
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| ----------------------------------------------- | --------------------------- |
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| `linux-x64-baseline`, `linux-x64-musl-baseline` | `allowlist-x64.txt` |
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| `windows-x64-baseline` | `allowlist-x64-windows.txt` |
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| `linux-aarch64`, `linux-aarch64-musl` | `allowlist-aarch64.txt` |
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x64 baseline = Nehalem (`-march=nehalem`, `cmake/CompilerFlags.cmake:33`).
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aarch64 baseline = `armv8-a+crc` (`cmake/CompilerFlags.cmake:27-29`). aarch64
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has no separate "baseline" build — the regular build _is_ the baseline.
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## Reproduce a CI failure locally
|
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The scanner runs on the _CI-built_ `-profile` artifact. You can't reproduce by
|
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building locally unless you build with the exact baseline toolchain. Download
|
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the artifact instead.
|
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|
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1. Get `<triplet>-profile.zip` from the failing build's `build-bun` step
|
||||
(Artifacts tab in Buildkite). Triplets look like `bun-linux-x64-baseline`,
|
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`bun-linux-aarch64-musl`, `bun-windows-x64-baseline`.
|
||||
|
||||
2. Build and run the scanner (host arch is irrelevant — the scanner reads the
|
||||
binary's headers, it doesn't execute it):
|
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|
||||
```sh
|
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cargo build --release --manifest-path scripts/verify-baseline-static/Cargo.toml
|
||||
|
||||
# Linux x64 baseline
|
||||
./scripts/verify-baseline-static/target/release/verify-baseline-static \
|
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--binary bun-linux-x64-baseline-profile/bun-profile \
|
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--allowlist scripts/verify-baseline-static/allowlist-x64.txt
|
||||
|
||||
# Linux aarch64
|
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./scripts/verify-baseline-static/target/release/verify-baseline-static \
|
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--binary bun-linux-aarch64-profile/bun-profile \
|
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--allowlist scripts/verify-baseline-static/allowlist-aarch64.txt
|
||||
|
||||
# Windows x64 baseline (PDB auto-discovered at <binary>.pdb)
|
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./scripts/verify-baseline-static/target/release/verify-baseline-static \
|
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--binary bun-windows-x64-baseline-profile/bun-profile.exe \
|
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--allowlist scripts/verify-baseline-static/allowlist-x64-windows.txt
|
||||
```
|
||||
|
||||
**Never scan the stripped release binary.** It has no `.symtab` (ELF) / no
|
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`.pdb` (PE), so every hit becomes `<no-symbol@addr>` and nothing matches the
|
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allowlist.
|
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|
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## Reading the output
|
||||
|
||||
```
|
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VIOLATIONS (would SIGILL on Nehalem):
|
||||
|
||||
_ZN7simdutf7haswell14implementation17some_new_functionEPKcm [AVX, AVX2] (42 insns)
|
||||
0x0000a1b2c3 Vpbroadcastb (AVX2)
|
||||
0x0000a1b2d7 Vpshufb (AVX)
|
||||
0x0000a1b2ee Vpcmpeqb (AVX)
|
||||
... 39 more
|
||||
|
||||
ALLOWLISTED (suppressed, runtime-dispatched):
|
||||
...
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-- 550 symbols, 18234 instructions total
|
||||
|
||||
STALE ALLOWLIST ENTRIES (no matching symbol found — remove these?):
|
||||
_ZN7simdutf7haswell14implementation13old_gone_funcEPKcm
|
||||
|
||||
SUMMARY:
|
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violations: 1 symbols, 42 instructions
|
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allowlisted: 550 symbols
|
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stale allowlist entries: 1
|
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FAIL
|
||||
```
|
||||
|
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- Violation line format: `symbol [FEAT, ...] (N insns)`. Copy the symbol
|
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name exactly when allowlisting — it's compared post-canonicalization.
|
||||
- Feature names are iced-x86's `CpuidFeature` Debug names (x64) or the strings
|
||||
in `src/aarch64.rs:44-54` (aarch64). They must match the allowlist brackets
|
||||
character-for-character.
|
||||
- `STALE` entries are informational, not an error. One allowlist covers both
|
||||
glibc and musl; a symbol LTO'd away on one libc shows STALE on the other.
|
||||
|
||||
## Triage: is this an allowlist entry or a real bug?
|
||||
|
||||
The tool found post-baseline instructions in some symbol. Two possibilities:
|
||||
|
||||
**A. Runtime-dispatched.** The symbol only runs after a CPUID/HWCAP gate
|
||||
decides the CPU supports it. This is fine — allowlist it.
|
||||
|
||||
**B. Not gated.** A `-march` flag leaked into a translation unit that's always
|
||||
executed. Real bug, will SIGILL on baseline hardware. Fix the compile flags.
|
||||
|
||||
### Deciding which
|
||||
|
||||
**Identify the dependency.** Demangle the symbol (`c++filt`, or recognize the
|
||||
prefix: `_ZN7simdutf` = simdutf, `_ZN3bun` + `N_AVX2`/`N_SVE` = Bun's Highway
|
||||
code, `_RNv` + `memchr` = Rust memchr, etc). Search the allowlist for that
|
||||
dependency — if neighbors are there under an existing `# Gate: ...` header,
|
||||
this is almost certainly (A).
|
||||
|
||||
**Find the gate.** Grep for the symbol name (unmangled) in the dependency's
|
||||
source. Trace up to the caller — there should be a CPUID check, a dispatcher
|
||||
table, an HWCAP test. Known patterns:
|
||||
|
||||
| Dependency | Gate | Where |
|
||||
| ------------------------------------- | ----------------------------------------------------------- | ------------------------------------------ |
|
||||
| simdutf | `set_best()` — CPUID first call, cached atomic ptr | `vendor/` or WebKit's bundled copy |
|
||||
| Highway (Bun) | `HWY_DYNAMIC_DISPATCH` → `hwy::SupportedTargets()` | `src/bun.js/bindings/highway_strings.cpp` |
|
||||
| BoringSSL | `OPENSSL_ia32cap_P` global, set at init | `vendor/boringssl/crypto/cpu_intel.c` |
|
||||
| zstd | `ZSTD_cpuid()` | `vendor/zstd/lib/common/cpu.h` |
|
||||
| libdeflate | `libdeflate_init_x86_cpu_features()` / `HWCAP_ASIMDDP` | `vendor/libdeflate/lib/x86/cpu_features.c` |
|
||||
| Rust `memchr` | `is_x86_feature_detected!()` | (via lolhtml dep) |
|
||||
| compiler-rt outline-atomics (aarch64) | `__aarch64_have_lse_atomics` (= `AT_HWCAP & HWCAP_ATOMICS`) | compiler-rt builtin |
|
||||
|
||||
**If no gate exists:** (B). Usually a subbuild that ignored
|
||||
`ENABLE_BASELINE` and picked up host `-march=native`. Fix the
|
||||
`cmake/targets/Build*.cmake` for that dep. Confirm with the emulator (the
|
||||
ground-truth check):
|
||||
|
||||
```sh
|
||||
qemu-x86_64 -cpu Nehalem ./bun-profile <code path that hits it> # x64 → SIGILL = bug
|
||||
qemu-aarch64 -cpu cortex-a53 ./bun-profile <code path> # aarch64
|
||||
```
|
||||
|
||||
### Data-in-`.text` false positives (x64, mostly Windows)
|
||||
|
||||
Linear-sweep decode means data bytes in `.text` can happen to form a valid
|
||||
instruction encoding. LLVM puts tables in `.rodata` so ELF builds are usually
|
||||
clean; MSVC inlines jump tables and `static const` arrays into `.text`.
|
||||
|
||||
Signs of a false positive:
|
||||
|
||||
- Symbol is a lookup table or a function you _know_ contains no SIMD.
|
||||
- Reported instruction count is tiny (1–3) inside an otherwise-non-SIMD symbol.
|
||||
- `objdump -d` around the reported address shows `ret` then byte soup — no
|
||||
stack frame setup, no control flow leading to it.
|
||||
|
||||
If confirmed: allowlist the symbol. Note the reason in the group comment.
|
||||
|
||||
## Adding an allowlist entry
|
||||
|
||||
Append the symbol to the appropriate file. Group with its neighbors under the
|
||||
existing `# Gate: ...` header; if no existing group matches, add one:
|
||||
|
||||
```
|
||||
# ----------------------------------------------------------------------------
|
||||
# <dependency> <variant>. Gate: <what checks CPUID/HWCAP>.
|
||||
# (N symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
symbol_name_exactly_as_the_tool_printed_it [FEAT1, FEAT2]
|
||||
```
|
||||
|
||||
**Always use a feature ceiling** (`[...]`). A blanket pass (no brackets)
|
||||
defeats the "did the gate get updated when the dep grew AVX-512?" check
|
||||
(`src/main.rs:616-621`). List exactly the features the tool reported; that's
|
||||
what the gate currently checks.
|
||||
|
||||
**x64 feature names** (iced-x86 Debug strings — must match exactly):
|
||||
`AVX`, `AVX2`, `FMA`, `FMA4`, `BMI1`, `BMI2`, `MOVBE`, `ADX`, `RDRAND`,
|
||||
`AES`, `PCLMULQDQ`, `VAES`, `VPCLMULQDQ`, `SHA`, `AVX512F`, `AVX512BW`,
|
||||
`AVX512DQ`, `AVX512VL`, `AVX512_VBMI`, `AVX512_VBMI2`, `AVX512_VNNI`,
|
||||
`AVX512_VPOPCNTDQ`, `AVX512_FP16`, `AVX_VNNI`, …
|
||||
|
||||
**aarch64 feature names:** `LSE`, `SVE`, `RCPC`, `DotProd`, `JSCVT`, `RDM`,
|
||||
`PAC(non-hint)`.
|
||||
|
||||
### Special symbol forms
|
||||
|
||||
**Rust v0 mangling — `<rust-hash>`.** Rust symbols contain a crate-hash
|
||||
(`Cs[base62]_`) that changes across target triples and toolchains. The tool
|
||||
canonicalizes both sides (`src/main.rs:196-227`), so allowlist entries should
|
||||
use `<rust-hash>` in place of the hash:
|
||||
|
||||
```
|
||||
# Tool reports:
|
||||
_RNvMNtNtNtNtCs5QMN7YRSXc3_6memchr4arch6x86_644avx26memchrNtB2_3One13find_raw_avx2 [AVX, AVX2]
|
||||
# Allowlist as:
|
||||
_RNvMNtNtNtNt<rust-hash>6memchr4arch6x86_644avx26memchrNtB2_3One13find_raw_avx2 [AVX, AVX2]
|
||||
```
|
||||
|
||||
Either form works (the tool canonicalizes both before comparing), but
|
||||
`<rust-hash>` survives toolchain bumps.
|
||||
|
||||
**Windows `<lib:NAME.lib>`.** When PDB has no per-function record for a hit
|
||||
(stripped CRT objects, anonymized staticlib helpers), the tool falls back to
|
||||
section-contribution attribution: the linker-map "which `.lib` did this byte
|
||||
come from" data. These attributions are stable across link layout changes.
|
||||
Allowlist them literally:
|
||||
|
||||
```
|
||||
<lib:lolhtml.lib> [AVX, AVX2]
|
||||
```
|
||||
|
||||
**`<no-symbol@0x...>`** — the address fell in padding between functions or the
|
||||
binary is stripped. If you see these for every violation, you're scanning the
|
||||
wrong binary (use `-profile`). If it's just one or two, it's usually inter-
|
||||
function padding that decoded as something; investigate with `objdump -d`
|
||||
around that address and, if it's genuinely junk, add a brief `# padding at
|
||||
<addr range>` comment with a blanket-pass entry.
|
||||
|
||||
### PDB coverage drift (Windows)
|
||||
|
||||
A function may get an `S_LPROC32` record (real mangled name) on one toolchain
|
||||
and fall through to `<lib:...>` on another. If the same code flips between
|
||||
forms across CI runs, allowlist both.
|
||||
|
||||
## Deliberately ignored (not reported even if found)
|
||||
|
||||
See `src/main.rs:94-135` and `src/aarch64.rs`:
|
||||
|
||||
- **TZCNT** (x64) — decodes as REP BSF on pre-BMI1; LLVM preloads dest with
|
||||
operand-width so the `src==0` case matches. (LZCNT is NOT ignored —
|
||||
`BSR` ≠ `LZCNT` for nonzero inputs and LLVM never emits it for Nehalem.)
|
||||
- **XGETBV** (x64) — needed by every AVX gate; a stray one SIGILLs at
|
||||
startup so the emulator catches it trivially.
|
||||
- **ENDBR64 (CET_IBT), RDSSP/INCSSP (CET_SS hint-space subset)** (x64) —
|
||||
NOP-encoded on pre-CET by design. The rest of CET_SS (WRSSD/RSTORSSP/
|
||||
SETSSBSY etc.) IS flagged — dedicated opcode slots that #UD on pre-CET.
|
||||
- **PACIASP/AUTIASP/BTI** (aarch64) — HINT-space, architecturally NOP on
|
||||
pre-PAC CPUs. (`LDRAA`/`LDRAB` are _not_ HINT-space and _are_ reported.)
|
||||
- **3DNow!, SMM, Cyrix, VIA** (x64) — no toolchain targeting x86-64 emits
|
||||
these. When their `0f xx` encodings show up, it's data.
|
||||
189
scripts/verify-baseline-static/Cargo.lock
generated
Normal file
189
scripts/verify-baseline-static/Cargo.lock
generated
Normal file
@@ -0,0 +1,189 @@
|
||||
# This file is automatically @generated by Cargo.
|
||||
# It is not intended for manual editing.
|
||||
version = 4
|
||||
|
||||
[[package]]
|
||||
name = "bumpalo"
|
||||
version = "3.20.2"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "5d20789868f4b01b2f2caec9f5c4e0213b41e3e5702a50157d699ae31ced2fcb"
|
||||
|
||||
[[package]]
|
||||
name = "cfg-if"
|
||||
version = "1.0.4"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "9330f8b2ff13f34540b44e946ef35111825727b38d33286ef986142615121801"
|
||||
|
||||
[[package]]
|
||||
name = "fallible-iterator"
|
||||
version = "0.2.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "4443176a9f2c162692bd3d352d745ef9413eec5782a80d8fd6f8a1ac692a07f7"
|
||||
|
||||
[[package]]
|
||||
name = "iced-x86"
|
||||
version = "1.21.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "7c447cff8c7f384a7d4f741cfcff32f75f3ad02b406432e8d6c878d56b1edf6b"
|
||||
dependencies = [
|
||||
"lazy_static",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "js-sys"
|
||||
version = "0.3.91"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "b49715b7073f385ba4bc528e5747d02e66cb39c6146efb66b781f131f0fb399c"
|
||||
dependencies = [
|
||||
"once_cell",
|
||||
"wasm-bindgen",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "lazy_static"
|
||||
version = "1.5.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "bbd2bcb4c963f2ddae06a2efc7e9f3591312473c50c6685e1f298068316e66fe"
|
||||
|
||||
[[package]]
|
||||
name = "memchr"
|
||||
version = "2.8.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "f8ca58f447f06ed17d5fc4043ce1b10dd205e060fb3ce5b979b8ed8e59ff3f79"
|
||||
|
||||
[[package]]
|
||||
name = "object"
|
||||
version = "0.36.7"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "62948e14d923ea95ea2c7c86c71013138b66525b86bdc08d2dcc262bdb497b87"
|
||||
dependencies = [
|
||||
"memchr",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "once_cell"
|
||||
version = "1.21.3"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "42f5e15c9953c5e4ccceeb2e7382a716482c34515315f7b03532b8b4e8393d2d"
|
||||
|
||||
[[package]]
|
||||
name = "pdb"
|
||||
version = "0.8.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "82040a392923abe6279c00ab4aff62d5250d1c8555dc780e4b02783a7aa74863"
|
||||
dependencies = [
|
||||
"fallible-iterator",
|
||||
"scroll",
|
||||
"uuid",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "proc-macro2"
|
||||
version = "1.0.106"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "8fd00f0bb2e90d81d1044c2b32617f68fcb9fa3bb7640c23e9c748e53fb30934"
|
||||
dependencies = [
|
||||
"unicode-ident",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "quote"
|
||||
version = "1.0.45"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "41f2619966050689382d2b44f664f4bc593e129785a36d6ee376ddf37259b924"
|
||||
dependencies = [
|
||||
"proc-macro2",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "rustversion"
|
||||
version = "1.0.22"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "b39cdef0fa800fc44525c84ccb54a029961a8215f9619753635a9c0d2538d46d"
|
||||
|
||||
[[package]]
|
||||
name = "scroll"
|
||||
version = "0.11.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "04c565b551bafbef4157586fa379538366e4385d42082f255bfd96e4fe8519da"
|
||||
|
||||
[[package]]
|
||||
name = "syn"
|
||||
version = "2.0.117"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "e665b8803e7b1d2a727f4023456bbbbe74da67099c585258af0ad9c5013b9b99"
|
||||
dependencies = [
|
||||
"proc-macro2",
|
||||
"quote",
|
||||
"unicode-ident",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "unicode-ident"
|
||||
version = "1.0.24"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "e6e4313cd5fcd3dad5cafa179702e2b244f760991f45397d14d4ebf38247da75"
|
||||
|
||||
[[package]]
|
||||
name = "uuid"
|
||||
version = "1.21.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "b672338555252d43fd2240c714dc444b8c6fb0a5c5335e65a07bba7742735ddb"
|
||||
dependencies = [
|
||||
"js-sys",
|
||||
"wasm-bindgen",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "verify-baseline-static"
|
||||
version = "0.1.0"
|
||||
dependencies = [
|
||||
"iced-x86",
|
||||
"object",
|
||||
"pdb",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "wasm-bindgen"
|
||||
version = "0.2.114"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "6532f9a5c1ece3798cb1c2cfdba640b9b3ba884f5db45973a6f442510a87d38e"
|
||||
dependencies = [
|
||||
"cfg-if",
|
||||
"once_cell",
|
||||
"rustversion",
|
||||
"wasm-bindgen-macro",
|
||||
"wasm-bindgen-shared",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "wasm-bindgen-macro"
|
||||
version = "0.2.114"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "18a2d50fcf105fb33bb15f00e7a77b772945a2ee45dcf454961fd843e74c18e6"
|
||||
dependencies = [
|
||||
"quote",
|
||||
"wasm-bindgen-macro-support",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "wasm-bindgen-macro-support"
|
||||
version = "0.2.114"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "03ce4caeaac547cdf713d280eda22a730824dd11e6b8c3ca9e42247b25c631e3"
|
||||
dependencies = [
|
||||
"bumpalo",
|
||||
"proc-macro2",
|
||||
"quote",
|
||||
"syn",
|
||||
"wasm-bindgen-shared",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "wasm-bindgen-shared"
|
||||
version = "0.2.114"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "75a326b8c223ee17883a4251907455a2431acc2791c98c26279376490c378c16"
|
||||
dependencies = [
|
||||
"unicode-ident",
|
||||
]
|
||||
13
scripts/verify-baseline-static/Cargo.toml
Normal file
13
scripts/verify-baseline-static/Cargo.toml
Normal file
@@ -0,0 +1,13 @@
|
||||
[package]
|
||||
name = "verify-baseline-static"
|
||||
version = "0.1.0"
|
||||
edition = "2021"
|
||||
|
||||
[dependencies]
|
||||
iced-x86 = { version = "1.21", default-features = false, features = ["decoder", "std", "instr_info"] }
|
||||
object = { version = "0.36", default-features = false, features = ["read", "std", "elf", "pe"] }
|
||||
pdb = "0.8"
|
||||
|
||||
[profile.release]
|
||||
lto = true
|
||||
strip = true
|
||||
137
scripts/verify-baseline-static/README.md
Normal file
137
scripts/verify-baseline-static/README.md
Normal file
@@ -0,0 +1,137 @@
|
||||
# verify-baseline-static
|
||||
|
||||
Static ISA verifier for Bun baseline builds. Disassembles every instruction in
|
||||
`.text` and flags anything requiring CPU features beyond the baseline target.
|
||||
|
||||
| Target | Baseline | Flags |
|
||||
| ------- | ---------------------------------- | ---------------------------------------------------------------------------- |
|
||||
| x86-64 | Nehalem (`-march=nehalem`) | AVX, AVX2, AVX-512, BMI1/2, FMA, AES-NI, PCLMULQDQ, ADX, SHA-NI, RDRAND, ... |
|
||||
| aarch64 | armv8-a+crc (`-march=armv8-a+crc`) | LSE atomics, SVE, DotProd, RCPC, JSCVT, RDM, non-hint PAC |
|
||||
|
||||
Architecture and format (ELF/PE) are auto-detected from the binary header.
|
||||
|
||||
Complements the emulator-based check in `scripts/verify-baseline.ts`: the
|
||||
emulator only catches instructions the test suite _executes_. This catches
|
||||
everything the compiler _emitted_.
|
||||
|
||||
## Usage
|
||||
|
||||
```sh
|
||||
cargo build --release --manifest-path scripts/verify-baseline-static/Cargo.toml
|
||||
|
||||
./scripts/verify-baseline-static/target/release/verify-baseline-static \
|
||||
--binary path/to/bun-linux-x64-baseline/bun-profile \
|
||||
--allowlist scripts/verify-baseline-static/allowlist-x64.txt
|
||||
```
|
||||
|
||||
`--allowlist` can be repeated; entries merge (feature ceilings union,
|
||||
blanket-pass wins). Useful for layering an extra allowlist on top of the
|
||||
base one without editing it.
|
||||
|
||||
Exit `0` = clean, `1` = violations, `2` = tool error.
|
||||
|
||||
Use the `-profile` artifact. The stripped release binary has no `.symtab`
|
||||
(ELF) and no companion `.pdb` (PE) — every violation becomes `<no-symbol@addr>`
|
||||
and nothing in the allowlist matches. Windows auto-discovers `<binary>.pdb`
|
||||
if present, or pass `--pdb` explicitly.
|
||||
|
||||
## When it fails
|
||||
|
||||
A new symbol showed up with post-baseline instructions. Two possibilities:
|
||||
|
||||
1. **It's runtime-dispatched** (CPUID / HWCAP-gated). Find the gate in the
|
||||
caller, add the symbol to the allowlist with a comment pointing at it.
|
||||
Group with related symbols.
|
||||
|
||||
2. **It's not gated.** That's a real bug — a `-march` flag leaked into a
|
||||
subbuild and the function will SIGILL on baseline hardware. Fix the
|
||||
compile flags for that translation unit.
|
||||
|
||||
If you're not sure which: run the binary under `qemu-x86_64 -cpu Nehalem`
|
||||
(or `qemu-aarch64 -cpu cortex-a53`) and hit that code path. SIGILL = bug.
|
||||
|
||||
### Data-in-`.text` false positives
|
||||
|
||||
The tool linear-sweeps every byte in `.text`. There's no general way to do
|
||||
better for x86: toolchains don't emit "this byte is data" markers the way
|
||||
ARM EABI's `$d` mapping symbols do, and code/data separation in x86 binaries
|
||||
is undecidable in general
|
||||
([Schwarz & Debray 2002](https://www2.cs.arizona.edu/~debray/Publications/disasm.pdf)).
|
||||
|
||||
MSVC inlines jump tables and small `static const` arrays into `.text` right
|
||||
after the function that uses them (LLVM puts them in `.rodata`, so ELF builds
|
||||
are typically clean). When those bytes form a valid instruction encoding,
|
||||
the decoder reports it.
|
||||
|
||||
**Filtered automatically:** 3DNow!, SMM, Cyrix, VIA Padlock — ISA extensions
|
||||
no toolchain targeting x86-64 emits in any configuration. Their two-byte
|
||||
`0f xx` encodings tend to surface when a lookup table uses `0x0f` as a
|
||||
sentinel value.
|
||||
|
||||
**Not filtered (very rare):** a table whose bytes form a valid
|
||||
VEX/EVEX-prefixed encoding. Looks like a real AVX hit. Triage the same way:
|
||||
disassemble around the address; if preceded by `ret` + small-int byte soup
|
||||
instead of stack-frame setup, it's a table. Allowlist the symbol.
|
||||
|
||||
## What's deliberately ignored
|
||||
|
||||
**x64:**
|
||||
|
||||
- **ENDBR64 / CET_IBT** — NOP-compatible on pre-CET CPUs by design.
|
||||
- **TZCNT** — LLVM preloads the destination with operand-width so the
|
||||
REP-BSF fallback on pre-BMI1 CPUs gives identical results. (LZCNT is
|
||||
**not** ignored: `BSR` and `LZCNT` produce different results, and LLVM
|
||||
never emits LZCNT for `-march=nehalem`.)
|
||||
- **XGETBV** — every AVX-dispatch path calls this, always after
|
||||
`if (CPUID.OSXSAVE)`. A stray one would SIGILL at startup; the emulator
|
||||
test catches that trivially.
|
||||
|
||||
**aarch64:**
|
||||
|
||||
- **PACIASP / AUTIASP / BTI** — HINT-space; architecturally NOP on older CPUs.
|
||||
- **`$d`-marked data** — literal pools and inline strings in `.text` are
|
||||
skipped via ARM EABI mapping symbols.
|
||||
|
||||
## Symbol attribution
|
||||
|
||||
| Binary | Primary source | Fallback |
|
||||
| ------ | --------------------------------------------------------------- | -------------------------------------------- |
|
||||
| ELF | `.symtab` | `.dynsym` |
|
||||
| PE | PDB DBI module stream (`S_*PROC32`, has real sizes) → `S_PUB32` | PDB section contributions → `<lib:NAME.lib>` |
|
||||
|
||||
The Windows fallback handles code with no per-function PDB record (stripped
|
||||
CRT objects, anonymized staticlib helpers). Section contributions are the
|
||||
linker-map data in structured form — they say which `.obj`/`.lib` every byte
|
||||
came from. Attribution is by library basename, which doesn't move when
|
||||
unrelated code shifts the link layout.
|
||||
|
||||
PDB coverage for the same code can vary across linker versions — a function
|
||||
that gets an `S_LPROC32` record on one toolchain may fall through to `<lib:>`
|
||||
on another. If a symbol flips between a mangled name and `<lib:NAME.lib>`
|
||||
across CI runs, allowlist both forms.
|
||||
|
||||
Rust v0 mangled names carry a crate-hash (`Cs[base62]_`) that changes across
|
||||
target triples and toolchain versions. The allowlist uses `<rust-hash>` as a
|
||||
placeholder; the tool canonicalizes both sides before comparing.
|
||||
|
||||
## Allowlist format
|
||||
|
||||
```
|
||||
# comment
|
||||
symbol_name # blanket pass — any feature allowed
|
||||
symbol_name [AVX, AVX2] # feature ceiling — only these allowed
|
||||
```
|
||||
|
||||
A feature outside the brackets is a violation even for an allowlisted symbol.
|
||||
Widening the bracket is the explicit checkpoint for "did the gate get updated
|
||||
when the dependency did?"
|
||||
|
||||
| File | Covers |
|
||||
| --------------------------- | ------------------------------------------------------------- |
|
||||
| `allowlist-x64.txt` | `linux-x64-baseline`, `linux-x64-musl-baseline` |
|
||||
| `allowlist-x64-windows.txt` | `windows-x64-baseline` (separate: MSVC mangling, CRT symbols) |
|
||||
| `allowlist-aarch64.txt` | `linux-aarch64`, `linux-aarch64-musl` |
|
||||
|
||||
One allowlist covers both glibc and musl because the dispatch surface is
|
||||
architecture-specific, not libc-specific. Symbols that LTO inlined away on
|
||||
one libc show as STALE on the other — informational, not an error.
|
||||
130
scripts/verify-baseline-static/allowlist-aarch64.txt
Normal file
130
scripts/verify-baseline-static/allowlist-aarch64.txt
Normal file
@@ -0,0 +1,130 @@
|
||||
# verify-baseline-static allowlist for aarch64 armv8-a+crc baseline.
|
||||
#
|
||||
# Shared by linux-aarch64 and linux-aarch64-musl.
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# Bun's Highway SVE/SVE2 targets. Gate: hwy::SupportedTargets via getauxval(AT_HWCAP).
|
||||
# (48 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
_ZN3bun10N_SVE2_12810MemMemImplEPKhmS2_m [SVE]
|
||||
_ZN3bun10N_SVE2_12815CopyU16ToU8ImplEPKtmPh [SVE]
|
||||
_ZN3bun10N_SVE2_12815IndexOfCharImplEPKhmh [SVE]
|
||||
_ZN3bun10N_SVE2_12818IndexOfAnyCharImplEPKhmS2_m [SVE]
|
||||
_ZN3bun10N_SVE2_12820FillWithSkipMaskImplEPKhmPhS2_mb [SVE]
|
||||
_ZN3bun10N_SVE2_12828IndexOfNewlineOrNonASCIIImplEPKhm [SVE]
|
||||
_ZN3bun10N_SVE2_12835IndexOfSpaceOrNewlineOrNonASCIIImplEPKhm [SVE]
|
||||
_ZN3bun10N_SVE2_12836ContainsNewlineOrNonASCIIOrQuoteImplEPKhm [SVE]
|
||||
_ZN3bun10N_SVE2_12838IndexOfNewlineOrNonASCIIOrHashOrAtImplEPKhm [SVE]
|
||||
_ZN3bun10N_SVE2_12846IndexOfInterestingCharacterInStringLiteralImplEPKhmh [SVE]
|
||||
_ZN3bun10N_SVE2_12846IndexOfNeedsEscapeForJavaScriptStringImplQuoteEPKhmh [SVE]
|
||||
_ZN3bun10N_SVE2_12849IndexOfNeedsEscapeForJavaScriptStringImplBacktickEPKhmh [SVE]
|
||||
_ZN3bun5N_SVE10MemMemImplEPKhmS2_m [SVE]
|
||||
_ZN3bun5N_SVE15CopyU16ToU8ImplEPKtmPh [SVE]
|
||||
_ZN3bun5N_SVE15IndexOfCharImplEPKhmh [SVE]
|
||||
_ZN3bun5N_SVE18IndexOfAnyCharImplEPKhmS2_m [SVE]
|
||||
_ZN3bun5N_SVE20FillWithSkipMaskImplEPKhmPhS2_mb [SVE]
|
||||
_ZN3bun5N_SVE28IndexOfNewlineOrNonASCIIImplEPKhm [SVE]
|
||||
_ZN3bun5N_SVE35IndexOfSpaceOrNewlineOrNonASCIIImplEPKhm [SVE]
|
||||
_ZN3bun5N_SVE36ContainsNewlineOrNonASCIIOrQuoteImplEPKhm [SVE]
|
||||
_ZN3bun5N_SVE38IndexOfNewlineOrNonASCIIOrHashOrAtImplEPKhm [SVE]
|
||||
_ZN3bun5N_SVE46IndexOfInterestingCharacterInStringLiteralImplEPKhmh [SVE]
|
||||
_ZN3bun5N_SVE46IndexOfNeedsEscapeForJavaScriptStringImplQuoteEPKhmh [SVE]
|
||||
_ZN3bun5N_SVE49IndexOfNeedsEscapeForJavaScriptStringImplBacktickEPKhmh [SVE]
|
||||
_ZN3bun6N_SVE210MemMemImplEPKhmS2_m [SVE]
|
||||
_ZN3bun6N_SVE215CopyU16ToU8ImplEPKtmPh [SVE]
|
||||
_ZN3bun6N_SVE215IndexOfCharImplEPKhmh [SVE]
|
||||
_ZN3bun6N_SVE218IndexOfAnyCharImplEPKhmS2_m [SVE]
|
||||
_ZN3bun6N_SVE220FillWithSkipMaskImplEPKhmPhS2_mb [SVE]
|
||||
_ZN3bun6N_SVE228IndexOfNewlineOrNonASCIIImplEPKhm [SVE]
|
||||
_ZN3bun6N_SVE235IndexOfSpaceOrNewlineOrNonASCIIImplEPKhm [SVE]
|
||||
_ZN3bun6N_SVE236ContainsNewlineOrNonASCIIOrQuoteImplEPKhm [SVE]
|
||||
_ZN3bun6N_SVE238IndexOfNewlineOrNonASCIIOrHashOrAtImplEPKhm [SVE]
|
||||
_ZN3bun6N_SVE246IndexOfInterestingCharacterInStringLiteralImplEPKhmh [SVE]
|
||||
_ZN3bun6N_SVE246IndexOfNeedsEscapeForJavaScriptStringImplQuoteEPKhmh [SVE]
|
||||
_ZN3bun6N_SVE249IndexOfNeedsEscapeForJavaScriptStringImplBacktickEPKhmh [SVE]
|
||||
_ZN3bun9N_SVE_25610MemMemImplEPKhmS2_m [SVE]
|
||||
_ZN3bun9N_SVE_25615CopyU16ToU8ImplEPKtmPh [SVE]
|
||||
_ZN3bun9N_SVE_25615IndexOfCharImplEPKhmh [SVE]
|
||||
_ZN3bun9N_SVE_25618IndexOfAnyCharImplEPKhmS2_m [SVE]
|
||||
_ZN3bun9N_SVE_25620FillWithSkipMaskImplEPKhmPhS2_mb [SVE]
|
||||
_ZN3bun9N_SVE_25628IndexOfNewlineOrNonASCIIImplEPKhm [SVE]
|
||||
_ZN3bun9N_SVE_25635IndexOfSpaceOrNewlineOrNonASCIIImplEPKhm [SVE]
|
||||
_ZN3bun9N_SVE_25636ContainsNewlineOrNonASCIIOrQuoteImplEPKhm [SVE]
|
||||
_ZN3bun9N_SVE_25638IndexOfNewlineOrNonASCIIOrHashOrAtImplEPKhm [SVE]
|
||||
_ZN3bun9N_SVE_25646IndexOfInterestingCharacterInStringLiteralImplEPKhmh [SVE]
|
||||
_ZN3bun9N_SVE_25646IndexOfNeedsEscapeForJavaScriptStringImplQuoteEPKhmh [SVE]
|
||||
_ZN3bun9N_SVE_25649IndexOfNeedsEscapeForJavaScriptStringImplBacktickEPKhmh [SVE]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# Highway SVE detector.
|
||||
# (1 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
_ZN3hwy3armL26DetectAdditionalSveTargetsEl [SVE]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# compiler-rt outline atomics. Each helper has both LSE and LDXR/STXR paths;
|
||||
# __aarch64_have_lse_atomics (= AT_HWCAP & HWCAP_ATOMICS) picks at runtime.
|
||||
# (41 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
__aarch64_cas1_acq [LSE]
|
||||
__aarch64_cas1_acq_rel [LSE]
|
||||
__aarch64_cas1_rel [LSE]
|
||||
__aarch64_cas1_relax [LSE]
|
||||
__aarch64_cas2_acq_rel [LSE]
|
||||
__aarch64_cas4_acq [LSE]
|
||||
__aarch64_cas4_acq_rel [LSE]
|
||||
__aarch64_cas4_rel [LSE]
|
||||
__aarch64_cas4_relax [LSE]
|
||||
__aarch64_cas8_acq [LSE]
|
||||
__aarch64_cas8_acq_rel [LSE]
|
||||
__aarch64_cas8_rel [LSE]
|
||||
__aarch64_cas8_relax [LSE]
|
||||
__aarch64_ldadd1_acq_rel [LSE]
|
||||
__aarch64_ldadd2_acq_rel [LSE]
|
||||
__aarch64_ldadd4_acq_rel [LSE]
|
||||
__aarch64_ldadd4_rel [LSE]
|
||||
__aarch64_ldadd4_relax [LSE]
|
||||
__aarch64_ldadd8_acq_rel [LSE]
|
||||
__aarch64_ldadd8_rel [LSE]
|
||||
__aarch64_ldadd8_relax [LSE]
|
||||
__aarch64_ldclr1_acq_rel [LSE]
|
||||
__aarch64_ldclr2_acq_rel [LSE]
|
||||
__aarch64_ldclr4_acq_rel [LSE]
|
||||
__aarch64_ldclr8_acq_rel [LSE]
|
||||
__aarch64_ldeor1_acq_rel [LSE]
|
||||
__aarch64_ldeor2_acq_rel [LSE]
|
||||
__aarch64_ldeor4_acq_rel [LSE]
|
||||
__aarch64_ldeor8_acq_rel [LSE]
|
||||
__aarch64_ldset1_acq_rel [LSE]
|
||||
__aarch64_ldset2_acq_rel [LSE]
|
||||
__aarch64_ldset4_acq_rel [LSE]
|
||||
__aarch64_ldset8_acq_rel [LSE]
|
||||
__aarch64_swp1_acq [LSE]
|
||||
__aarch64_swp1_acq_rel [LSE]
|
||||
__aarch64_swp1_relax [LSE]
|
||||
__aarch64_swp2_acq_rel [LSE]
|
||||
__aarch64_swp4_acq [LSE]
|
||||
__aarch64_swp4_acq_rel [LSE]
|
||||
__aarch64_swp4_rel [LSE]
|
||||
__aarch64_swp8_acq_rel [LSE]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# libgcc DWARF unwinder SVE VG register (CNTD). Only reached when unwinding
|
||||
# through an SVE frame — transitively gated by Highway's dispatch.
|
||||
# (4 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
_Unwind_GetGR [SVE]
|
||||
execute_stack_op [SVE]
|
||||
uw_update_context [SVE]
|
||||
uw_update_context_1 [SVE]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# libdeflate Adler-32 NEON DotProd. Gate: HWCAP_ASIMDDP.
|
||||
# (1 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
adler32_arm_neon_dotprod [DotProd]
|
||||
656
scripts/verify-baseline-static/allowlist-x64-windows.txt
Normal file
656
scripts/verify-baseline-static/allowlist-x64-windows.txt
Normal file
@@ -0,0 +1,656 @@
|
||||
# verify-baseline-static allowlist for windows-x64-baseline.
|
||||
#
|
||||
# Symbol names differ from Linux: MSVC C++ mangling, demangled Rust in DBI
|
||||
# records, _validate suffix on JSC offlineasm, <lib:NAME> for code with no
|
||||
# per-function PDB symbol (attributed via section contributions).
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# simdutf. MSVC-mangled names.
|
||||
# (172 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
simdutf::haswell::`anonymous namespace'::base64::compress_decode_base64<0,0,0,char16_t> [AVX, AVX2, BMI1]
|
||||
simdutf::haswell::`anonymous namespace'::base64::compress_decode_base64<0,0,0,char> [AVX, AVX2, BMI1]
|
||||
simdutf::haswell::`anonymous namespace'::base64::compress_decode_base64<0,0,1,char16_t> [AVX, AVX2, BMI1]
|
||||
simdutf::haswell::`anonymous namespace'::base64::compress_decode_base64<0,0,1,char> [AVX, AVX2, BMI1]
|
||||
simdutf::haswell::`anonymous namespace'::base64::compress_decode_base64<0,1,0,char16_t> [AVX, AVX2, BMI1]
|
||||
simdutf::haswell::`anonymous namespace'::base64::compress_decode_base64<0,1,0,char> [AVX, AVX2, BMI1]
|
||||
simdutf::haswell::`anonymous namespace'::base64::compress_decode_base64<0,1,1,char16_t> [AVX, AVX2, BMI1]
|
||||
simdutf::haswell::`anonymous namespace'::base64::compress_decode_base64<0,1,1,char> [AVX, AVX2, BMI1]
|
||||
simdutf::haswell::`anonymous namespace'::base64::compress_decode_base64<1,0,0,char16_t> [AVX, AVX2, BMI1]
|
||||
simdutf::haswell::`anonymous namespace'::base64::compress_decode_base64<1,0,0,char> [AVX, AVX2, BMI1]
|
||||
simdutf::haswell::`anonymous namespace'::base64::compress_decode_base64<1,1,0,char16_t> [AVX, AVX2, BMI1]
|
||||
simdutf::haswell::`anonymous namespace'::base64::compress_decode_base64<1,1,0,char> [AVX, AVX2, BMI1]
|
||||
simdutf::haswell::implementation::binary_to_base64 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::binary_to_base64_with_lines [AVX, AVX2]
|
||||
simdutf::haswell::implementation::change_endianness_utf16 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_latin1_to_utf16be [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_latin1_to_utf16le [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_latin1_to_utf32 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_latin1_to_utf8 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf16be_to_latin1 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf16be_to_latin1_with_errors [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf16be_to_utf32 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf16be_to_utf32_with_errors [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf16be_to_utf8 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf16be_to_utf8_with_errors [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf16le_to_latin1 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf16le_to_latin1_with_errors [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf16le_to_utf32 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf16le_to_utf32_with_errors [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf16le_to_utf8 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf16le_to_utf8_with_errors [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf32_to_latin1 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf32_to_latin1_with_errors [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf32_to_utf16be [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf32_to_utf16be_with_errors [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf32_to_utf16le [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf32_to_utf16le_with_errors [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf32_to_utf8 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf32_to_utf8_with_errors [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf8_to_latin1 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf8_to_latin1_with_errors [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf8_to_utf16be [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf8_to_utf16be_with_errors [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf8_to_utf16le [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf8_to_utf16le_with_errors [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf8_to_utf32 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_utf8_to_utf32_with_errors [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_valid_utf16be_to_latin1 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_valid_utf16be_to_utf32 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_valid_utf16le_to_latin1 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_valid_utf16le_to_utf32 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_valid_utf32_to_latin1 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_valid_utf8_to_latin1 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_valid_utf8_to_utf16be [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_valid_utf8_to_utf16le [AVX, AVX2]
|
||||
simdutf::haswell::implementation::convert_valid_utf8_to_utf32 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::count_utf16be [AVX, AVX2]
|
||||
simdutf::haswell::implementation::count_utf16le [AVX, AVX2]
|
||||
simdutf::haswell::implementation::count_utf8 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::detect_encodings [AVX, AVX2]
|
||||
simdutf::haswell::implementation::find [AVX, AVX2]
|
||||
simdutf::haswell::implementation::latin1_length_from_utf8 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::to_well_formed_utf16be [AVX, AVX2, BMI1]
|
||||
simdutf::haswell::implementation::to_well_formed_utf16le [AVX, AVX2, BMI1]
|
||||
simdutf::haswell::implementation::utf16_length_from_utf32 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::utf16_length_from_utf8 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::utf32_length_from_utf16be [AVX, AVX2]
|
||||
simdutf::haswell::implementation::utf32_length_from_utf16le [AVX, AVX2]
|
||||
simdutf::haswell::implementation::utf32_length_from_utf8 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::utf8_length_from_latin1 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::utf8_length_from_utf16be [AVX, AVX2]
|
||||
simdutf::haswell::implementation::utf8_length_from_utf16le [AVX, AVX2]
|
||||
simdutf::haswell::implementation::utf8_length_from_utf32 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::validate_ascii [AVX, AVX2]
|
||||
simdutf::haswell::implementation::validate_ascii_with_errors [AVX, AVX2]
|
||||
simdutf::haswell::implementation::validate_utf16be [AVX, AVX2, BMI1]
|
||||
simdutf::haswell::implementation::validate_utf16be_as_ascii [AVX, AVX2]
|
||||
simdutf::haswell::implementation::validate_utf16be_with_errors [AVX, AVX2, BMI1]
|
||||
simdutf::haswell::implementation::validate_utf16le [AVX, AVX2, BMI1]
|
||||
simdutf::haswell::implementation::validate_utf16le_as_ascii [AVX, AVX2]
|
||||
simdutf::haswell::implementation::validate_utf16le_with_errors [AVX, AVX2, BMI1]
|
||||
simdutf::haswell::implementation::validate_utf32 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::validate_utf32_with_errors [AVX, AVX2]
|
||||
simdutf::haswell::implementation::validate_utf8 [AVX, AVX2]
|
||||
simdutf::haswell::implementation::validate_utf8_with_errors [AVX, AVX2]
|
||||
simdutf::icelake::`anonymous namespace'::compress_decode_base64<0,0,0,char16_t> [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::`anonymous namespace'::compress_decode_base64<0,0,0,char> [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::`anonymous namespace'::compress_decode_base64<0,0,1,char16_t> [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::`anonymous namespace'::compress_decode_base64<0,0,1,char> [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::`anonymous namespace'::compress_decode_base64<0,1,0,char16_t> [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::`anonymous namespace'::compress_decode_base64<0,1,0,char> [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::`anonymous namespace'::compress_decode_base64<0,1,1,char16_t> [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::`anonymous namespace'::compress_decode_base64<0,1,1,char> [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::`anonymous namespace'::compress_decode_base64<1,0,0,char16_t> [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::`anonymous namespace'::compress_decode_base64<1,0,0,char> [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::`anonymous namespace'::compress_decode_base64<1,1,0,char16_t> [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::`anonymous namespace'::compress_decode_base64<1,1,0,char> [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::implementation::binary_to_base64 [AVX, AVX512BW, AVX512F, AVX512_VBMI, BMI2]
|
||||
simdutf::icelake::implementation::binary_to_base64_with_lines [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::implementation::change_endianness_utf16 [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::convert_latin1_to_utf16be [AVX, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI, BMI2]
|
||||
simdutf::icelake::implementation::convert_latin1_to_utf16le [AVX, AVX512BW, AVX512F, AVX512VL, BMI2]
|
||||
simdutf::icelake::implementation::convert_latin1_to_utf32 [AVX, AVX512BW, AVX512F, AVX512VL, BMI2]
|
||||
simdutf::icelake::implementation::convert_latin1_to_utf8 [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf16be_to_latin1 [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf16be_to_latin1_with_errors [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf16be_to_utf32 [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf16be_to_utf32_with_errors [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf16be_to_utf8 [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI1, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf16be_to_utf8_with_errors [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI1, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf16le_to_latin1 [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf16le_to_latin1_with_errors [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf16le_to_utf32 [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf16le_to_utf32_with_errors [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf16le_to_utf8 [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI1, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf16le_to_utf8_with_errors [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI1, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf32_to_latin1 [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf32_to_latin1_with_errors [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf32_to_utf16be [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf32_to_utf16be_with_errors [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI2, BMI1, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf32_to_utf16le [AVX, AVX512BW, AVX512F, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf32_to_utf16le_with_errors [AVX, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI2, BMI1, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf32_to_utf8 [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL]
|
||||
simdutf::icelake::implementation::convert_utf32_to_utf8_with_errors [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL]
|
||||
simdutf::icelake::implementation::convert_utf8_to_latin1 [AVX, AVX512BW, AVX512F, AVX512_VBMI2, BMI1, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf8_to_latin1_with_errors [AVX, AVX512BW, AVX512F, AVX512_VBMI2, BMI1, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf8_to_utf16be [AVX, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI, AVX512_VBMI2, BMI1, BMI2, LZCNT]
|
||||
simdutf::icelake::implementation::convert_utf8_to_utf16be_with_errors [AVX, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI, AVX512_VBMI2, BMI1, BMI2, LZCNT]
|
||||
simdutf::icelake::implementation::convert_utf8_to_utf16le [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI1, BMI2, LZCNT]
|
||||
simdutf::icelake::implementation::convert_utf8_to_utf16le_with_errors [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI1, BMI2, LZCNT]
|
||||
simdutf::icelake::implementation::convert_utf8_to_utf32 [AVX, AVX2, AVX512BW, AVX512F, AVX512_VBMI, BMI2]
|
||||
simdutf::icelake::implementation::convert_utf8_to_utf32_with_errors [AVX, AVX2, AVX512BW, AVX512F, AVX512_VBMI, BMI2]
|
||||
simdutf::icelake::implementation::convert_valid_utf16be_to_latin1 [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::convert_valid_utf16be_to_utf32 [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::convert_valid_utf16le_to_latin1 [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::convert_valid_utf16le_to_utf32 [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::convert_valid_utf32_to_latin1 [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::convert_valid_utf32_to_utf16be [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::implementation::convert_valid_utf32_to_utf16le [AVX, AVX512BW, AVX512F, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::implementation::convert_valid_utf8_to_latin1 [AVX, AVX512BW, AVX512F, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::implementation::convert_valid_utf8_to_utf16be [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::implementation::convert_valid_utf8_to_utf16le [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
simdutf::icelake::implementation::convert_valid_utf8_to_utf32 [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI, BMI2]
|
||||
simdutf::icelake::implementation::count_utf16be [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL]
|
||||
simdutf::icelake::implementation::count_utf16le [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL]
|
||||
simdutf::icelake::implementation::count_utf8 [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL, AVX512_VPOPCNTDQ]
|
||||
simdutf::icelake::implementation::detect_encodings [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::find [AVX, AVX512BW, BMI2]
|
||||
simdutf::icelake::implementation::latin1_length_from_utf8 [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL, AVX512_VPOPCNTDQ]
|
||||
simdutf::icelake::implementation::to_well_formed_utf16be [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::to_well_formed_utf16le [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::utf16_length_from_utf32 [AVX, AVX2, AVX512DQ, AVX512F, AVX512VL]
|
||||
simdutf::icelake::implementation::utf16_length_from_utf8 [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL]
|
||||
simdutf::icelake::implementation::utf32_length_from_utf16be [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL]
|
||||
simdutf::icelake::implementation::utf32_length_from_utf16le [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL]
|
||||
simdutf::icelake::implementation::utf32_length_from_utf8 [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL, AVX512_VPOPCNTDQ]
|
||||
simdutf::icelake::implementation::utf8_length_from_latin1 [AVX, AVX2, AVX512BW, AVX512F, AVX512VL]
|
||||
simdutf::icelake::implementation::utf8_length_from_utf16be [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL]
|
||||
simdutf::icelake::implementation::utf8_length_from_utf16le [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL]
|
||||
simdutf::icelake::implementation::utf8_length_from_utf32 [AVX, AVX2, AVX512DQ, AVX512F, AVX512VL]
|
||||
simdutf::icelake::implementation::validate_ascii [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::validate_ascii_with_errors [AVX, AVX512BW, BMI2]
|
||||
simdutf::icelake::implementation::validate_utf16be [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::validate_utf16be_as_ascii [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::validate_utf16be_with_errors [AVX, AVX512BW, BMI1, BMI2]
|
||||
simdutf::icelake::implementation::validate_utf16le [AVX, AVX512BW, BMI2]
|
||||
simdutf::icelake::implementation::validate_utf16le_as_ascii [AVX, AVX512BW, BMI2]
|
||||
simdutf::icelake::implementation::validate_utf16le_with_errors [AVX, AVX512BW, BMI1, BMI2]
|
||||
simdutf::icelake::implementation::validate_utf32 [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::validate_utf32_with_errors [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::validate_utf8 [AVX, AVX512BW, AVX512F, BMI2]
|
||||
simdutf::icelake::implementation::validate_utf8_with_errors [AVX, AVX512BW, AVX512F, BMI2]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# JSC IPInt SIMD. Windows offlineasm emits _validate suffix.
|
||||
# (196 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
ipint_simd_f32x4_abs_validate [AVX]
|
||||
ipint_simd_f32x4_add_validate [AVX]
|
||||
ipint_simd_f32x4_ceil_validate [AVX]
|
||||
ipint_simd_f32x4_convert_i32x4_s_validate [AVX]
|
||||
ipint_simd_f32x4_convert_i32x4_u_validate [AVX]
|
||||
ipint_simd_f32x4_demote_f64x2_zero_validate [AVX]
|
||||
ipint_simd_f32x4_div_validate [AVX]
|
||||
ipint_simd_f32x4_eq_validate [AVX]
|
||||
ipint_simd_f32x4_floor_validate [AVX]
|
||||
ipint_simd_f32x4_ge_validate [AVX]
|
||||
ipint_simd_f32x4_gt_validate [AVX]
|
||||
ipint_simd_f32x4_le_validate [AVX]
|
||||
ipint_simd_f32x4_lt_validate [AVX]
|
||||
ipint_simd_f32x4_max_validate [AVX]
|
||||
ipint_simd_f32x4_min_validate [AVX]
|
||||
ipint_simd_f32x4_mul_validate [AVX]
|
||||
ipint_simd_f32x4_ne_validate [AVX]
|
||||
ipint_simd_f32x4_nearest_validate [AVX]
|
||||
ipint_simd_f32x4_neg_validate [AVX]
|
||||
ipint_simd_f32x4_pmax_validate [AVX]
|
||||
ipint_simd_f32x4_pmin_validate [AVX]
|
||||
ipint_simd_f32x4_splat_validate [AVX]
|
||||
ipint_simd_f32x4_sqrt_validate [AVX]
|
||||
ipint_simd_f32x4_sub_validate [AVX]
|
||||
ipint_simd_f32x4_trunc_validate [AVX]
|
||||
ipint_simd_f64x2_abs_validate [AVX]
|
||||
ipint_simd_f64x2_add_validate [AVX]
|
||||
ipint_simd_f64x2_ceil_validate [AVX]
|
||||
ipint_simd_f64x2_convert_low_i32x4_s_validate [AVX]
|
||||
ipint_simd_f64x2_convert_low_i32x4_u_validate [AVX]
|
||||
ipint_simd_f64x2_div_validate [AVX]
|
||||
ipint_simd_f64x2_eq_validate [AVX]
|
||||
ipint_simd_f64x2_floor_validate [AVX]
|
||||
ipint_simd_f64x2_ge_validate [AVX]
|
||||
ipint_simd_f64x2_gt_validate [AVX]
|
||||
ipint_simd_f64x2_le_validate [AVX]
|
||||
ipint_simd_f64x2_lt_validate [AVX]
|
||||
ipint_simd_f64x2_max_validate [AVX]
|
||||
ipint_simd_f64x2_min_validate [AVX]
|
||||
ipint_simd_f64x2_mul_validate [AVX]
|
||||
ipint_simd_f64x2_ne_validate [AVX]
|
||||
ipint_simd_f64x2_nearest_validate [AVX]
|
||||
ipint_simd_f64x2_neg_validate [AVX]
|
||||
ipint_simd_f64x2_pmax_validate [AVX]
|
||||
ipint_simd_f64x2_pmin_validate [AVX]
|
||||
ipint_simd_f64x2_promote_low_f32x4_validate [AVX]
|
||||
ipint_simd_f64x2_splat_validate [AVX]
|
||||
ipint_simd_f64x2_sqrt_validate [AVX]
|
||||
ipint_simd_f64x2_sub_validate [AVX]
|
||||
ipint_simd_f64x2_trunc_validate [AVX]
|
||||
ipint_simd_i16x8_abs_validate [AVX]
|
||||
ipint_simd_i16x8_add_sat_s_validate [AVX]
|
||||
ipint_simd_i16x8_add_sat_u_validate [AVX]
|
||||
ipint_simd_i16x8_add_validate [AVX]
|
||||
ipint_simd_i16x8_all_true_validate [AVX]
|
||||
ipint_simd_i16x8_avgr_u_validate [AVX]
|
||||
ipint_simd_i16x8_eq_validate [AVX]
|
||||
ipint_simd_i16x8_extadd_pairwise_i8x16_s_validate [AVX]
|
||||
ipint_simd_i16x8_extadd_pairwise_i8x16_u_validate [AVX]
|
||||
ipint_simd_i16x8_extend_high_i8x16_s_validate [AVX]
|
||||
ipint_simd_i16x8_extend_high_i8x16_u_validate [AVX]
|
||||
ipint_simd_i16x8_extend_low_i8x16_s_validate [AVX]
|
||||
ipint_simd_i16x8_extend_low_i8x16_u_validate [AVX]
|
||||
ipint_simd_i16x8_extmul_high_i8x16_s_validate [AVX]
|
||||
ipint_simd_i16x8_extmul_high_i8x16_u_validate [AVX]
|
||||
ipint_simd_i16x8_extmul_low_i8x16_s_validate [AVX]
|
||||
ipint_simd_i16x8_extmul_low_i8x16_u_validate [AVX]
|
||||
ipint_simd_i16x8_ge_s_validate [AVX]
|
||||
ipint_simd_i16x8_ge_u_validate [AVX]
|
||||
ipint_simd_i16x8_gt_s_validate [AVX]
|
||||
ipint_simd_i16x8_gt_u_validate [AVX]
|
||||
ipint_simd_i16x8_le_s_validate [AVX]
|
||||
ipint_simd_i16x8_le_u_validate [AVX]
|
||||
ipint_simd_i16x8_lt_s_validate [AVX]
|
||||
ipint_simd_i16x8_lt_u_validate [AVX]
|
||||
ipint_simd_i16x8_max_s_validate [AVX]
|
||||
ipint_simd_i16x8_max_u_validate [AVX]
|
||||
ipint_simd_i16x8_min_s_validate [AVX]
|
||||
ipint_simd_i16x8_min_u_validate [AVX]
|
||||
ipint_simd_i16x8_mul_validate [AVX]
|
||||
ipint_simd_i16x8_narrow_i32x4_s_validate [AVX]
|
||||
ipint_simd_i16x8_narrow_i32x4_u_validate [AVX]
|
||||
ipint_simd_i16x8_ne_validate [AVX]
|
||||
ipint_simd_i16x8_neg_validate [AVX]
|
||||
ipint_simd_i16x8_q15mulr_sat_s_validate [AVX]
|
||||
ipint_simd_i16x8_shl_validate [AVX]
|
||||
ipint_simd_i16x8_shr_s_validate [AVX]
|
||||
ipint_simd_i16x8_shr_u_validate [AVX]
|
||||
ipint_simd_i16x8_splat_validate [AVX]
|
||||
ipint_simd_i16x8_sub_sat_s_validate [AVX]
|
||||
ipint_simd_i16x8_sub_sat_u_validate [AVX]
|
||||
ipint_simd_i16x8_sub_validate [AVX]
|
||||
ipint_simd_i32x4_abs_validate [AVX]
|
||||
ipint_simd_i32x4_add_validate [AVX]
|
||||
ipint_simd_i32x4_all_true_validate [AVX]
|
||||
ipint_simd_i32x4_dot_i16x8_s_validate [AVX]
|
||||
ipint_simd_i32x4_eq_validate [AVX]
|
||||
ipint_simd_i32x4_extadd_pairwise_i16x8_s_validate [AVX]
|
||||
ipint_simd_i32x4_extadd_pairwise_i16x8_u_validate [AVX]
|
||||
ipint_simd_i32x4_extend_high_i16x8_s_validate [AVX]
|
||||
ipint_simd_i32x4_extend_high_i16x8_u_validate [AVX]
|
||||
ipint_simd_i32x4_extend_low_i16x8_s_validate [AVX]
|
||||
ipint_simd_i32x4_extend_low_i16x8_u_validate [AVX]
|
||||
ipint_simd_i32x4_extmul_high_i16x8_s_validate [AVX]
|
||||
ipint_simd_i32x4_extmul_high_i16x8_u_validate [AVX]
|
||||
ipint_simd_i32x4_extmul_low_i16x8_s_validate [AVX]
|
||||
ipint_simd_i32x4_extmul_low_i16x8_u_validate [AVX]
|
||||
ipint_simd_i32x4_ge_s_validate [AVX]
|
||||
ipint_simd_i32x4_ge_u_validate [AVX]
|
||||
ipint_simd_i32x4_gt_s_validate [AVX]
|
||||
ipint_simd_i32x4_gt_u_validate [AVX]
|
||||
ipint_simd_i32x4_le_s_validate [AVX]
|
||||
ipint_simd_i32x4_le_u_validate [AVX]
|
||||
ipint_simd_i32x4_lt_s_validate [AVX]
|
||||
ipint_simd_i32x4_lt_u_validate [AVX]
|
||||
ipint_simd_i32x4_max_s_validate [AVX]
|
||||
ipint_simd_i32x4_max_u_validate [AVX]
|
||||
ipint_simd_i32x4_min_s_validate [AVX]
|
||||
ipint_simd_i32x4_min_u_validate [AVX]
|
||||
ipint_simd_i32x4_mul_validate [AVX]
|
||||
ipint_simd_i32x4_ne_validate [AVX]
|
||||
ipint_simd_i32x4_neg_validate [AVX]
|
||||
ipint_simd_i32x4_shl_validate [AVX]
|
||||
ipint_simd_i32x4_shr_s_validate [AVX]
|
||||
ipint_simd_i32x4_shr_u_validate [AVX]
|
||||
ipint_simd_i32x4_splat_validate [AVX]
|
||||
ipint_simd_i32x4_sub_validate [AVX]
|
||||
ipint_simd_i32x4_trunc_sat_f32x4_s_validate [AVX]
|
||||
ipint_simd_i32x4_trunc_sat_f32x4_u_validate [AVX]
|
||||
ipint_simd_i32x4_trunc_sat_f64x2_s_zero_validate [AVX]
|
||||
ipint_simd_i32x4_trunc_sat_f64x2_u_zero_validate [AVX]
|
||||
ipint_simd_i64x2_abs_validate [AVX]
|
||||
ipint_simd_i64x2_add_validate [AVX]
|
||||
ipint_simd_i64x2_all_true_validate [AVX]
|
||||
ipint_simd_i64x2_eq_validate [AVX]
|
||||
ipint_simd_i64x2_extend_high_i32x4_s_validate [AVX]
|
||||
ipint_simd_i64x2_extend_high_i32x4_u_validate [AVX]
|
||||
ipint_simd_i64x2_extend_low_i32x4_s_validate [AVX]
|
||||
ipint_simd_i64x2_extend_low_i32x4_u_validate [AVX]
|
||||
ipint_simd_i64x2_extmul_high_i32x4_s_validate [AVX]
|
||||
ipint_simd_i64x2_extmul_high_i32x4_u_validate [AVX]
|
||||
ipint_simd_i64x2_extmul_low_i32x4_s_validate [AVX]
|
||||
ipint_simd_i64x2_extmul_low_i32x4_u_validate [AVX]
|
||||
ipint_simd_i64x2_ge_s_validate [AVX]
|
||||
ipint_simd_i64x2_gt_s_validate [AVX]
|
||||
ipint_simd_i64x2_le_s_validate [AVX]
|
||||
ipint_simd_i64x2_lt_s_validate [AVX]
|
||||
ipint_simd_i64x2_ne_validate [AVX]
|
||||
ipint_simd_i64x2_neg_validate [AVX]
|
||||
ipint_simd_i64x2_shl_validate [AVX]
|
||||
ipint_simd_i64x2_shr_u_validate [AVX]
|
||||
ipint_simd_i64x2_splat_validate [AVX]
|
||||
ipint_simd_i64x2_sub_validate [AVX]
|
||||
ipint_simd_i8x16_abs_validate [AVX]
|
||||
ipint_simd_i8x16_add_sat_s_validate [AVX]
|
||||
ipint_simd_i8x16_add_sat_u_validate [AVX]
|
||||
ipint_simd_i8x16_add_validate [AVX]
|
||||
ipint_simd_i8x16_all_true_validate [AVX]
|
||||
ipint_simd_i8x16_avgr_u_validate [AVX]
|
||||
ipint_simd_i8x16_eq_validate [AVX]
|
||||
ipint_simd_i8x16_ge_s_validate [AVX]
|
||||
ipint_simd_i8x16_ge_u_validate [AVX]
|
||||
ipint_simd_i8x16_gt_s_validate [AVX]
|
||||
ipint_simd_i8x16_gt_u_validate [AVX]
|
||||
ipint_simd_i8x16_le_s_validate [AVX]
|
||||
ipint_simd_i8x16_le_u_validate [AVX]
|
||||
ipint_simd_i8x16_lt_s_validate [AVX]
|
||||
ipint_simd_i8x16_lt_u_validate [AVX]
|
||||
ipint_simd_i8x16_max_s_validate [AVX]
|
||||
ipint_simd_i8x16_max_u_validate [AVX]
|
||||
ipint_simd_i8x16_min_s_validate [AVX]
|
||||
ipint_simd_i8x16_min_u_validate [AVX]
|
||||
ipint_simd_i8x16_narrow_i16x8_s_validate [AVX]
|
||||
ipint_simd_i8x16_narrow_i16x8_u_validate [AVX]
|
||||
ipint_simd_i8x16_ne_validate [AVX]
|
||||
ipint_simd_i8x16_neg_validate [AVX]
|
||||
ipint_simd_i8x16_popcnt_validate [AVX]
|
||||
ipint_simd_i8x16_shl_validate [AVX]
|
||||
ipint_simd_i8x16_shr_s_validate [AVX]
|
||||
ipint_simd_i8x16_shr_u_validate [AVX]
|
||||
ipint_simd_i8x16_splat_validate [AVX]
|
||||
ipint_simd_i8x16_sub_sat_s_validate [AVX]
|
||||
ipint_simd_i8x16_sub_sat_u_validate [AVX]
|
||||
ipint_simd_i8x16_sub_validate [AVX]
|
||||
ipint_simd_i8x16_swizzle_validate [AVX]
|
||||
ipint_simd_v128_and_validate [AVX]
|
||||
ipint_simd_v128_andnot_validate [AVX]
|
||||
ipint_simd_v128_any_true_validate [AVX]
|
||||
ipint_simd_v128_bitselect_validate [AVX]
|
||||
ipint_simd_v128_load16_splat_mem_validate [AVX]
|
||||
ipint_simd_v128_load32_splat_mem_validate [AVX]
|
||||
ipint_simd_v128_load64_splat_mem_validate [AVX]
|
||||
ipint_simd_v128_load8_splat_mem_validate [AVX]
|
||||
ipint_simd_v128_not_validate [AVX]
|
||||
ipint_simd_v128_or_validate [AVX]
|
||||
ipint_simd_v128_xor_validate [AVX]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# JSC MacroAssembler probe.
|
||||
# (1 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
ctiMasmProbeTrampolineAVX [AVX]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# Highway. MSVC-mangled bun::N_AVX* names.
|
||||
# (72 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
bun::N_AVX10_2::ContainsNewlineOrNonASCIIOrQuoteImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX10_2::CopyU16ToU8Impl [AVX, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI]
|
||||
bun::N_AVX10_2::FillWithSkipMaskImpl [AVX, AVX512DQ, AVX512F]
|
||||
bun::N_AVX10_2::IndexOfAnyCharImpl [AVX, AVX512BW, AVX512F, AVX512VL, AVX512_FP16]
|
||||
bun::N_AVX10_2::IndexOfCharImpl [AVX, AVX512BW, BMI2]
|
||||
bun::N_AVX10_2::IndexOfInterestingCharacterInStringLiteralImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX10_2::IndexOfNeedsEscapeForJavaScriptStringImplBacktick [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX10_2::IndexOfNeedsEscapeForJavaScriptStringImplQuote [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX10_2::IndexOfNewlineOrNonASCIIImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX10_2::IndexOfNewlineOrNonASCIIOrHashOrAtImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX10_2::IndexOfSpaceOrNewlineOrNonASCIIImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX10_2::MemMemImpl [AVX, AVX512BW, AVX512F, BMI1]
|
||||
bun::N_AVX2::ContainsNewlineOrNonASCIIOrQuoteImpl [AVX, AVX2]
|
||||
bun::N_AVX2::CopyU16ToU8Impl [AVX, AVX2]
|
||||
bun::N_AVX2::FillWithSkipMaskImpl [AVX]
|
||||
bun::N_AVX2::IndexOfAnyCharImpl [AVX, AVX2]
|
||||
bun::N_AVX2::IndexOfCharImpl [AVX, AVX2]
|
||||
bun::N_AVX2::IndexOfInterestingCharacterInStringLiteralImpl [AVX, AVX2]
|
||||
bun::N_AVX2::IndexOfNeedsEscapeForJavaScriptStringImplBacktick [AVX, AVX2]
|
||||
bun::N_AVX2::IndexOfNeedsEscapeForJavaScriptStringImplQuote [AVX, AVX2]
|
||||
bun::N_AVX2::IndexOfNewlineOrNonASCIIImpl [AVX, AVX2]
|
||||
bun::N_AVX2::IndexOfNewlineOrNonASCIIOrHashOrAtImpl [AVX, AVX2]
|
||||
bun::N_AVX2::IndexOfSpaceOrNewlineOrNonASCIIImpl [AVX, AVX2]
|
||||
bun::N_AVX2::MemMemImpl [AVX, AVX2]
|
||||
bun::N_AVX3::ContainsNewlineOrNonASCIIOrQuoteImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3::CopyU16ToU8Impl [AVX, AVX512BW, AVX512F, AVX512VL]
|
||||
bun::N_AVX3::FillWithSkipMaskImpl [AVX, AVX512DQ, AVX512F]
|
||||
bun::N_AVX3::IndexOfAnyCharImpl [AVX, AVX512BW, AVX512F, AVX512VL]
|
||||
bun::N_AVX3::IndexOfCharImpl [AVX, AVX512BW, BMI2]
|
||||
bun::N_AVX3::IndexOfInterestingCharacterInStringLiteralImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3::IndexOfNeedsEscapeForJavaScriptStringImplBacktick [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3::IndexOfNeedsEscapeForJavaScriptStringImplQuote [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3::IndexOfNewlineOrNonASCIIImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3::IndexOfNewlineOrNonASCIIOrHashOrAtImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3::IndexOfSpaceOrNewlineOrNonASCIIImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3::MemMemImpl [AVX, AVX512BW, AVX512F, BMI1]
|
||||
bun::N_AVX3_DL::ContainsNewlineOrNonASCIIOrQuoteImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_DL::CopyU16ToU8Impl [AVX, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI]
|
||||
bun::N_AVX3_DL::FillWithSkipMaskImpl [AVX, AVX512DQ, AVX512F]
|
||||
bun::N_AVX3_DL::IndexOfAnyCharImpl [AVX, AVX512BW, AVX512F, AVX512VL]
|
||||
bun::N_AVX3_DL::IndexOfCharImpl [AVX, AVX512BW, BMI2]
|
||||
bun::N_AVX3_DL::IndexOfInterestingCharacterInStringLiteralImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_DL::IndexOfNeedsEscapeForJavaScriptStringImplBacktick [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_DL::IndexOfNeedsEscapeForJavaScriptStringImplQuote [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_DL::IndexOfNewlineOrNonASCIIImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_DL::IndexOfNewlineOrNonASCIIOrHashOrAtImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_DL::IndexOfSpaceOrNewlineOrNonASCIIImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_DL::MemMemImpl [AVX, AVX512BW, AVX512F, BMI1]
|
||||
bun::N_AVX3_SPR::ContainsNewlineOrNonASCIIOrQuoteImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_SPR::CopyU16ToU8Impl [AVX, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI]
|
||||
bun::N_AVX3_SPR::FillWithSkipMaskImpl [AVX, AVX512DQ, AVX512F]
|
||||
bun::N_AVX3_SPR::IndexOfAnyCharImpl [AVX, AVX512BW, AVX512F, AVX512VL, AVX512_FP16]
|
||||
bun::N_AVX3_SPR::IndexOfCharImpl [AVX, AVX512BW, BMI2]
|
||||
bun::N_AVX3_SPR::IndexOfInterestingCharacterInStringLiteralImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_SPR::IndexOfNeedsEscapeForJavaScriptStringImplBacktick [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_SPR::IndexOfNeedsEscapeForJavaScriptStringImplQuote [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_SPR::IndexOfNewlineOrNonASCIIImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_SPR::IndexOfNewlineOrNonASCIIOrHashOrAtImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_SPR::IndexOfSpaceOrNewlineOrNonASCIIImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_SPR::MemMemImpl [AVX, AVX512BW, AVX512F, BMI1]
|
||||
bun::N_AVX3_ZEN4::ContainsNewlineOrNonASCIIOrQuoteImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_ZEN4::CopyU16ToU8Impl [AVX, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI]
|
||||
bun::N_AVX3_ZEN4::FillWithSkipMaskImpl [AVX, AVX512DQ, AVX512F]
|
||||
bun::N_AVX3_ZEN4::IndexOfAnyCharImpl [AVX, AVX512BW, AVX512F, AVX512VL]
|
||||
bun::N_AVX3_ZEN4::IndexOfCharImpl [AVX, AVX512BW, BMI2]
|
||||
bun::N_AVX3_ZEN4::IndexOfInterestingCharacterInStringLiteralImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_ZEN4::IndexOfNeedsEscapeForJavaScriptStringImplBacktick [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_ZEN4::IndexOfNeedsEscapeForJavaScriptStringImplQuote [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_ZEN4::IndexOfNewlineOrNonASCIIImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_ZEN4::IndexOfNewlineOrNonASCIIOrHashOrAtImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_ZEN4::IndexOfSpaceOrNewlineOrNonASCIIImpl [AVX, AVX512BW, AVX512F]
|
||||
bun::N_AVX3_ZEN4::MemMemImpl [AVX, AVX512BW, AVX512F, BMI1]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# BoringSSL AES.
|
||||
# (14 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
aes_gcm_dec_update_vaes_avx2 [AES, AVX, AVX2, MOVBE, PCLMULQDQ, VAES, VPCLMULQDQ]
|
||||
aes_gcm_dec_update_vaes_avx512 [AVX, AVX512BW, AVX512F, AVX512VL, BMI2, VAES, VPCLMULQDQ]
|
||||
aes_gcm_enc_update_vaes_avx2 [AVX, AVX2, PCLMULQDQ, VAES, VPCLMULQDQ]
|
||||
aes_gcm_enc_update_vaes_avx512 [AVX, AVX512BW, AVX512F, AVX512VL, BMI2, VAES, VPCLMULQDQ]
|
||||
aes_hw_cbc_encrypt [AES]
|
||||
aes_hw_ctr32_encrypt_blocks [AES]
|
||||
aes_hw_decrypt [AES]
|
||||
aes_hw_ecb_encrypt [AES]
|
||||
aes_hw_encrypt [AES]
|
||||
aes_hw_encrypt_key_to_decrypt_key [AES]
|
||||
aes_hw_set_encrypt_key_alt [AES]
|
||||
aes_hw_set_encrypt_key_base [AES]
|
||||
aesni_gcm_decrypt [AES, AVX]
|
||||
aesni_gcm_encrypt [AVX, PCLMULQDQ]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# BoringSSL SHA.
|
||||
# (6 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
sha1_block_data_order_avx [AVX]
|
||||
sha1_block_data_order_avx2 [AVX, AVX2, BMI1, BMI2]
|
||||
sha1_block_data_order_hw [SHA]
|
||||
sha256_block_data_order_avx [AVX]
|
||||
sha256_block_data_order_hw [SHA]
|
||||
sha512_block_data_order_avx [AVX]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# BoringSSL ChaCha20.
|
||||
# (3 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
ChaCha20_ctr32_avx2 [AVX, AVX2]
|
||||
chacha20_poly1305_open_avx2 [AVX, AVX2, BMI2]
|
||||
chacha20_poly1305_seal_avx2 [AVX, AVX2, BMI2]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# BoringSSL GCM.
|
||||
# (11 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
gcm_ghash_avx [AVX, PCLMULQDQ]
|
||||
gcm_ghash_clmul [PCLMULQDQ]
|
||||
gcm_ghash_vpclmulqdq_avx2 [AVX, AVX2, PCLMULQDQ, VPCLMULQDQ]
|
||||
gcm_ghash_vpclmulqdq_avx512 [AVX, AVX512BW, AVX512F, AVX512VL, PCLMULQDQ, VPCLMULQDQ]
|
||||
gcm_gmult_clmul [PCLMULQDQ]
|
||||
gcm_gmult_vpclmulqdq_avx2 [AVX, PCLMULQDQ]
|
||||
gcm_gmult_vpclmulqdq_avx512 [AVX, AVX512F, AVX512VL, PCLMULQDQ]
|
||||
gcm_init_avx [AVX, PCLMULQDQ]
|
||||
gcm_init_clmul [PCLMULQDQ]
|
||||
gcm_init_vpclmulqdq_avx2 [AVX, AVX2, PCLMULQDQ, VPCLMULQDQ]
|
||||
gcm_init_vpclmulqdq_avx512 [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, PCLMULQDQ, VPCLMULQDQ]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# BoringSSL bignum.
|
||||
# (14 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
beeu_mod_inverse_vartime [AVX]
|
||||
bn_mulx4x_mont [ADX, BMI2]
|
||||
bn_mulx4x_mont_gather5 [ADX, BMI2]
|
||||
bn_sqrx8x_internal [ADX, BMI1, BMI2]
|
||||
ecp_nistz256_mul_mont_adx [ADX, BMI2]
|
||||
ecp_nistz256_ord_mul_mont_adx [ADX, BMI2]
|
||||
ecp_nistz256_ord_sqr_mont_adx [ADX, BMI2]
|
||||
ecp_nistz256_select_w5_avx2 [AVX, AVX2]
|
||||
ecp_nistz256_select_w7_avx2 [AVX, AVX2]
|
||||
ecp_nistz256_sqr_mont_adx [ADX, BMI2]
|
||||
rsaz_1024_gather5_avx2 [AVX, AVX2]
|
||||
rsaz_1024_mul_avx2 [AVX, AVX2]
|
||||
rsaz_1024_scatter5_avx2 [AVX, AVX2]
|
||||
rsaz_1024_sqr_avx2 [AVX, AVX2]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# BoringSSL RDRAND.
|
||||
# (2 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
CRYPTO_rdrand [RDRAND]
|
||||
CRYPTO_rdrand_multiple8_buf [RDRAND]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# libdeflate.
|
||||
# (10 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
adler32_x86_avx2 [AVX, AVX2]
|
||||
adler32_x86_avx2_vnni [AVX, AVX2, AVX_VNNI]
|
||||
adler32_x86_avx512_vl256_vnni [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, AVX512_VNNI]
|
||||
adler32_x86_avx512_vl512_vnni [AVX, AVX2, AVX512BW, AVX512F, AVX512_VNNI]
|
||||
crc32_x86_pclmulqdq [PCLMULQDQ]
|
||||
crc32_x86_pclmulqdq_avx [AVX, PCLMULQDQ]
|
||||
crc32_x86_vpclmulqdq_avx2 [AVX, AVX2, PCLMULQDQ, VPCLMULQDQ]
|
||||
crc32_x86_vpclmulqdq_avx512_vl256 [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, PCLMULQDQ, VPCLMULQDQ]
|
||||
crc32_x86_vpclmulqdq_avx512_vl512 [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, PCLMULQDQ, VPCLMULQDQ]
|
||||
deflate_decompress_bmi2 [BMI2]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# Rust memchr detect functions (via lolhtml deps).
|
||||
# (3 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
_RNvNvNtNtNt<rust-hash>6memchr4arch6x86_646memchr10memchr_raw6detect [AVX, AVX2]
|
||||
_RNvNvNtNtNt<rust-hash>6memchr4arch6x86_646memchr11memchr2_raw6detect [AVX, AVX2]
|
||||
_RNvNvNtNtNt<rust-hash>6memchr4arch6x86_646memchr11memchr3_raw6detect [AVX, AVX2]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# MSVC STL vectorized algorithms. Gate: __isa_available.
|
||||
# (11 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
__std_reverse_copy_trivially_copyable_1 [AVX, AVX2]
|
||||
__std_reverse_trivially_swappable_1 [AVX, AVX2]
|
||||
__std_reverse_trivially_swappable_2 [AVX, AVX2]
|
||||
__std_reverse_trivially_swappable_4 [AVX, AVX2]
|
||||
__std_reverse_trivially_swappable_8 [AVX, AVX2]
|
||||
`anonymous namespace'::__std_find_last_trivial_impl<`anonymous namespace'::_Find_traits_1,unsigned char> [AVX, AVX2, LZCNT]
|
||||
`anonymous namespace'::__std_find_trivial_impl<`anonymous namespace'::_Find_traits_1,unsigned char> [AVX, AVX2]
|
||||
`anonymous namespace'::__std_find_trivial_impl<`anonymous namespace'::_Find_traits_2,unsigned short> [AVX, AVX2]
|
||||
`anonymous namespace'::__std_find_trivial_impl<`anonymous namespace'::_Find_traits_4,unsigned int> [AVX, AVX2]
|
||||
`anonymous namespace'::__std_find_trivial_impl<`anonymous namespace'::_Find_traits_8,unsigned __int64> [AVX, AVX2]
|
||||
`anonymous namespace'::__std_minmax_impl<3,`anonymous namespace'::_Minmax_traits_8_avx,1> [AVX, AVX2]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# MSVC CRT libm + mem*/str* SIMD variants. Gate: __isa_available.
|
||||
# (42 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
__remainder_piby2_fma3 [AVX, FMA]
|
||||
__remainder_piby2_fma3_bdl [AVX, FMA]
|
||||
_handle_nan_fma [AVX]
|
||||
_handle_nanf_fma [AVX]
|
||||
acos_fma [AVX, FMA]
|
||||
acosf_fma [AVX, FMA]
|
||||
asin_fma [AVX, FMA]
|
||||
asinf_fma [AVX, FMA]
|
||||
atan2_fma [AVX, BMI2, FMA]
|
||||
atan_fma [AVX, FMA]
|
||||
atanf_fma [AVX, FMA]
|
||||
cos [AVX, FMA]
|
||||
cosf [AVX, FMA]
|
||||
cosh_fma [AVX, FMA]
|
||||
coshf_fma [AVX, FMA]
|
||||
exp [AVX, FMA]
|
||||
exp2_fma [AVX, FMA]
|
||||
expf [AVX, FMA]
|
||||
fma [FMA]
|
||||
fmod [FMA]
|
||||
log [AVX, FMA]
|
||||
log10 [AVX, FMA]
|
||||
log10f [AVX, FMA]
|
||||
log2f_fma [AVX, FMA]
|
||||
logf [AVX, FMA]
|
||||
memcpy [AVX]
|
||||
memcpy_avx_ermsb_Intel [AVX]
|
||||
memcpy_avx_ermsb_amd [AVX]
|
||||
memset [AVX]
|
||||
pow_fma [AVX, BMI2, FMA]
|
||||
powf [AVX, FMA]
|
||||
sin [AVX, FMA]
|
||||
sinf [AVX, FMA]
|
||||
sinh_fma [AVX, FMA]
|
||||
sinhf_fma [AVX, FMA]
|
||||
strnlen [AVX, AVX2]
|
||||
tan [AVX, FMA]
|
||||
tanf [AVX, FMA]
|
||||
tanh_fma [AVX, FMA]
|
||||
tanhf_fma [AVX, FMA]
|
||||
wcslen [AVX, AVX2]
|
||||
wcsnlen [AVX, AVX2]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# Rust std memchr AVX2 kernel inlined into lolhtml. Gate: is_x86_feature_detected!.
|
||||
# PDB attribution varies by toolchain — sometimes a hashbrown call-site symbol,
|
||||
# sometimes no symbol at all (falls through to section-contribution <lib:> name).
|
||||
# (2 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
_RINvYNtNt<rust-hash>9hashbrown6hasher18DefaultHashBuilderNtNt<rust-hash>4core4hash11BuildHasher8hash_oneRNtNtNt<rust-hash>8lol_html4html10local_name9LocalNameEB1R_ [AVX, AVX2]
|
||||
<lib:lolhtml.lib> [AVX, AVX2]
|
||||
667
scripts/verify-baseline-static/allowlist-x64.txt
Normal file
667
scripts/verify-baseline-static/allowlist-x64.txt
Normal file
@@ -0,0 +1,667 @@
|
||||
# verify-baseline-static allowlist for x64 Nehalem baseline builds.
|
||||
#
|
||||
# Each symbol contains instructions beyond Nehalem but is runtime-dispatched
|
||||
# behind a CPUID gate. A new symbol not on this list is either (a) a new
|
||||
# dispatch target to add here, or (b) a -march leak to fix.
|
||||
#
|
||||
# Feature ceilings: [FEAT, ...] lists what the gate checks. A feature outside
|
||||
# the brackets is a violation even for an allowlisted symbol.
|
||||
#
|
||||
# Shared by linux-x64-baseline and linux-x64-musl-baseline.
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# simdutf AVX2 (Haswell). Gate: set_best() dispatcher — CPUID at first call, cached in atomic ptr.
|
||||
# (89 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
_ZN7simdutf7haswell12_GLOBAL__N_128convert_masked_utf8_to_utf16ILNS_10endiannessE0EEEmPKcmRPDs [AVX, AVX2]
|
||||
_ZN7simdutf7haswell12_GLOBAL__N_128convert_masked_utf8_to_utf16ILNS_10endiannessE1EEEmPKcmRPDs [AVX, AVX2]
|
||||
_ZN7simdutf7haswell12_GLOBAL__N_128convert_masked_utf8_to_utf32EPKcmRPDi [AVX, AVX2]
|
||||
_ZN7simdutf7haswell12_GLOBAL__N_15utf1626validate_utf16_with_errorsILNS_10endiannessE0EEEKNS_6resultEPKDsm [AVX, AVX2, BMI1]
|
||||
_ZN7simdutf7haswell12_GLOBAL__N_15utf1626validate_utf16_with_errorsILNS_10endiannessE1EEEKNS_6resultEPKDsm [AVX, AVX2, BMI1]
|
||||
_ZN7simdutf7haswell12_GLOBAL__N_16base6422compress_decode_base64ILb0ELb0ELb0EDsEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX2, BMI1]
|
||||
_ZN7simdutf7haswell12_GLOBAL__N_16base6422compress_decode_base64ILb0ELb0ELb0EcEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX2, BMI1]
|
||||
_ZN7simdutf7haswell12_GLOBAL__N_16base6422compress_decode_base64ILb0ELb0ELb1EDsEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX2, BMI1]
|
||||
_ZN7simdutf7haswell12_GLOBAL__N_16base6422compress_decode_base64ILb0ELb0ELb1EcEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX2, BMI1]
|
||||
_ZN7simdutf7haswell12_GLOBAL__N_16base6422compress_decode_base64ILb0ELb1ELb0EDsEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX2, BMI1]
|
||||
_ZN7simdutf7haswell12_GLOBAL__N_16base6422compress_decode_base64ILb0ELb1ELb0EcEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX2, BMI1]
|
||||
_ZN7simdutf7haswell12_GLOBAL__N_16base6422compress_decode_base64ILb0ELb1ELb1EDsEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX2, BMI1]
|
||||
_ZN7simdutf7haswell12_GLOBAL__N_16base6422compress_decode_base64ILb0ELb1ELb1EcEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX2, BMI1]
|
||||
_ZN7simdutf7haswell12_GLOBAL__N_16base6422compress_decode_base64ILb1ELb0ELb0EDsEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX2, BMI1]
|
||||
_ZN7simdutf7haswell12_GLOBAL__N_16base6422compress_decode_base64ILb1ELb0ELb0EcEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX2, BMI1]
|
||||
_ZN7simdutf7haswell12_GLOBAL__N_16base6422compress_decode_base64ILb1ELb1ELb0EDsEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX2, BMI1]
|
||||
_ZN7simdutf7haswell12_GLOBAL__N_16base6422compress_decode_base64ILb1ELb1ELb0EcEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX2, BMI1]
|
||||
_ZNK7simdutf7haswell14implementation10count_utf8EPKcm [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation13count_utf16beEPKDsm [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation13count_utf16leEPKDsm [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation13validate_utf8EPKcm [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation14validate_asciiEPKcm [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation14validate_utf32EPKDim [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation16binary_to_base64EPKcmPcNS_14base64_optionsE [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation16detect_encodingsEPKcm [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation16validate_utf16beEPKDsm [AVX, AVX2, BMI1]
|
||||
_ZNK7simdutf7haswell14implementation16validate_utf16leEPKDsm [AVX, AVX2, BMI1]
|
||||
_ZNK7simdutf7haswell14implementation21convert_utf32_to_utf8EPKDimPc [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation21convert_utf8_to_utf32EPKcmPDi [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation22convert_latin1_to_utf8EPKcmPc [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation22convert_utf8_to_latin1EPKcmPc [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation22to_well_formed_utf16beEPKDsmPDs [AVX, AVX2, BMI1]
|
||||
_ZNK7simdutf7haswell14implementation22to_well_formed_utf16leEPKDsmPDs [AVX, AVX2, BMI1]
|
||||
_ZNK7simdutf7haswell14implementation22utf16_length_from_utf8EPKcm [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation22utf32_length_from_utf8EPKcm [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation22utf8_length_from_utf32EPKDim [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation23change_endianness_utf16EPKDsmPDs [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation23convert_latin1_to_utf32EPKcmPDi [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation23convert_utf16be_to_utf8EPKDsmPc [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation23convert_utf16le_to_utf8EPKDsmPc [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation23convert_utf32_to_latin1EPKDimPc [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation23convert_utf8_to_utf16beEPKcmPDs [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation23convert_utf8_to_utf16leEPKcmPDs [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation23latin1_length_from_utf8EPKcm [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation23utf16_length_from_utf32EPKDim [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation23utf8_length_from_latin1EPKcm [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation24convert_utf16be_to_utf32EPKDsmPDi [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation24convert_utf16le_to_utf32EPKDsmPDi [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation24convert_utf32_to_utf16beEPKDimPDs [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation24convert_utf32_to_utf16leEPKDimPDs [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation24utf8_length_from_utf16beEPKDsm [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation24utf8_length_from_utf16leEPKDsm [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation25convert_latin1_to_utf16beEPKcmPDs [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation25convert_latin1_to_utf16leEPKcmPDs [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation25convert_utf16be_to_latin1EPKDsmPc [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation25convert_utf16le_to_latin1EPKDsmPc [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation25utf32_length_from_utf16beEPKDsm [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation25utf32_length_from_utf16leEPKDsm [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation25validate_utf16be_as_asciiEPKDsm [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation25validate_utf16le_as_asciiEPKDsm [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation25validate_utf8_with_errorsEPKcm [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation26validate_ascii_with_errorsEPKcm [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation26validate_utf32_with_errorsEPKDim [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation27binary_to_base64_with_linesEPKcmPcmNS_14base64_optionsE [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation27convert_valid_utf8_to_utf32EPKcmPDi [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation28convert_valid_utf8_to_latin1EPKcmPc [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation28validate_utf16be_with_errorsEPKDsm [AVX, AVX2, BMI1]
|
||||
_ZNK7simdutf7haswell14implementation28validate_utf16le_with_errorsEPKDsm [AVX, AVX2, BMI1]
|
||||
_ZNK7simdutf7haswell14implementation29convert_valid_utf8_to_utf16beEPKcmPDs [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation29convert_valid_utf8_to_utf16leEPKcmPDs [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation30convert_valid_utf16be_to_utf32EPKDsmPDi [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation30convert_valid_utf16le_to_utf32EPKDsmPDi [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation31convert_valid_utf16le_to_latin1EPKDsmPc [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation33convert_utf32_to_utf8_with_errorsEPKDimPc [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation33convert_utf8_to_utf32_with_errorsEPKcmPDi [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation34convert_utf8_to_latin1_with_errorsEPKcmPc [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation35convert_utf16be_to_utf8_with_errorsEPKDsmPc [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation35convert_utf16le_to_utf8_with_errorsEPKDsmPc [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation35convert_utf32_to_latin1_with_errorsEPKDimPc [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation35convert_utf8_to_utf16be_with_errorsEPKcmPDs [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation35convert_utf8_to_utf16le_with_errorsEPKcmPDs [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation36convert_utf16be_to_utf32_with_errorsEPKDsmPDi [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation36convert_utf16le_to_utf32_with_errorsEPKDsmPDi [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation36convert_utf32_to_utf16be_with_errorsEPKDimPDs [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation36convert_utf32_to_utf16le_with_errorsEPKDimPDs [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation37convert_utf16be_to_latin1_with_errorsEPKDsmPc [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation37convert_utf16le_to_latin1_with_errorsEPKDsmPc [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation4findEPKDsS3_Ds [AVX, AVX2]
|
||||
_ZNK7simdutf7haswell14implementation4findEPKcS3_c [AVX, AVX2]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# simdutf AVX-512 (Icelake). Same dispatcher.
|
||||
# (91 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
_ZN7simdutf7icelake12_GLOBAL__N_121utf16_to_utf8_avx512iILNS_10endiannessE0EEEmPKDsmPhPm [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI1, BMI2]
|
||||
_ZN7simdutf7icelake12_GLOBAL__N_121utf16_to_utf8_avx512iILNS_10endiannessE1EEEmPKDsmPhPm [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI1, BMI2]
|
||||
_ZN7simdutf7icelake12_GLOBAL__N_121utf8_to_latin1_avx512ERPKcmRPc [AVX, AVX512BW, AVX512F, AVX512_VBMI2, BMI1, BMI2]
|
||||
_ZN7simdutf7icelake12_GLOBAL__N_122compress_decode_base64ILb0ELb0ELb0EDsEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
_ZN7simdutf7icelake12_GLOBAL__N_122compress_decode_base64ILb0ELb0ELb0EcEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
_ZN7simdutf7icelake12_GLOBAL__N_122compress_decode_base64ILb0ELb0ELb1EDsEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
_ZN7simdutf7icelake12_GLOBAL__N_122compress_decode_base64ILb0ELb0ELb1EcEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
_ZN7simdutf7icelake12_GLOBAL__N_122compress_decode_base64ILb0ELb1ELb0EDsEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
_ZN7simdutf7icelake12_GLOBAL__N_122compress_decode_base64ILb0ELb1ELb0EcEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
_ZN7simdutf7icelake12_GLOBAL__N_122compress_decode_base64ILb0ELb1ELb1EDsEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
_ZN7simdutf7icelake12_GLOBAL__N_122compress_decode_base64ILb0ELb1ELb1EcEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
_ZN7simdutf7icelake12_GLOBAL__N_122compress_decode_base64ILb1ELb0ELb0EDsEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
_ZN7simdutf7icelake12_GLOBAL__N_122compress_decode_base64ILb1ELb0ELb0EcEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
_ZN7simdutf7icelake12_GLOBAL__N_122compress_decode_base64ILb1ELb1ELb0EDsEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
_ZN7simdutf7icelake12_GLOBAL__N_122compress_decode_base64ILb1ELb1ELb0EcEENS_11full_resultEPcPKT2_mNS_14base64_optionsENS_27last_chunk_handling_optionsE [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
_ZN7simdutf7icelake12_GLOBAL__N_122convert_utf16_to_utf32ILNS_10endiannessE0EEESt5tupleIJPKDsPDibEES6_mS7_ [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZN7simdutf7icelake12_GLOBAL__N_122convert_utf16_to_utf32ILNS_10endiannessE1EEESt5tupleIJPKDsPDibEES6_mS7_ [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation10count_utf8EPKcm [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL, AVX512_VPOPCNTDQ]
|
||||
_ZNK7simdutf7icelake14implementation13count_utf16beEPKDsm [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL]
|
||||
_ZNK7simdutf7icelake14implementation13count_utf16leEPKDsm [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL]
|
||||
_ZNK7simdutf7icelake14implementation13validate_utf8EPKcm [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation14validate_asciiEPKcm [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation14validate_utf32EPKDim [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation16binary_to_base64EPKcmPcNS_14base64_optionsE [AVX, AVX512BW, AVX512F, AVX512_VBMI, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation16detect_encodingsEPKcm [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation16validate_utf16beEPKDsm [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation16validate_utf16leEPKDsm [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation21convert_utf32_to_utf8EPKDimPc [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL]
|
||||
_ZNK7simdutf7icelake14implementation21convert_utf8_to_utf32EPKcmPDi [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation22convert_latin1_to_utf8EPKcmPc [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation22convert_utf8_to_latin1EPKcmPc [AVX, AVX512BW, AVX512F, AVX512_VBMI2, BMI1, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation22to_well_formed_utf16beEPKDsmPDs [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation22to_well_formed_utf16leEPKDsmPDs [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation22utf16_length_from_utf8EPKcm [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL]
|
||||
_ZNK7simdutf7icelake14implementation22utf32_length_from_utf8EPKcm [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL, AVX512_VPOPCNTDQ]
|
||||
_ZNK7simdutf7icelake14implementation22utf8_length_from_utf32EPKDim [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL]
|
||||
_ZNK7simdutf7icelake14implementation23change_endianness_utf16EPKDsmPDs [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation23convert_latin1_to_utf32EPKcmPDi [AVX, AVX512BW, AVX512F, AVX512VL, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation23convert_utf16be_to_utf8EPKDsmPc [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI1, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation23convert_utf16le_to_utf8EPKDsmPc [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI1, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation23convert_utf32_to_latin1EPKDimPc [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation23convert_utf8_to_utf16beEPKcmPDs [AVX, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI, AVX512_VBMI2, BMI1, BMI2, LZCNT]
|
||||
_ZNK7simdutf7icelake14implementation23convert_utf8_to_utf16leEPKcmPDs [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI1, BMI2, LZCNT]
|
||||
_ZNK7simdutf7icelake14implementation23latin1_length_from_utf8EPKcm [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL, AVX512_VPOPCNTDQ]
|
||||
_ZNK7simdutf7icelake14implementation23utf16_length_from_utf32EPKDim [AVX, AVX2, AVX512DQ, AVX512F, AVX512VL]
|
||||
_ZNK7simdutf7icelake14implementation23utf8_length_from_latin1EPKcm [AVX, AVX2, AVX512BW, AVX512F, AVX512VL]
|
||||
_ZNK7simdutf7icelake14implementation24convert_utf16be_to_utf32EPKDsmPDi [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation24convert_utf16le_to_utf32EPKDsmPDi [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation24convert_utf32_to_utf16beEPKDimPDs [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI2, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation24convert_utf32_to_utf16leEPKDimPDs [AVX, AVX512BW, AVX512F, AVX512_VBMI2, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation24utf8_length_from_utf16beEPKDsm [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL]
|
||||
_ZNK7simdutf7icelake14implementation24utf8_length_from_utf16leEPKDsm [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL]
|
||||
_ZNK7simdutf7icelake14implementation25convert_latin1_to_utf16beEPKcmPDs [AVX, AVX512BW, AVX512F, AVX512VL, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation25convert_latin1_to_utf16leEPKcmPDs [AVX, AVX512BW, AVX512F, AVX512VL, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation25convert_utf16be_to_latin1EPKDsmPc [AVX, AVX512BW, AVX512F, AVX512_VBMI, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation25convert_utf16le_to_latin1EPKDsmPc [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation25utf32_length_from_utf16beEPKDsm [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL]
|
||||
_ZNK7simdutf7icelake14implementation25utf32_length_from_utf16leEPKDsm [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL]
|
||||
_ZNK7simdutf7icelake14implementation25validate_utf16be_as_asciiEPKDsm [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation25validate_utf16le_as_asciiEPKDsm [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation25validate_utf8_with_errorsEPKcm [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation26validate_ascii_with_errorsEPKcm [AVX, AVX512BW, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation26validate_utf32_with_errorsEPKDim [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation27binary_to_base64_with_linesEPKcmPcmNS_14base64_optionsE [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation27convert_valid_utf8_to_utf32EPKcmPDi [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation28convert_valid_utf8_to_latin1EPKcmPc [AVX, AVX512BW, AVX512F, AVX512_VBMI2, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation28validate_utf16be_with_errorsEPKDsm [AVX, AVX512BW, AVX512F, BMI1, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation28validate_utf16le_with_errorsEPKDsm [AVX, AVX512BW, AVX512F, BMI1, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation29convert_valid_utf8_to_utf16beEPKcmPDs [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation29convert_valid_utf8_to_utf16leEPKcmPDs [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation30convert_valid_utf16be_to_utf32EPKDsmPDi [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation30convert_valid_utf16le_to_utf32EPKDsmPDi [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation30convert_valid_utf32_to_utf16beEPKDimPDs [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI2, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation31convert_valid_utf16be_to_latin1EPKDsmPc [AVX, AVX512BW, AVX512F, AVX512_VBMI, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation31convert_valid_utf16le_to_latin1EPKDsmPc [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation33convert_utf32_to_utf8_with_errorsEPKDimPc [AVX, AVX2, AVX512BW, AVX512DQ, AVX512F, AVX512VL]
|
||||
_ZNK7simdutf7icelake14implementation33convert_utf8_to_utf32_with_errorsEPKcmPDi [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation34convert_utf8_to_latin1_with_errorsEPKcmPc [AVX, AVX512BW, AVX512F, AVX512_VBMI2, BMI1, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation35convert_utf16be_to_utf8_with_errorsEPKDsmPc [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI1, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation35convert_utf16le_to_utf8_with_errorsEPKDsmPc [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI1, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation35convert_utf32_to_latin1_with_errorsEPKDimPc [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation35convert_utf8_to_utf16be_with_errorsEPKcmPDs [AVX, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI, AVX512_VBMI2, BMI1, BMI2, LZCNT]
|
||||
_ZNK7simdutf7icelake14implementation35convert_utf8_to_utf16le_with_errorsEPKcmPDs [AVX, AVX512BW, AVX512F, AVX512_VBMI, AVX512_VBMI2, BMI1, BMI2, LZCNT]
|
||||
_ZNK7simdutf7icelake14implementation36convert_utf16be_to_utf32_with_errorsEPKDsmPDi [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation36convert_utf16le_to_utf32_with_errorsEPKDsmPDi [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation36convert_utf32_to_utf16be_with_errorsEPKDimPDs [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI2, BMI1, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation36convert_utf32_to_utf16le_with_errorsEPKDimPDs [AVX, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI2, BMI1, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation37convert_utf16be_to_latin1_with_errorsEPKDsmPc [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation37convert_utf16le_to_latin1_with_errorsEPKDsmPc [AVX, AVX512BW, AVX512F, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation4findEPKDsS3_Ds [AVX, AVX512BW, BMI2]
|
||||
_ZNK7simdutf7icelake14implementation4findEPKcS3_c [AVX, AVX512BW, BMI2]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# JSC WebAssembly IPInt SIMD. VEX-encoded 128-bit (needs AVX to decode).
|
||||
# Gated by JSC's WASM SIMD CPUID check.
|
||||
# (196 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
ipint_simd_f32x4_abs [AVX]
|
||||
ipint_simd_f32x4_add [AVX]
|
||||
ipint_simd_f32x4_ceil [AVX]
|
||||
ipint_simd_f32x4_convert_i32x4_s [AVX]
|
||||
ipint_simd_f32x4_convert_i32x4_u [AVX]
|
||||
ipint_simd_f32x4_demote_f64x2_zero [AVX]
|
||||
ipint_simd_f32x4_div [AVX]
|
||||
ipint_simd_f32x4_eq [AVX]
|
||||
ipint_simd_f32x4_floor [AVX]
|
||||
ipint_simd_f32x4_ge [AVX]
|
||||
ipint_simd_f32x4_gt [AVX]
|
||||
ipint_simd_f32x4_le [AVX]
|
||||
ipint_simd_f32x4_lt [AVX]
|
||||
ipint_simd_f32x4_max [AVX]
|
||||
ipint_simd_f32x4_min [AVX]
|
||||
ipint_simd_f32x4_mul [AVX]
|
||||
ipint_simd_f32x4_ne [AVX]
|
||||
ipint_simd_f32x4_nearest [AVX]
|
||||
ipint_simd_f32x4_neg [AVX]
|
||||
ipint_simd_f32x4_pmax [AVX]
|
||||
ipint_simd_f32x4_pmin [AVX]
|
||||
ipint_simd_f32x4_splat [AVX]
|
||||
ipint_simd_f32x4_sqrt [AVX]
|
||||
ipint_simd_f32x4_sub [AVX]
|
||||
ipint_simd_f32x4_trunc [AVX]
|
||||
ipint_simd_f64x2_abs [AVX]
|
||||
ipint_simd_f64x2_add [AVX]
|
||||
ipint_simd_f64x2_ceil [AVX]
|
||||
ipint_simd_f64x2_convert_low_i32x4_s [AVX]
|
||||
ipint_simd_f64x2_convert_low_i32x4_u [AVX]
|
||||
ipint_simd_f64x2_div [AVX]
|
||||
ipint_simd_f64x2_eq [AVX]
|
||||
ipint_simd_f64x2_floor [AVX]
|
||||
ipint_simd_f64x2_ge [AVX]
|
||||
ipint_simd_f64x2_gt [AVX]
|
||||
ipint_simd_f64x2_le [AVX]
|
||||
ipint_simd_f64x2_lt [AVX]
|
||||
ipint_simd_f64x2_max [AVX]
|
||||
ipint_simd_f64x2_min [AVX]
|
||||
ipint_simd_f64x2_mul [AVX]
|
||||
ipint_simd_f64x2_ne [AVX]
|
||||
ipint_simd_f64x2_nearest [AVX]
|
||||
ipint_simd_f64x2_neg [AVX]
|
||||
ipint_simd_f64x2_pmax [AVX]
|
||||
ipint_simd_f64x2_pmin [AVX]
|
||||
ipint_simd_f64x2_promote_low_f32x4 [AVX]
|
||||
ipint_simd_f64x2_splat [AVX]
|
||||
ipint_simd_f64x2_sqrt [AVX]
|
||||
ipint_simd_f64x2_sub [AVX]
|
||||
ipint_simd_f64x2_trunc [AVX]
|
||||
ipint_simd_i16x8_abs [AVX]
|
||||
ipint_simd_i16x8_add [AVX]
|
||||
ipint_simd_i16x8_add_sat_s [AVX]
|
||||
ipint_simd_i16x8_add_sat_u [AVX]
|
||||
ipint_simd_i16x8_all_true [AVX]
|
||||
ipint_simd_i16x8_avgr_u [AVX]
|
||||
ipint_simd_i16x8_eq [AVX]
|
||||
ipint_simd_i16x8_extadd_pairwise_i8x16_s [AVX]
|
||||
ipint_simd_i16x8_extadd_pairwise_i8x16_u [AVX]
|
||||
ipint_simd_i16x8_extend_high_i8x16_s [AVX]
|
||||
ipint_simd_i16x8_extend_high_i8x16_u [AVX]
|
||||
ipint_simd_i16x8_extend_low_i8x16_s [AVX]
|
||||
ipint_simd_i16x8_extend_low_i8x16_u [AVX]
|
||||
ipint_simd_i16x8_extmul_high_i8x16_s [AVX]
|
||||
ipint_simd_i16x8_extmul_high_i8x16_u [AVX]
|
||||
ipint_simd_i16x8_extmul_low_i8x16_s [AVX]
|
||||
ipint_simd_i16x8_extmul_low_i8x16_u [AVX]
|
||||
ipint_simd_i16x8_ge_s [AVX]
|
||||
ipint_simd_i16x8_ge_u [AVX]
|
||||
ipint_simd_i16x8_gt_s [AVX]
|
||||
ipint_simd_i16x8_gt_u [AVX]
|
||||
ipint_simd_i16x8_le_s [AVX]
|
||||
ipint_simd_i16x8_le_u [AVX]
|
||||
ipint_simd_i16x8_lt_s [AVX]
|
||||
ipint_simd_i16x8_lt_u [AVX]
|
||||
ipint_simd_i16x8_max_s [AVX]
|
||||
ipint_simd_i16x8_max_u [AVX]
|
||||
ipint_simd_i16x8_min_s [AVX]
|
||||
ipint_simd_i16x8_min_u [AVX]
|
||||
ipint_simd_i16x8_mul [AVX]
|
||||
ipint_simd_i16x8_narrow_i32x4_s [AVX]
|
||||
ipint_simd_i16x8_narrow_i32x4_u [AVX]
|
||||
ipint_simd_i16x8_ne [AVX]
|
||||
ipint_simd_i16x8_neg [AVX]
|
||||
ipint_simd_i16x8_q15mulr_sat_s [AVX]
|
||||
ipint_simd_i16x8_shl [AVX]
|
||||
ipint_simd_i16x8_shr_s [AVX]
|
||||
ipint_simd_i16x8_shr_u [AVX]
|
||||
ipint_simd_i16x8_splat [AVX]
|
||||
ipint_simd_i16x8_sub [AVX]
|
||||
ipint_simd_i16x8_sub_sat_s [AVX]
|
||||
ipint_simd_i16x8_sub_sat_u [AVX]
|
||||
ipint_simd_i32x4_abs [AVX]
|
||||
ipint_simd_i32x4_add [AVX]
|
||||
ipint_simd_i32x4_all_true [AVX]
|
||||
ipint_simd_i32x4_dot_i16x8_s [AVX]
|
||||
ipint_simd_i32x4_eq [AVX]
|
||||
ipint_simd_i32x4_extadd_pairwise_i16x8_s [AVX]
|
||||
ipint_simd_i32x4_extadd_pairwise_i16x8_u [AVX]
|
||||
ipint_simd_i32x4_extend_high_i16x8_s [AVX]
|
||||
ipint_simd_i32x4_extend_high_i16x8_u [AVX]
|
||||
ipint_simd_i32x4_extend_low_i16x8_s [AVX]
|
||||
ipint_simd_i32x4_extend_low_i16x8_u [AVX]
|
||||
ipint_simd_i32x4_extmul_high_i16x8_s [AVX]
|
||||
ipint_simd_i32x4_extmul_high_i16x8_u [AVX]
|
||||
ipint_simd_i32x4_extmul_low_i16x8_s [AVX]
|
||||
ipint_simd_i32x4_extmul_low_i16x8_u [AVX]
|
||||
ipint_simd_i32x4_ge_s [AVX]
|
||||
ipint_simd_i32x4_ge_u [AVX]
|
||||
ipint_simd_i32x4_gt_s [AVX]
|
||||
ipint_simd_i32x4_gt_u [AVX]
|
||||
ipint_simd_i32x4_le_s [AVX]
|
||||
ipint_simd_i32x4_le_u [AVX]
|
||||
ipint_simd_i32x4_lt_s [AVX]
|
||||
ipint_simd_i32x4_lt_u [AVX]
|
||||
ipint_simd_i32x4_max_s [AVX]
|
||||
ipint_simd_i32x4_max_u [AVX]
|
||||
ipint_simd_i32x4_min_s [AVX]
|
||||
ipint_simd_i32x4_min_u [AVX]
|
||||
ipint_simd_i32x4_mul [AVX]
|
||||
ipint_simd_i32x4_ne [AVX]
|
||||
ipint_simd_i32x4_neg [AVX]
|
||||
ipint_simd_i32x4_shl [AVX]
|
||||
ipint_simd_i32x4_shr_s [AVX]
|
||||
ipint_simd_i32x4_shr_u [AVX]
|
||||
ipint_simd_i32x4_splat [AVX]
|
||||
ipint_simd_i32x4_sub [AVX]
|
||||
ipint_simd_i32x4_trunc_sat_f32x4_s [AVX]
|
||||
ipint_simd_i32x4_trunc_sat_f32x4_u [AVX]
|
||||
ipint_simd_i32x4_trunc_sat_f64x2_s_zero [AVX]
|
||||
ipint_simd_i32x4_trunc_sat_f64x2_u_zero [AVX]
|
||||
ipint_simd_i64x2_abs [AVX]
|
||||
ipint_simd_i64x2_add [AVX]
|
||||
ipint_simd_i64x2_all_true [AVX]
|
||||
ipint_simd_i64x2_eq [AVX]
|
||||
ipint_simd_i64x2_extend_high_i32x4_s [AVX]
|
||||
ipint_simd_i64x2_extend_high_i32x4_u [AVX]
|
||||
ipint_simd_i64x2_extend_low_i32x4_s [AVX]
|
||||
ipint_simd_i64x2_extend_low_i32x4_u [AVX]
|
||||
ipint_simd_i64x2_extmul_high_i32x4_s [AVX]
|
||||
ipint_simd_i64x2_extmul_high_i32x4_u [AVX]
|
||||
ipint_simd_i64x2_extmul_low_i32x4_s [AVX]
|
||||
ipint_simd_i64x2_extmul_low_i32x4_u [AVX]
|
||||
ipint_simd_i64x2_ge_s [AVX]
|
||||
ipint_simd_i64x2_gt_s [AVX]
|
||||
ipint_simd_i64x2_le_s [AVX]
|
||||
ipint_simd_i64x2_lt_s [AVX]
|
||||
ipint_simd_i64x2_ne [AVX]
|
||||
ipint_simd_i64x2_neg [AVX]
|
||||
ipint_simd_i64x2_shl [AVX]
|
||||
ipint_simd_i64x2_shr_u [AVX]
|
||||
ipint_simd_i64x2_splat [AVX]
|
||||
ipint_simd_i64x2_sub [AVX]
|
||||
ipint_simd_i8x16_abs [AVX]
|
||||
ipint_simd_i8x16_add [AVX]
|
||||
ipint_simd_i8x16_add_sat_s [AVX]
|
||||
ipint_simd_i8x16_add_sat_u [AVX]
|
||||
ipint_simd_i8x16_all_true [AVX]
|
||||
ipint_simd_i8x16_avgr_u [AVX]
|
||||
ipint_simd_i8x16_eq [AVX]
|
||||
ipint_simd_i8x16_ge_s [AVX]
|
||||
ipint_simd_i8x16_ge_u [AVX]
|
||||
ipint_simd_i8x16_gt_s [AVX]
|
||||
ipint_simd_i8x16_gt_u [AVX]
|
||||
ipint_simd_i8x16_le_s [AVX]
|
||||
ipint_simd_i8x16_le_u [AVX]
|
||||
ipint_simd_i8x16_lt_s [AVX]
|
||||
ipint_simd_i8x16_lt_u [AVX]
|
||||
ipint_simd_i8x16_max_s [AVX]
|
||||
ipint_simd_i8x16_max_u [AVX]
|
||||
ipint_simd_i8x16_min_s [AVX]
|
||||
ipint_simd_i8x16_min_u [AVX]
|
||||
ipint_simd_i8x16_narrow_i16x8_s [AVX]
|
||||
ipint_simd_i8x16_narrow_i16x8_u [AVX]
|
||||
ipint_simd_i8x16_ne [AVX]
|
||||
ipint_simd_i8x16_neg [AVX]
|
||||
ipint_simd_i8x16_popcnt [AVX]
|
||||
ipint_simd_i8x16_shl [AVX]
|
||||
ipint_simd_i8x16_shr_s [AVX]
|
||||
ipint_simd_i8x16_shr_u [AVX]
|
||||
ipint_simd_i8x16_splat [AVX]
|
||||
ipint_simd_i8x16_sub [AVX]
|
||||
ipint_simd_i8x16_sub_sat_s [AVX]
|
||||
ipint_simd_i8x16_sub_sat_u [AVX]
|
||||
ipint_simd_i8x16_swizzle [AVX]
|
||||
ipint_simd_v128_and [AVX]
|
||||
ipint_simd_v128_andnot [AVX]
|
||||
ipint_simd_v128_any_true [AVX]
|
||||
ipint_simd_v128_bitselect [AVX]
|
||||
ipint_simd_v128_load16_splat_mem [AVX]
|
||||
ipint_simd_v128_load32_splat_mem [AVX]
|
||||
ipint_simd_v128_load64_splat_mem [AVX]
|
||||
ipint_simd_v128_load8_splat_mem [AVX]
|
||||
ipint_simd_v128_not [AVX]
|
||||
ipint_simd_v128_or [AVX]
|
||||
ipint_simd_v128_xor [AVX]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# JSC MacroAssembler probe trampoline.
|
||||
# (1 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
ctiMasmProbeTrampolineAVX [AVX]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# Bun's Highway SIMD. Gate: HWY_DYNAMIC_DISPATCH via hwy::SupportedTargets.
|
||||
# (72 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
_ZN3bun10N_AVX3_SPR10MemMemImplEPKhmS2_m [AVX, AVX512BW, AVX512F, BMI1]
|
||||
_ZN3bun10N_AVX3_SPR15CopyU16ToU8ImplEPKtmPh [AVX, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI]
|
||||
_ZN3bun10N_AVX3_SPR15IndexOfCharImplEPKhmh [AVX, AVX512BW, BMI2]
|
||||
_ZN3bun10N_AVX3_SPR18IndexOfAnyCharImplEPKhmS2_m [AVX, AVX512BW, AVX512F, AVX512VL, AVX512_FP16]
|
||||
_ZN3bun10N_AVX3_SPR20FillWithSkipMaskImplEPKhmPhS2_mb [AVX, AVX512DQ, AVX512F]
|
||||
_ZN3bun10N_AVX3_SPR28IndexOfNewlineOrNonASCIIImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun10N_AVX3_SPR35IndexOfSpaceOrNewlineOrNonASCIIImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun10N_AVX3_SPR36ContainsNewlineOrNonASCIIOrQuoteImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun10N_AVX3_SPR38IndexOfNewlineOrNonASCIIOrHashOrAtImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun10N_AVX3_SPR46IndexOfInterestingCharacterInStringLiteralImplEPKhmh [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun10N_AVX3_SPR46IndexOfNeedsEscapeForJavaScriptStringImplQuoteEPKhmh [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun10N_AVX3_SPR49IndexOfNeedsEscapeForJavaScriptStringImplBacktickEPKhmh [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun11N_AVX3_ZEN410MemMemImplEPKhmS2_m [AVX, AVX512BW, AVX512F, BMI1]
|
||||
_ZN3bun11N_AVX3_ZEN415CopyU16ToU8ImplEPKtmPh [AVX, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI]
|
||||
_ZN3bun11N_AVX3_ZEN415IndexOfCharImplEPKhmh [AVX, AVX512BW, BMI2]
|
||||
_ZN3bun11N_AVX3_ZEN418IndexOfAnyCharImplEPKhmS2_m [AVX, AVX512BW, AVX512F, AVX512VL]
|
||||
_ZN3bun11N_AVX3_ZEN420FillWithSkipMaskImplEPKhmPhS2_mb [AVX, AVX512DQ, AVX512F]
|
||||
_ZN3bun11N_AVX3_ZEN428IndexOfNewlineOrNonASCIIImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun11N_AVX3_ZEN435IndexOfSpaceOrNewlineOrNonASCIIImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun11N_AVX3_ZEN436ContainsNewlineOrNonASCIIOrQuoteImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun11N_AVX3_ZEN438IndexOfNewlineOrNonASCIIOrHashOrAtImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun11N_AVX3_ZEN446IndexOfInterestingCharacterInStringLiteralImplEPKhmh [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun11N_AVX3_ZEN446IndexOfNeedsEscapeForJavaScriptStringImplQuoteEPKhmh [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun11N_AVX3_ZEN449IndexOfNeedsEscapeForJavaScriptStringImplBacktickEPKhmh [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun6N_AVX210MemMemImplEPKhmS2_m [AVX, AVX2]
|
||||
_ZN3bun6N_AVX215CopyU16ToU8ImplEPKtmPh [AVX, AVX2]
|
||||
_ZN3bun6N_AVX215IndexOfCharImplEPKhmh [AVX, AVX2]
|
||||
_ZN3bun6N_AVX218IndexOfAnyCharImplEPKhmS2_m [AVX, AVX2]
|
||||
_ZN3bun6N_AVX220FillWithSkipMaskImplEPKhmPhS2_mb [AVX]
|
||||
_ZN3bun6N_AVX228IndexOfNewlineOrNonASCIIImplEPKhm [AVX, AVX2]
|
||||
_ZN3bun6N_AVX235IndexOfSpaceOrNewlineOrNonASCIIImplEPKhm [AVX, AVX2]
|
||||
_ZN3bun6N_AVX236ContainsNewlineOrNonASCIIOrQuoteImplEPKhm [AVX, AVX2]
|
||||
_ZN3bun6N_AVX238IndexOfNewlineOrNonASCIIOrHashOrAtImplEPKhm [AVX, AVX2]
|
||||
_ZN3bun6N_AVX246IndexOfInterestingCharacterInStringLiteralImplEPKhmh [AVX, AVX2]
|
||||
_ZN3bun6N_AVX246IndexOfNeedsEscapeForJavaScriptStringImplQuoteEPKhmh [AVX, AVX2]
|
||||
_ZN3bun6N_AVX249IndexOfNeedsEscapeForJavaScriptStringImplBacktickEPKhmh [AVX, AVX2]
|
||||
_ZN3bun6N_AVX310MemMemImplEPKhmS2_m [AVX, AVX512BW, AVX512F, BMI1]
|
||||
_ZN3bun6N_AVX315CopyU16ToU8ImplEPKtmPh [AVX, AVX512BW, AVX512F, AVX512VL]
|
||||
_ZN3bun6N_AVX315IndexOfCharImplEPKhmh [AVX, AVX512BW, BMI2]
|
||||
_ZN3bun6N_AVX318IndexOfAnyCharImplEPKhmS2_m [AVX, AVX512BW, AVX512F, AVX512VL]
|
||||
_ZN3bun6N_AVX320FillWithSkipMaskImplEPKhmPhS2_mb [AVX, AVX512DQ, AVX512F]
|
||||
_ZN3bun6N_AVX328IndexOfNewlineOrNonASCIIImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun6N_AVX335IndexOfSpaceOrNewlineOrNonASCIIImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun6N_AVX336ContainsNewlineOrNonASCIIOrQuoteImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun6N_AVX338IndexOfNewlineOrNonASCIIOrHashOrAtImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun6N_AVX346IndexOfInterestingCharacterInStringLiteralImplEPKhmh [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun6N_AVX346IndexOfNeedsEscapeForJavaScriptStringImplQuoteEPKhmh [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun6N_AVX349IndexOfNeedsEscapeForJavaScriptStringImplBacktickEPKhmh [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun9N_AVX10_210MemMemImplEPKhmS2_m [AVX, AVX512BW, AVX512F, BMI1]
|
||||
_ZN3bun9N_AVX10_215CopyU16ToU8ImplEPKtmPh [AVX, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI]
|
||||
_ZN3bun9N_AVX10_215IndexOfCharImplEPKhmh [AVX, AVX512BW, BMI2]
|
||||
_ZN3bun9N_AVX10_218IndexOfAnyCharImplEPKhmS2_m [AVX, AVX512BW, AVX512F, AVX512VL, AVX512_FP16]
|
||||
_ZN3bun9N_AVX10_220FillWithSkipMaskImplEPKhmPhS2_mb [AVX, AVX512DQ, AVX512F]
|
||||
_ZN3bun9N_AVX10_228IndexOfNewlineOrNonASCIIImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun9N_AVX10_235IndexOfSpaceOrNewlineOrNonASCIIImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun9N_AVX10_236ContainsNewlineOrNonASCIIOrQuoteImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun9N_AVX10_238IndexOfNewlineOrNonASCIIOrHashOrAtImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun9N_AVX10_246IndexOfInterestingCharacterInStringLiteralImplEPKhmh [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun9N_AVX10_246IndexOfNeedsEscapeForJavaScriptStringImplQuoteEPKhmh [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun9N_AVX10_249IndexOfNeedsEscapeForJavaScriptStringImplBacktickEPKhmh [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun9N_AVX3_DL10MemMemImplEPKhmS2_m [AVX, AVX512BW, AVX512F, BMI1]
|
||||
_ZN3bun9N_AVX3_DL15CopyU16ToU8ImplEPKtmPh [AVX, AVX512BW, AVX512F, AVX512VL, AVX512_VBMI]
|
||||
_ZN3bun9N_AVX3_DL15IndexOfCharImplEPKhmh [AVX, AVX512BW, BMI2]
|
||||
_ZN3bun9N_AVX3_DL18IndexOfAnyCharImplEPKhmS2_m [AVX, AVX512BW, AVX512F, AVX512VL]
|
||||
_ZN3bun9N_AVX3_DL20FillWithSkipMaskImplEPKhmPhS2_mb [AVX, AVX512DQ, AVX512F]
|
||||
_ZN3bun9N_AVX3_DL28IndexOfNewlineOrNonASCIIImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun9N_AVX3_DL35IndexOfSpaceOrNewlineOrNonASCIIImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun9N_AVX3_DL36ContainsNewlineOrNonASCIIOrQuoteImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun9N_AVX3_DL38IndexOfNewlineOrNonASCIIOrHashOrAtImplEPKhm [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun9N_AVX3_DL46IndexOfInterestingCharacterInStringLiteralImplEPKhmh [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun9N_AVX3_DL46IndexOfNeedsEscapeForJavaScriptStringImplQuoteEPKhmh [AVX, AVX512BW, AVX512F]
|
||||
_ZN3bun9N_AVX3_DL49IndexOfNeedsEscapeForJavaScriptStringImplBacktickEPKhmh [AVX, AVX512BW, AVX512F]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# BoringSSL AES. Gate: OPENSSL_ia32cap_P.
|
||||
# (26 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
_aesni_ctr32_6x [AES, AVX]
|
||||
_aesni_ctr32_ghash_6x [AES, AVX, MOVBE, PCLMULQDQ]
|
||||
_aesni_decrypt2 [AES]
|
||||
_aesni_decrypt3 [AES]
|
||||
_aesni_decrypt4 [AES]
|
||||
_aesni_decrypt6 [AES]
|
||||
_aesni_decrypt8 [AES]
|
||||
_aesni_encrypt2 [AES]
|
||||
_aesni_encrypt3 [AES]
|
||||
_aesni_encrypt4 [AES]
|
||||
_aesni_encrypt6 [AES]
|
||||
_aesni_encrypt8 [AES]
|
||||
aes_gcm_dec_update_vaes_avx2 [AVX, AVX2, PCLMULQDQ, VAES, VPCLMULQDQ]
|
||||
aes_gcm_dec_update_vaes_avx512 [AVX, AVX512BW, AVX512F, AVX512VL, BMI2, VAES, VPCLMULQDQ]
|
||||
aes_gcm_enc_update_vaes_avx2 [AVX, AVX2, PCLMULQDQ, VAES, VPCLMULQDQ]
|
||||
aes_gcm_enc_update_vaes_avx512 [AVX, AVX512BW, AVX512F, AVX512VL, BMI2, VAES, VPCLMULQDQ]
|
||||
aes_hw_cbc_encrypt [AES]
|
||||
aes_hw_ctr32_encrypt_blocks [AES]
|
||||
aes_hw_decrypt [AES]
|
||||
aes_hw_ecb_encrypt [AES]
|
||||
aes_hw_encrypt [AES]
|
||||
aes_hw_encrypt_key_to_decrypt_key [AES]
|
||||
aes_hw_set_encrypt_key_alt [AES]
|
||||
aes_hw_set_encrypt_key_base [AES]
|
||||
aesni_gcm_decrypt [AVX]
|
||||
aesni_gcm_encrypt [AVX, PCLMULQDQ]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# BoringSSL SHA. Gate: OPENSSL_ia32cap_P.
|
||||
# (6 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
sha1_block_data_order_avx [AVX]
|
||||
sha1_block_data_order_avx2 [AVX, AVX2, BMI1, BMI2]
|
||||
sha1_block_data_order_hw [SHA]
|
||||
sha256_block_data_order_avx [AVX]
|
||||
sha256_block_data_order_hw [SHA]
|
||||
sha512_block_data_order_avx [AVX]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# BoringSSL ChaCha20.
|
||||
# (3 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
ChaCha20_ctr32_avx2 [AVX, AVX2]
|
||||
chacha20_poly1305_open_avx2 [AVX, AVX2, BMI2]
|
||||
chacha20_poly1305_seal_avx2 [AVX, AVX2, BMI2]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# BoringSSL GCM ghash.
|
||||
# (11 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
gcm_ghash_avx [AVX, PCLMULQDQ]
|
||||
gcm_ghash_clmul [PCLMULQDQ]
|
||||
gcm_ghash_vpclmulqdq_avx2 [AVX, AVX2, PCLMULQDQ, VPCLMULQDQ]
|
||||
gcm_ghash_vpclmulqdq_avx512 [AVX, AVX512BW, AVX512F, AVX512VL, PCLMULQDQ, VPCLMULQDQ]
|
||||
gcm_gmult_clmul [PCLMULQDQ]
|
||||
gcm_gmult_vpclmulqdq_avx2 [AVX, PCLMULQDQ]
|
||||
gcm_gmult_vpclmulqdq_avx512 [AVX, AVX512F, AVX512VL, PCLMULQDQ]
|
||||
gcm_init_avx [AVX, PCLMULQDQ]
|
||||
gcm_init_clmul [PCLMULQDQ]
|
||||
gcm_init_vpclmulqdq_avx2 [AVX, AVX2, PCLMULQDQ, VPCLMULQDQ]
|
||||
gcm_init_vpclmulqdq_avx512 [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, PCLMULQDQ, VPCLMULQDQ]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# BoringSSL bignum (MULX/ADX).
|
||||
# (16 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
__bn_postx4x_internal [BMI1]
|
||||
__bn_sqrx8x_reduction [ADX, BMI2]
|
||||
__ecp_nistz256_mul_montx [ADX, BMI2]
|
||||
__ecp_nistz256_sqr_montx [ADX, BMI2]
|
||||
beeu_mod_inverse_vartime [AVX]
|
||||
bn_mulx4x_mont [ADX, BMI2]
|
||||
bn_sqrx8x_internal [ADX, BMI2]
|
||||
ecp_nistz256_ord_mul_mont_adx [ADX, BMI2]
|
||||
ecp_nistz256_ord_sqr_mont_adx [ADX, BMI2]
|
||||
ecp_nistz256_select_w5_avx2 [AVX, AVX2]
|
||||
ecp_nistz256_select_w7_avx2 [AVX, AVX2]
|
||||
mulx4x_internal [ADX, BMI2]
|
||||
rsaz_1024_gather5_avx2 [AVX, AVX2]
|
||||
rsaz_1024_mul_avx2 [AVX, AVX2]
|
||||
rsaz_1024_scatter5_avx2 [AVX, AVX2]
|
||||
rsaz_1024_sqr_avx2 [AVX, AVX2]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# BoringSSL Curve25519.
|
||||
# (3 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
fiat_curve25519_adx_mul [ADX, BMI2]
|
||||
fiat_curve25519_adx_square [ADX, BMI2]
|
||||
x25519_scalar_mult_adx [BMI2]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# BoringSSL RDRAND.
|
||||
# (2 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
CRYPTO_rdrand [RDRAND]
|
||||
CRYPTO_rdrand_multiple8_buf [RDRAND]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# zstd Huffman/FSE BMI2. Gate: ZSTD_cpuid().
|
||||
# (19 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
FSE_decompress_wksp_body_bmi2 [BMI2, LZCNT]
|
||||
FSE_readNCount_body_bmi2 [BMI2, LZCNT]
|
||||
HUF_compress1X_usingCTable_internal_bmi2 [BMI2]
|
||||
HUF_decompress1X1_usingDTable_internal_bmi2 [BMI2, LZCNT]
|
||||
HUF_decompress1X2_usingDTable_internal_bmi2 [BMI2, LZCNT]
|
||||
HUF_decompress4X1_usingDTable_internal_bmi2 [BMI2, LZCNT]
|
||||
HUF_decompress4X1_usingDTable_internal_fast [BMI2]
|
||||
HUF_decompress4X1_usingDTable_internal_fast_asm_loop [BMI2]
|
||||
HUF_decompress4X1_usingDTable_internal_fast_c_loop [BMI2]
|
||||
HUF_decompress4X2_usingDTable_internal_bmi2 [BMI2, LZCNT]
|
||||
HUF_decompress4X2_usingDTable_internal_fast [BMI2]
|
||||
HUF_decompress4X2_usingDTable_internal_fast_asm_loop [BMI2]
|
||||
HUF_decompress4X2_usingDTable_internal_fast_c_loop [BMI2]
|
||||
HUF_readStats_body_bmi2 [BMI2, LZCNT]
|
||||
ZSTD_buildFSETable_body_bmi2 [BMI2]
|
||||
ZSTD_decompressSequencesLong_bmi2 [BMI1, BMI2, LZCNT]
|
||||
ZSTD_decompressSequencesSplitLitBuffer_bmi2 [BMI1, BMI2, LZCNT]
|
||||
ZSTD_decompressSequences_bmi2 [BMI1, BMI2, LZCNT]
|
||||
ZSTD_encodeSequences_bmi2 [BMI2]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# libdeflate. Gate: libdeflate_init_x86_cpu_features.
|
||||
# (10 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
adler32_x86_avx2 [AVX, AVX2]
|
||||
adler32_x86_avx2_vnni [AVX, AVX2, AVX_VNNI]
|
||||
adler32_x86_avx512_vl256_vnni [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, AVX512_VNNI]
|
||||
adler32_x86_avx512_vl512_vnni [AVX, AVX2, AVX512BW, AVX512F, AVX512_VNNI]
|
||||
crc32_x86_pclmulqdq [PCLMULQDQ]
|
||||
crc32_x86_pclmulqdq_avx [AVX, PCLMULQDQ]
|
||||
crc32_x86_vpclmulqdq_avx2 [AVX, AVX2, PCLMULQDQ, VPCLMULQDQ]
|
||||
crc32_x86_vpclmulqdq_avx512_vl256 [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, PCLMULQDQ, VPCLMULQDQ]
|
||||
crc32_x86_vpclmulqdq_avx512_vl512 [AVX, AVX2, AVX512BW, AVX512F, AVX512VL, PCLMULQDQ, VPCLMULQDQ]
|
||||
deflate_decompress_bmi2 [BMI2]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# zlib crc32 PCLMULQDQ.
|
||||
# (1 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
crc32 [PCLMULQDQ]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# Rust compiler-builtins libm FMA. ifunc-style dispatch.
|
||||
# (2 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
_RNvNtNtNtNtNt<rust-hash>17compiler_builtins4math9libm_math4arch3x863fma12fma_with_fma [FMA]
|
||||
_RNvNtNtNtNtNt<rust-hash>17compiler_builtins4math9libm_math4arch3x863fma13fma_with_fma4 [FMA4]
|
||||
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
# Rust memchr AVX2 (via lolhtml deps). Gate: is_x86_feature_detected!.
|
||||
# (6 symbols)
|
||||
# ----------------------------------------------------------------------------
|
||||
_RNvMNtNtNtNt<rust-hash>6memchr4arch6x86_644avx26memchrNtB2_3One13find_raw_avx2 [AVX, AVX2]
|
||||
_RNvMs2_NtNtNtNt<rust-hash>6memchr4arch6x86_644avx26memchrNtB5_3Two13find_raw_avx2 [AVX, AVX2]
|
||||
_RNvMs6_NtNtNtNt<rust-hash>6memchr4arch6x86_644avx26memchrNtB5_5Three13find_raw_avx2 [AVX, AVX2]
|
||||
_RNvNvNtNtNt<rust-hash>6memchr4arch6x86_646memchr10memchr_raw9find_avx2 [AVX, AVX2]
|
||||
_RNvNvNtNtNt<rust-hash>6memchr4arch6x86_646memchr11memchr2_raw9find_avx2 [AVX, AVX2]
|
||||
_RNvNvNtNtNt<rust-hash>6memchr4arch6x86_646memchr11memchr3_raw9find_avx2 [AVX, AVX2]
|
||||
334
scripts/verify-baseline-static/src/aarch64.rs
Normal file
334
scripts/verify-baseline-static/src/aarch64.rs
Normal file
@@ -0,0 +1,334 @@
|
||||
//! AArch64 baseline verification by raw encoding-pattern matching.
|
||||
//!
|
||||
//! Unlike x64, ARM64 has fixed-width 32-bit instructions and a dense,
|
||||
//! well-partitioned encoding space. We don't need a disassembler: iterating
|
||||
//! u32 words over .text and checking a handful of bit-masks is exact.
|
||||
//!
|
||||
//! Target: `armv8-a+crc` (Cortex-A53), matching cmake/CompilerFlags.cmake:29
|
||||
//! (`-march=armv8-a+crc`) and verify-baseline.ts's QEMU `-cpu cortex-a53`.
|
||||
//!
|
||||
//! All masks below were derived empirically by assembling a fixture with each
|
||||
//! instruction class and cross-referencing the ARM Architecture Reference
|
||||
//! Manual (DDI 0487). See the inline comments for the bit-field breakdown.
|
||||
|
||||
#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash, PartialOrd, Ord)]
|
||||
pub enum Feature {
|
||||
/// Large System Extensions (ARMv8.1-A). CAS, CASP, SWP, LDADD/LDCLR/LDEOR/
|
||||
/// LDSET/LD{S,U}{MAX,MIN} and their ST* store-only variants. By far the
|
||||
/// most likely accidental hit: compilers emit inline CAS for atomics when
|
||||
/// `-march=armv8.1-a` or higher leaks through; with `-march=armv8-a` you
|
||||
/// get `__aarch64_cas*` outline helpers (libgcc/compiler-rt) that dispatch
|
||||
/// at runtime via AT_HWCAP.
|
||||
Lse,
|
||||
/// Scalable Vector Extension (ARMv8.2-A+). The entire op0=0010 encoding
|
||||
/// space is reserved for SVE — one mask catches all of it.
|
||||
Sve,
|
||||
/// RCPC (ARMv8.3-A). LDAPR weak-acquire loads. Rare in practice; emitted
|
||||
/// by Rust with `-C target-feature=+rcpc` or certain C++ atomics.
|
||||
Rcpc,
|
||||
/// DotProd (ARMv8.2-A optional). SDOT/UDOT i8→i32 accumulate. ML kernels.
|
||||
DotProd,
|
||||
/// JSCVT (ARMv8.3-A). FJCVTZS: JavaScript-semantics double-to-int32
|
||||
/// truncation. Watch this one — JSC's JIT uses it when available and the
|
||||
/// MacroAssembler may have a stub.
|
||||
Jscvt,
|
||||
/// RDM (ARMv8.1-A). SQRDMLAH/SQRDMLSH. DSP fixed-point stuff, unlikely.
|
||||
Rdm,
|
||||
/// Non-hint pointer authentication (ARMv8.3-A). LDRAA/LDRAB load with an
|
||||
/// embedded PAC check. Unlike PACIASP/AUTIASP/BTI (which are HINT-space
|
||||
/// and NOP on older CPUs by design), these *fault* on non-PAC hardware.
|
||||
PacNonHint,
|
||||
}
|
||||
|
||||
impl Feature {
|
||||
pub fn name(self) -> &'static str {
|
||||
match self {
|
||||
Feature::Lse => "LSE",
|
||||
Feature::Sve => "SVE",
|
||||
Feature::Rcpc => "RCPC",
|
||||
Feature::DotProd => "DotProd",
|
||||
Feature::Jscvt => "JSCVT",
|
||||
Feature::Rdm => "RDM",
|
||||
Feature::PacNonHint => "PAC(non-hint)",
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/// Classify one 32-bit instruction word. Returns None if it's within
|
||||
/// armv8-a+crc, Some(feature) if it requires something newer.
|
||||
///
|
||||
/// Check order is roughly by expected frequency (most SVE words are bulk
|
||||
/// data-plane code, so cheap to bail on early; LSE leaks are next most
|
||||
/// likely).
|
||||
pub fn classify(w: u32) -> Option<Feature> {
|
||||
// ---- SVE ----
|
||||
// ARM ARM top-level decode: op0[28:25]=0010 is the SVE encoding space.
|
||||
// Nothing in ARMv8.0-A occupies it. One mask, exact.
|
||||
// ptrue p0.b : 2518e3e0 & 1E000000 = 04000000 ✓
|
||||
// ld1b {z0.b}, p0/z : a400a000 & 1E000000 = 04000000 ✓
|
||||
// add z0.b,z0.b,z1.b: 04210000 & 1E000000 = 04000000 ✓
|
||||
// ldxr (v8.0) : c85f7c20 & 1E000000 = 08000000 ✗
|
||||
// addv (NEON, v8.0) : 4eb1b820 & 1E000000 = 0e000000 ✗
|
||||
if w & 0x1E000000 == 0x04000000 {
|
||||
return Some(Feature::Sve);
|
||||
}
|
||||
|
||||
// ---- LSE: CAS / CASP family ----
|
||||
// CAS: size[31:30] 001000[29:24] 1[23] L[22] 1[21] Rs 11111[14:10] Rn Rt
|
||||
// CASP: 0[31] sz[30] 001000[29:24] L[23] 0[22] 1[21] Rs 11111[14:10] Rn Rt
|
||||
//
|
||||
// v8.0's STXP/STLXP/LDXP/LDAXP share [29:24]=001000, [21]=1, and when
|
||||
// their Rt2 field is XZR (register 31) they also have [14:10]=11111.
|
||||
// Observed colliding in the wild: `stxp w9, xzr, xzr, [x8]` = c8297d1f
|
||||
// inside libpas. The disambiguator from the ARM ARM:
|
||||
// - CAS has [23]=1 fixed (the L bit is at [22])
|
||||
// - CASP has [31]=0 fixed (CASP is 32/64-bit only, no byte/half)
|
||||
// - STXP/LDXP have [31]=1 AND [23]=0
|
||||
// So: LSE iff NOT ([31]=1 AND [23]=0).
|
||||
// cas : c8a07c41 [31]=1 [23]=1 ✓ casal : 88e0fc41 [31]=1 [23]=1 ✓
|
||||
// casb : 08a07c41 [31]=0 ✓ casp : 48207c82 [31]=0 ✓
|
||||
// stxp : c8297d1f [31]=1 [23]=0 ✗ (v8.0, correctly excluded)
|
||||
// ldxr : c85f7c20 [21]=0, outer mask excludes
|
||||
if w & 0x3F207C00 == 0x08207C00 {
|
||||
let is_v80_exclusive_pair = (w & 0x80000000) != 0 && (w & 0x00800000) == 0;
|
||||
if !is_v80_exclusive_pair {
|
||||
return Some(Feature::Lse);
|
||||
}
|
||||
}
|
||||
|
||||
// ---- LSE: atomic memory ops (LDADD/LDCLR/LDEOR/LDSET/LD{S,U}{MAX,MIN}/SWP) ----
|
||||
// Encoding: size[31:30] 111[29:27] V[26]=0 00[25:24] A[23] R[22] 1[21]
|
||||
// Rs[20:16] o3[15] opc[14:12] 00[11:10] Rn Rt
|
||||
// Fix [29:27]=111, [26]=0, [25:24]=00, [21]=1, [11:10]=00.
|
||||
//
|
||||
// RCPC's LDAPR lives in the *same* encoding group (it's the o3=1 opc=100
|
||||
// Rs=11111 corner). Both are post-v8.0 so matching both is correct; we
|
||||
// sub-classify for the report.
|
||||
// swp : f8208041 ldadd : f8200041 stadd : f820003f ldapr : f8bfc020
|
||||
// ldraa (PAC, must NOT match): f8200420 → [10]=1, excluded
|
||||
// ldaprb: 38bfc020 → size differs but pattern holds
|
||||
if w & 0x3F200C00 == 0x38200000 {
|
||||
// RCPC sub-match: Rs=11111, o3=1, opc=100 (bits [20:12]=0xBFC >> 2).
|
||||
if w & 0x001FFC00 == 0x001FC000 {
|
||||
return Some(Feature::Rcpc);
|
||||
}
|
||||
return Some(Feature::Lse);
|
||||
}
|
||||
|
||||
// ---- LDRAA / LDRAB (PAC non-hint loads) ----
|
||||
// Encoding: 11111000[31:24] M[23] S[22] 1[21] imm9[20:12] W[11] 1[10] Rn Rt
|
||||
// Fix [31:24], [21], [10]. M (key A/B), S, imm9, W free.
|
||||
// ldraa : f8200420 ldrab (pre-index): f8a00c20
|
||||
// ldadd (must NOT match): f8200041 → [10]=0, excluded
|
||||
// Must come *after* the LSE atomic check because the LSE mask is strictly
|
||||
// more specific on [11:10]=00 — they can't both match the same word.
|
||||
if w & 0xFF200400 == 0xF8200400 {
|
||||
return Some(Feature::PacNonHint);
|
||||
}
|
||||
|
||||
// ---- DotProd: SDOT/UDOT (vector, by-vector form) ----
|
||||
// Encoding: 0[31] Q[30] U[29] 01110[28:24] 10[23:22] 0[21] Rm 100101[15:10] Rn Rd
|
||||
// Fix [28:24]=01110, [23:22]=10, [21]=0, [15:10]=100101. Q and U free.
|
||||
// sdot : 4e829420 udot : 6e829420
|
||||
// addv (NEON, must NOT match): 4eb1b820 → size and opc differ
|
||||
// sqrdmlah (RDM, must NOT match): 6e828420 → [12]=0 here, [12]=1 for DOT
|
||||
if w & 0x9FE0FC00 == 0x0E809400 {
|
||||
return Some(Feature::DotProd);
|
||||
}
|
||||
// By-element form: 0 Q U 01111 size L M Rm 1110 H 0 Rn Rd with size=10.
|
||||
// Only the size=10 variant is DotProd; other sizes are pre-existing SQDMLAL etc.
|
||||
// (not in the fixture; derived from ARM ARM table C4-312)
|
||||
if w & 0x9FC0F400 == 0x0F80E000 {
|
||||
return Some(Feature::DotProd);
|
||||
}
|
||||
|
||||
// ---- RDM: SQRDMLAH/SQRDMLSH (vector) ----
|
||||
// Encoding: 0 Q 1 01110 size 0 Rm 1000 S 1 Rn Rd
|
||||
// Fix [29]=1, [28:24]=01110, [21]=0, [15:12]=1000, [10]=1. Q, size, S free.
|
||||
// sqrdmlah : 6e828420 sqrdmlsh : 6e828c20
|
||||
if w & 0xBF20F400 == 0x2E008400 {
|
||||
return Some(Feature::Rdm);
|
||||
}
|
||||
|
||||
// ---- JSCVT: FJCVTZS ----
|
||||
// Single encoding: 0001 1110 0111 1110 0000 00 Rn Rd.
|
||||
// fjcvtzs : 1e7e0020
|
||||
if w & 0xFFFFFC00 == 0x1E7E0000 {
|
||||
return Some(Feature::Jscvt);
|
||||
}
|
||||
|
||||
// Deliberately NOT matched:
|
||||
// - PACIASP/AUTIASP/BTI and other hint-form PAC: HINT-space (d503xxxx),
|
||||
// architecturally defined to NOP on CPUs that don't recognize the
|
||||
// specific op2:CRm. Safe everywhere.
|
||||
// - ARMv8 Crypto Extension (AESE/AESD/SHA1*/SHA256*/PMULL): post-baseline
|
||||
// (+aes/+sha2 not in armv8-a+crc). Every known emitter (BoringSSL) is
|
||||
// runtime-dispatched via getauxval(AT_HWCAP). Add a Feature::Crypto
|
||||
// variant if an unconditional use ever shows up.
|
||||
// - FP16 arithmetic: genuinely post-v8.0 but the encoding overlaps the
|
||||
// NEON space in a way that requires tracking the `size` field across
|
||||
// many opcode families. Deferred until it shows up in a real scan.
|
||||
|
||||
None
|
||||
}
|
||||
|
||||
/// Best-effort mnemonic for the report. Not a disassembler — just enough to
|
||||
/// let a developer recognize what they're looking at without reaching for
|
||||
/// objdump. If unsure, fall back to the Feature name.
|
||||
pub fn rough_mnemonic(w: u32, feat: Feature) -> &'static str {
|
||||
match feat {
|
||||
Feature::Sve => "<sve>",
|
||||
Feature::Rcpc => "ldapr",
|
||||
Feature::Jscvt => "fjcvtzs",
|
||||
Feature::PacNonHint => {
|
||||
if w & 0x00800000 != 0 {
|
||||
"ldrab"
|
||||
} else {
|
||||
"ldraa"
|
||||
}
|
||||
}
|
||||
Feature::DotProd => {
|
||||
if w & 0x20000000 != 0 {
|
||||
"udot"
|
||||
} else {
|
||||
"sdot"
|
||||
}
|
||||
}
|
||||
Feature::Rdm => {
|
||||
if w & 0x00000800 != 0 {
|
||||
"sqrdmlsh"
|
||||
} else {
|
||||
"sqrdmlah"
|
||||
}
|
||||
}
|
||||
Feature::Lse => {
|
||||
// CAS family vs atomic-memory-op family.
|
||||
if w & 0x3F207C00 == 0x08207C00 {
|
||||
// Bit[23] discriminates: CASP has [23]=0, CAS has [23]=1.
|
||||
if w & 0x00800000 == 0 {
|
||||
"casp"
|
||||
} else {
|
||||
"cas"
|
||||
}
|
||||
} else {
|
||||
// Atomic memory ops: o3[15] + opc[14:12] picks the operation.
|
||||
match (w >> 12) & 0xF {
|
||||
0x0 => "ldadd",
|
||||
0x1 => "ldclr",
|
||||
0x2 => "ldeor",
|
||||
0x3 => "ldset",
|
||||
0x4 => "ldsmax",
|
||||
0x5 => "ldsmin",
|
||||
0x6 => "ldumax",
|
||||
0x7 => "ldumin",
|
||||
0x8 => "swp",
|
||||
_ => "<lse-atomic>",
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(test)]
|
||||
mod tests {
|
||||
use super::*;
|
||||
|
||||
// Encodings lifted from the assembled fixture (see aarch64-fixture.s).
|
||||
// Any change to the masks above must keep all of these green.
|
||||
|
||||
#[test]
|
||||
fn flags_lse_cas() {
|
||||
assert_eq!(classify(0xc8a07c41), Some(Feature::Lse)); // cas x
|
||||
assert_eq!(classify(0x88e0fc41), Some(Feature::Lse)); // casal w
|
||||
assert_eq!(classify(0x08a07c41), Some(Feature::Lse)); // casb
|
||||
assert_eq!(classify(0x48207c82), Some(Feature::Lse)); // casp
|
||||
assert_eq!(classify(0xc8e0fc41), Some(Feature::Lse)); // casal x
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn flags_lse_atomic_ops() {
|
||||
assert_eq!(classify(0xf8208041), Some(Feature::Lse)); // swp
|
||||
assert_eq!(classify(0xf8200041), Some(Feature::Lse)); // ldadd
|
||||
assert_eq!(classify(0xf8201041), Some(Feature::Lse)); // ldclr
|
||||
assert_eq!(classify(0xf8202041), Some(Feature::Lse)); // ldeor
|
||||
assert_eq!(classify(0xf8203041), Some(Feature::Lse)); // ldset
|
||||
assert_eq!(classify(0xf8204041), Some(Feature::Lse)); // ldsmax
|
||||
assert_eq!(classify(0xf8207041), Some(Feature::Lse)); // ldumin
|
||||
assert_eq!(classify(0xf820003f), Some(Feature::Lse)); // stadd
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn flags_sve() {
|
||||
assert_eq!(classify(0x2518e3e0), Some(Feature::Sve)); // ptrue
|
||||
assert_eq!(classify(0xa400a000), Some(Feature::Sve)); // ld1b
|
||||
assert_eq!(classify(0x04210000), Some(Feature::Sve)); // add z
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn flags_rcpc() {
|
||||
assert_eq!(classify(0xf8bfc020), Some(Feature::Rcpc)); // ldapr x
|
||||
assert_eq!(classify(0x38bfc020), Some(Feature::Rcpc)); // ldaprb
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn flags_dotprod() {
|
||||
assert_eq!(classify(0x4e829420), Some(Feature::DotProd)); // sdot
|
||||
assert_eq!(classify(0x6e829420), Some(Feature::DotProd)); // udot
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn flags_jscvt() {
|
||||
assert_eq!(classify(0x1e7e0020), Some(Feature::Jscvt)); // fjcvtzs
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn flags_rdm() {
|
||||
assert_eq!(classify(0x6e828420), Some(Feature::Rdm)); // sqrdmlah
|
||||
assert_eq!(classify(0x6e828c20), Some(Feature::Rdm)); // sqrdmlsh
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn flags_pac_nonhint() {
|
||||
assert_eq!(classify(0xf8200420), Some(Feature::PacNonHint)); // ldraa
|
||||
assert_eq!(classify(0xf8a00c20), Some(Feature::PacNonHint)); // ldrab
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn ignores_pac_hints() {
|
||||
// These are HINT-space; NOP on pre-PAC CPUs by architectural guarantee.
|
||||
assert_eq!(classify(0xd503233f), None); // paciasp
|
||||
assert_eq!(classify(0xd50323bf), None); // autiasp
|
||||
assert_eq!(classify(0xd503245f), None); // bti c
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn ignores_v8_0_baseline() {
|
||||
assert_eq!(classify(0xc85f7c20), None); // ldxr (v8.0 exclusive)
|
||||
assert_eq!(classify(0xc8027c20), None); // stxr
|
||||
assert_eq!(classify(0x9ac14c00), None); // crc32x (our +crc has this)
|
||||
assert_eq!(classify(0x1f420c20), None); // fmadd
|
||||
assert_eq!(classify(0x4eb1b820), None); // addv (NEON)
|
||||
assert_eq!(classify(0xc8dffc20), None); // ldar (v8.0 acquire)
|
||||
assert_eq!(classify(0xc89ffc20), None); // stlr (v8.0 release)
|
||||
assert_eq!(classify(0xd65f03c0), None); // ret
|
||||
// Regression: stxp with Rt2=xzr collided with CAS ([14:10]=11111).
|
||||
// Found in libpas (pas_segregated_page_construct).
|
||||
assert_eq!(classify(0xc8297d1f), None); // stxp w9, xzr, xzr, [x8]
|
||||
assert_eq!(classify(0xc87f251f), None); // ldxp xzr, x9, [x8]
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn mnemonics_are_sane() {
|
||||
assert_eq!(rough_mnemonic(0xf8208041, Feature::Lse), "swp");
|
||||
assert_eq!(rough_mnemonic(0xf8200041, Feature::Lse), "ldadd");
|
||||
assert_eq!(rough_mnemonic(0xc8a07c41, Feature::Lse), "cas");
|
||||
assert_eq!(rough_mnemonic(0x48207c82, Feature::Lse), "casp");
|
||||
assert_eq!(rough_mnemonic(0xf8bfc020, Feature::Rcpc), "ldapr");
|
||||
assert_eq!(rough_mnemonic(0x4e829420, Feature::DotProd), "sdot");
|
||||
assert_eq!(rough_mnemonic(0x6e829420, Feature::DotProd), "udot");
|
||||
assert_eq!(rough_mnemonic(0x6e828420, Feature::Rdm), "sqrdmlah");
|
||||
assert_eq!(rough_mnemonic(0x6e828c20, Feature::Rdm), "sqrdmlsh");
|
||||
assert_eq!(rough_mnemonic(0xf8200420, Feature::PacNonHint), "ldraa");
|
||||
assert_eq!(rough_mnemonic(0xf8a00c20, Feature::PacNonHint), "ldrab");
|
||||
}
|
||||
}
|
||||
1154
scripts/verify-baseline-static/src/main.rs
Normal file
1154
scripts/verify-baseline-static/src/main.rs
Normal file
File diff suppressed because it is too large
Load Diff
@@ -164,6 +164,51 @@ async function runTest(label: string, binaryArgs: string[], options?: RunTestOpt
|
||||
return false;
|
||||
}
|
||||
|
||||
// Phase 0: Static instruction scan (no emulation — disassembles the binary).
|
||||
// Catches instructions in code paths the emulator test below never executes.
|
||||
// Soft-skipped if the checker isn't built (dev without cargo).
|
||||
const staticCheckerExe = isWindows ? "verify-baseline-static.exe" : "verify-baseline-static";
|
||||
const staticChecker = join(scriptDir, "verify-baseline-static", "target", "release", staticCheckerExe);
|
||||
const staticAllowlistName = isWindows
|
||||
? "allowlist-x64-windows.txt"
|
||||
: isAarch64
|
||||
? "allowlist-aarch64.txt"
|
||||
: "allowlist-x64.txt";
|
||||
const staticAllowlist = join(scriptDir, "verify-baseline-static", staticAllowlistName);
|
||||
let staticViolations = "";
|
||||
|
||||
if (await Bun.file(staticChecker).exists()) {
|
||||
console.log("+++ Static instruction scan");
|
||||
const start = performance.now();
|
||||
const proc = Bun.spawn([staticChecker, "--binary", binary, "--allowlist", staticAllowlist], {
|
||||
stdout: "pipe",
|
||||
stderr: "inherit",
|
||||
});
|
||||
const [stdout, code] = await Promise.all([new Response(proc.stdout).text(), proc.exited]);
|
||||
const elapsed = ((performance.now() - start) / 1000).toFixed(1);
|
||||
console.log(stdout);
|
||||
|
||||
if (code === 0) {
|
||||
console.log(` PASS (${elapsed}s)`);
|
||||
passed++;
|
||||
} else if (code === 1) {
|
||||
// Pull just the VIOLATIONS block for the annotation — full stdout is in the log.
|
||||
const m = stdout.match(/^VIOLATIONS[^\n]*\n([\s\S]*?)\n(?:ALLOWLISTED|STALE|SUMMARY)/m);
|
||||
staticViolations = m ? m[1].trim() : stdout;
|
||||
console.log(` FAIL: static scan found post-baseline instructions outside the allowlist (${elapsed}s)`);
|
||||
instructionFailures++;
|
||||
failedTests.push("Static instruction scan");
|
||||
} else {
|
||||
console.log(` WARN: checker exited ${code} (${elapsed}s, tool error)`);
|
||||
otherFailures++;
|
||||
}
|
||||
console.log();
|
||||
} else {
|
||||
console.log("--- Skipping static instruction scan (not built)");
|
||||
console.log(" cargo build --release --manifest-path scripts/verify-baseline-static/Cargo.toml");
|
||||
console.log();
|
||||
}
|
||||
|
||||
// Phase 1: SIMD code path verification (always runs)
|
||||
const simdTestPath = join(repoRoot, "test", "js", "bun", "jsc-stress", "fixtures", "simd-baseline.test.ts");
|
||||
await runTest("SIMD baseline tests", ["test", simdTestPath], { live: true });
|
||||
@@ -217,13 +262,30 @@ if (instructionFailures > 0) {
|
||||
: isAarch64
|
||||
? "Linux aarch64"
|
||||
: "Linux x64";
|
||||
const annotation = [
|
||||
`<details>`,
|
||||
`<summary>CPU instruction violation on ${platform} — ${instructionFailures} failed</summary>`,
|
||||
`<p>The baseline build uses instructions not available on <code>${config.cpuDesc}</code>.</p>`,
|
||||
const parts = [
|
||||
`<details open>`,
|
||||
`<summary>❌ CPU instruction violation on <b>${platform}</b> — ${instructionFailures} check(s) failed</summary>`,
|
||||
`<p>The baseline build contains instructions not available on <code>${config.cpuDesc}</code>.</p>`,
|
||||
`<ul>${failedTests.map(t => `<li><code>${t}</code></li>`).join("")}</ul>`,
|
||||
`</details>`,
|
||||
].join("\n");
|
||||
];
|
||||
if (staticViolations) {
|
||||
// Cap the inline block so a -march= leak (thousands of symbols) doesn't
|
||||
// produce a multi-MB annotation. Full output is in the step log.
|
||||
const lines = staticViolations.split("\n");
|
||||
const shown =
|
||||
lines.length > 80 ? [...lines.slice(0, 80), `... ${lines.length - 80} more lines (see step log)`] : lines;
|
||||
parts.push(
|
||||
`<h4>Static scan violations</h4>`,
|
||||
`<pre><code>${shown.join("\n").replace(/</g, "<")}</code></pre>`,
|
||||
`<p><b>If these are runtime-dispatched behind a CPUID gate:</b> add each symbol to`,
|
||||
`<code>scripts/verify-baseline-static/${staticAllowlistName}</code> with a comment pointing at the gate.`,
|
||||
`Feature ceilings (the <code>[FEAT, ...]</code> bracket) should list what the gate checks.</p>`,
|
||||
`<p><b>If there's no gate:</b> this is a real bug — a <code>-march</code> leaked into a subbuild.`,
|
||||
`Find the translation unit and fix its compile flags.</p>`,
|
||||
);
|
||||
}
|
||||
parts.push(`</details>`);
|
||||
const annotation = parts.join("\n");
|
||||
|
||||
Bun.spawnSync(["buildkite-agent", "annotate", "--append", "--style", "error", "--context", "verify-baseline"], {
|
||||
stdin: new Blob([annotation]),
|
||||
@@ -233,7 +295,9 @@ if (instructionFailures > 0) {
|
||||
}
|
||||
|
||||
if (otherFailures > 0) {
|
||||
console.log(" Some tests failed for reasons unrelated to CPU instructions.");
|
||||
console.log(
|
||||
` Baseline verification passed with ${otherFailures} non-instruction warning(s) on ${config.cpuDesc}.`,
|
||||
);
|
||||
} else {
|
||||
console.log(` All baseline verification passed on ${config.cpuDesc}.`);
|
||||
}
|
||||
|
||||
console.log(` All baseline verification passed on ${config.cpuDesc}.`);
|
||||
|
||||
@@ -207,7 +207,7 @@ WTF::String stopCPUProfilerAndGetJSON(JSC::VM& vm)
|
||||
#if USE(BUN_JSC_ADDITIONS)
|
||||
auto& fn = vm.computeLineColumnWithSourcemap();
|
||||
if (fn) {
|
||||
fn(vm, provider, sourceMappedLineColumn);
|
||||
fn(vm, provider, sourceMappedLineColumn, url);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
@@ -670,7 +670,7 @@ void stopCPUProfiler(JSC::VM& vm, WTF::String* outJSON, WTF::String* outText)
|
||||
#if USE(BUN_JSC_ADDITIONS)
|
||||
auto& fn = vm.computeLineColumnWithSourcemap();
|
||||
if (fn)
|
||||
fn(vm, provider, sourceMappedLineColumn);
|
||||
fn(vm, provider, sourceMappedLineColumn, url);
|
||||
#endif
|
||||
}
|
||||
lineNumber = static_cast<int>(sourceMappedLineColumn.line);
|
||||
@@ -841,7 +841,7 @@ void stopCPUProfiler(JSC::VM& vm, WTF::String* outJSON, WTF::String* outText)
|
||||
#if USE(BUN_JSC_ADDITIONS)
|
||||
auto& fn = vm.computeLineColumnWithSourcemap();
|
||||
if (fn)
|
||||
fn(vm, provider, sourceMappedLineColumn);
|
||||
fn(vm, provider, sourceMappedLineColumn, url);
|
||||
#endif
|
||||
}
|
||||
lineNumber = static_cast<int>(sourceMappedLineColumn.line);
|
||||
|
||||
@@ -541,7 +541,7 @@ WTF::String computeErrorInfoWrapperToString(JSC::VM& vm, Vector<StackFrame>& sta
|
||||
return result;
|
||||
}
|
||||
|
||||
void computeLineColumnWithSourcemap(JSC::VM& vm, JSC::SourceProvider* _Nonnull sourceProvider, JSC::LineColumn& lineColumn)
|
||||
void computeLineColumnWithSourcemap(JSC::VM& vm, JSC::SourceProvider* _Nonnull sourceProvider, JSC::LineColumn& lineColumn, WTF::String& remappedSourceURL)
|
||||
{
|
||||
auto sourceURL = sourceProvider->sourceURL();
|
||||
if (sourceURL.isEmpty()) {
|
||||
@@ -561,6 +561,7 @@ void computeLineColumnWithSourcemap(JSC::VM& vm, JSC::SourceProvider* _Nonnull s
|
||||
if (frame.remapped) {
|
||||
lineColumn.line = frame.position.line().oneBasedInt();
|
||||
lineColumn.column = frame.position.column().oneBasedInt();
|
||||
remappedSourceURL = frame.source_url.toWTFString();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -82,7 +82,7 @@ JSC_DECLARE_CUSTOM_SETTER(errorInstanceLazyStackCustomSetter);
|
||||
// Internal wrapper functions for JSC error info callbacks
|
||||
WTF::String computeErrorInfoWrapperToString(JSC::VM& vm, WTF::Vector<JSC::StackFrame>& stackTrace, unsigned int& line_in, unsigned int& column_in, WTF::String& sourceURL, void* bunErrorData);
|
||||
JSC::JSValue computeErrorInfoWrapperToJSValue(JSC::VM& vm, WTF::Vector<JSC::StackFrame>& stackTrace, unsigned int& line_in, unsigned int& column_in, WTF::String& sourceURL, JSC::JSObject* errorInstance, void* bunErrorData);
|
||||
void computeLineColumnWithSourcemap(JSC::VM& vm, JSC::SourceProvider* _Nonnull sourceProvider, JSC::LineColumn& lineColumn);
|
||||
void computeLineColumnWithSourcemap(JSC::VM& vm, JSC::SourceProvider* _Nonnull sourceProvider, JSC::LineColumn& lineColumn, WTF::String& remappedSourceURL);
|
||||
} // namespace Bun
|
||||
|
||||
namespace Zig {
|
||||
|
||||
Reference in New Issue
Block a user